source: rtems/doc/supplements/hppa1_1/memmodel.t @ 0660b4f8

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Last change on this file since 0660b4f8 was 0660b4f8, checked in by Joel Sherrill <joel.sherrill@…>, on 11/16/99 at 19:50:56

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1@c
2@c  COPYRIGHT (c) 1988-1999.
3@c  On-Line Applications Research Corporation (OAR).
4@c  All rights reserved.
5@c
6@c  $Id$
7@c
8
9@chapter Memory Model
10
11@section Introduction
12
13A processor may support any combination of memory
14models ranging from pure physical addressing to complex demand
15paged virtual memory systems.  RTEMS supports a flat memory
16model which ranges contiguously over the processor's allowable
17address space.  RTEMS does not support segmentation or virtual
18memory of any kind.  The appropriate memory model for RTEMS
19provided by the targeted processor and related characteristics
20of that model are described in this chapter.
21
22@section Flat Memory Model
23
24RTEMS supports applications in which the application
25and the executive execute within a single thirty-two bit address
26space.  Thus RTEMS and the application share a common four
27gigabyte address space within a single space.  The PA-RISC
28automatically converts every address from a logical to a
29physical address each time it is used.  The PA-RISC uses
30information provided in the page table to perform this
31translation.  The following protection levels are assumed:
32
33@itemize @bullet
34@item a single code segment at protection level (0) which
35contains all application and executive code.
36
37@item a single data segment at protection level zero (0) which
38contains all application and executive data.
39@end itemize
40
41The PA-RISC space registers and associated stack --
42including the stack pointer r27 -- must be initialized when the
43initialize_executive directive is invoked.  RTEMS treats the
44space registers as system resources shared by all tasks and does
45not modify or context switch them.
46
47This memory model supports a flat 32-bit address
48space with addresses ranging from 0x00000000 to 0xFFFFFFFF (4
49gigabytes).  Each address is represented by a 32-bit value and
50memory is addressable.  The address may be used to reference a
51single byte, half-word (2-bytes), or word (4 bytes).
52
53RTEMS does not require that logical addresses map
54directly to physical addresses, although it is desirable in many
55applications to do so.  RTEMS does not need any additional
56information when physical addresses do not map directly to
57physical addresses.  By not requiring that logical addresses map
58directly to physical addresses, the memory space of an RTEMS
59space can be separated from that of a ROM monitor.  For example,
60a ROM monitor may load application programs into a separate
61logical address space from itself.
62
63RTEMS assumes that the space registers contain the
64selector for the single data segment when a directive is
65invoked.   This assumption is especially important when
66developing interrupt service routines.
67
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