1 | @c |
---|
2 | @c COPYRIGHT (c) 1988-1997. |
---|
3 | @c On-Line Applications Research Corporation (OAR). |
---|
4 | @c All rights reserved. |
---|
5 | @c |
---|
6 | |
---|
7 | @ifinfo |
---|
8 | @node Board Support Packages, Board Support Packages Introduction, Default Fatal Error Processing Default Fatal Error Handler Operations, Top |
---|
9 | @end ifinfo |
---|
10 | @chapter Board Support Packages |
---|
11 | @ifinfo |
---|
12 | @menu |
---|
13 | * Board Support Packages Introduction:: |
---|
14 | * Board Support Packages System Reset:: |
---|
15 | * Board Support Packages Processor Initialization:: |
---|
16 | @end menu |
---|
17 | @end ifinfo |
---|
18 | |
---|
19 | @ifinfo |
---|
20 | @node Board Support Packages Introduction, Board Support Packages System Reset, Board Support Packages, Board Support Packages |
---|
21 | @end ifinfo |
---|
22 | @section Introduction |
---|
23 | |
---|
24 | An RTEMS Board Support Package (BSP) must be designed |
---|
25 | to support a particular processor and target board combination. |
---|
26 | This chapter presents a discussion of PA-RISC specific BSP |
---|
27 | issues. For more information on developing a BSP, refer to the |
---|
28 | chapter titled Board Support Packages in the RTEMS |
---|
29 | Applications User's Guide. |
---|
30 | |
---|
31 | @ifinfo |
---|
32 | @node Board Support Packages System Reset, Board Support Packages Processor Initialization, Board Support Packages Introduction, Board Support Packages |
---|
33 | @end ifinfo |
---|
34 | @section System Reset |
---|
35 | |
---|
36 | An RTEMS based application is initiated or |
---|
37 | re-initiated when the PA-RISC processor is reset. The behavior |
---|
38 | of a PA-RISC upon reset is implementation defined and thus is |
---|
39 | beyond the scope of this manual. |
---|
40 | |
---|
41 | @ifinfo |
---|
42 | @node Board Support Packages Processor Initialization, Processor Dependent Information Table, Board Support Packages System Reset, Board Support Packages |
---|
43 | @end ifinfo |
---|
44 | @section Processor Initialization |
---|
45 | |
---|
46 | The precise requirements for initialization of a |
---|
47 | particular implementation of the PA-RISC architecture are |
---|
48 | implementation defined. Thus it is impossible to provide exact |
---|
49 | details of this procedure in this manual. However, the |
---|
50 | requirements of RTEMS which must be satisfied by this |
---|
51 | initialization code can be discussed. |
---|
52 | |
---|
53 | RTEMS assumes that interrupts are disabled when the |
---|
54 | initialize_executive directive is invoked. Interrupts are |
---|
55 | enabled automatically by RTEMS as part of the initialize |
---|
56 | executive directive and device driver initialization occurs |
---|
57 | after interrupts are enabled. Thus all interrupt sources should |
---|
58 | be quiescent until the system's device drivers have been |
---|
59 | initialized and installed their interrupt handlers. |
---|
60 | |
---|
61 | If the processor requires initialization of the |
---|
62 | cache, then it should be be done during the reset application |
---|
63 | initialization code. |
---|
64 | |
---|
65 | Finally, the requirements in the Board Support |
---|
66 | Packages chapter of the Applications User's Manual for the |
---|
67 | reset code which is executed before the call to initialize |
---|
68 | executive must be satisfied. |
---|
69 | |
---|
70 | |
---|