1 | @c |
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2 | @c COPYRIGHT (c) 1988-1998. |
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3 | @c On-Line Applications Research Corporation (OAR). |
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4 | @c All rights reserved. |
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5 | @c |
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6 | @c $Id$ |
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7 | @c |
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8 | |
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9 | @chapter CPU Initialization |
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10 | |
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11 | This section describes the general CPU and system initialization sequence |
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12 | as it pertains to the CPU dependent code. |
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13 | |
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14 | @section Introduction |
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15 | |
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16 | XXX general startup sequence description rewritten to make it more |
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17 | applicable to CPU depdent code in executive |
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18 | |
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19 | @section CPU Dependent Configuration Table |
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20 | |
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21 | The CPU Dependent Configuration Table contains information which tailors |
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22 | the behavior of RTEMS base Some of the fields in this table are required |
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23 | to be present in all ports of RTEMS. These fields appear at the beginning |
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24 | of the data structure. Fields past this point may be CPU family and CPU |
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25 | model dependent. For example, a port may add a field to specify the |
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26 | default value for an interrupt mask register on the CPU. This table is |
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27 | initialized by the Board Support Package and passed to the |
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28 | rtems_initialize_executive or rtems_initialize_executive_early directive. |
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29 | |
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30 | @example |
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31 | typedef struct @{ |
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32 | void (*pretasking_hook)( void ); |
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33 | void (*predriver_hook)( void ); |
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34 | void (*postdriver_hook)( void ); |
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35 | void (*idle_task)( void ); |
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36 | boolean do_zero_of_workspace; |
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37 | unsigned32 idle_task_stack_size; |
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38 | unsigned32 interrupt_stack_size; |
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39 | unsigned32 extra_mpci_receive_server_stack; |
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40 | void * (*stack_allocate_hook)( unsigned32 ); |
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41 | void (*stack_free_hook)( void* ); |
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42 | /* end of fields required on all CPUs */ |
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43 | |
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44 | unsigned32 some_other_cpu_dependent_info; |
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45 | @} rtems_cpu_table; |
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46 | @end example |
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47 | |
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48 | XXX copy the descriptions of the fields from another CPU supplement |
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49 | |
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50 | @section Initializing the CPU |
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51 | |
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52 | The _CPU_Initialize routine performs processor dependent initialization. |
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53 | |
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54 | @example |
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55 | void _CPU_Initialize( |
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56 | rtems_cpu_table *cpu_table, |
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57 | void (*thread_dispatch) /* may be ignored */ |
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58 | ) |
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59 | @end example |
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60 | |
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61 | The thread_dispatch argument is the address of the entry point for the |
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62 | routine called at the end of an ISR once it has been decided a context |
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63 | switch is necessary. On some compilation systems it is difficult to call |
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64 | a high-level language routine from assembly. Providing the address of the |
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65 | _Thread_ISR_Dispatch routine allows the porter an easy way to obtain this |
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66 | critical address and thus provides an easy way to work around this |
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67 | limitation on these systems. |
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68 | |
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69 | If you encounter this problem save the entry point in a CPU dependent |
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70 | variable as shown below: |
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71 | |
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72 | @example |
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73 | _CPU_Thread_dispatch_pointer = thread_dispatch; |
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74 | @end example |
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75 | |
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76 | |
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77 | During the initialization of the context for tasks with floating point, |
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78 | the CPU dependent code is responsible for initializing the floating point |
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79 | context. If there is not an easy way to initialize the FP context during |
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80 | Context_Initialize, then it is usually easier to save an "uninitialized" |
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81 | FP context here and copy it to the task's during Context_Initialize. If |
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82 | this technique is used to initialize the FP contexts, then it is important |
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83 | to ensure that the state of the floating point unit is in a coherent, |
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84 | initialized state. |
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85 | |
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86 | Finally, this routine is responsible for copying the application's CPU |
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87 | Table into a locally accessible and modifiable area. This is shown below: |
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88 | |
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89 | @example |
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90 | _CPU_Table = *cpu_table; |
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91 | @end example |
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92 | |
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93 | |
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