source: rtems/cpukit/score/src/threaddispatchdisablelevel.c @ 39046f7

4.115
Last change on this file since 39046f7 was 39046f7, checked in by Sebastian Huber <sebastian.huber@…>, on 07/24/13 at 09:09:23

score: Merge sysstate API into one file

  • Property mode set to 100644
File size: 3.4 KB
Line 
1/**
2 * @file
3 *
4 * @brief Thread Dispatch Disable Functions
5 *
6 * @ingroup ScoreThread
7 */
8
9/*
10 *  COPYRIGHT (c) 1989-2011.
11 *  On-Line Applications Research Corporation (OAR).
12 *
13 *  The license and distribution terms for this file may be
14 *  found in the file LICENSE in this distribution or at
15 *  http://www.rtems.com/license/LICENSE.
16 */
17
18#include <rtems/system.h>
19#include <rtems/score/apiext.h>
20#include <rtems/score/context.h>
21#include <rtems/score/interr.h>
22#include <rtems/score/isr.h>
23#include <rtems/score/object.h>
24#include <rtems/score/priority.h>
25#include <rtems/score/states.h>
26#include <rtems/score/threaddispatch.h>
27
28#define NO_OWNER_CPU 0xffffffffU
29
30void _Thread_Dispatch_initialization( void )
31{
32  Thread_Dispatch_disable_level_lock_control *level_lock =
33    &_Thread_Dispatch_disable_level_lock;
34
35  _Thread_Dispatch_disable_level = 0;
36  _SMP_lock_Initialize( &level_lock->lock );
37  level_lock->owner_cpu = NO_OWNER_CPU;
38  _Thread_Dispatch_set_disable_level( 1 );
39}
40
41uint32_t _Thread_Dispatch_get_disable_level(void)
42{
43  return _Thread_Dispatch_disable_level;
44}
45
46uint32_t _Thread_Dispatch_increment_disable_level( void )
47{
48  Thread_Dispatch_disable_level_lock_control *level_lock =
49    &_Thread_Dispatch_disable_level_lock;
50  ISR_Level isr_level;
51  uint32_t self_cpu;
52  uint32_t disable_level;
53
54  _ISR_Disable_on_this_core( isr_level );
55
56  /*
57   * We must obtain the processor ID after interrupts are disabled since a
58   * non-optimizing compiler may store the value on the stack and read it back.
59   */
60  self_cpu = _SMP_Get_current_processor();
61
62  if ( level_lock->owner_cpu != self_cpu ) {
63    _SMP_lock_Acquire( &level_lock->lock );
64    level_lock->owner_cpu = self_cpu;
65    level_lock->nest_level = 1;
66  } else {
67    ++level_lock->nest_level;
68  }
69
70  disable_level = _Thread_Dispatch_disable_level;
71  ++disable_level;
72  _Thread_Dispatch_disable_level = disable_level;
73
74  _ISR_Enable_on_this_core( isr_level );
75
76  return disable_level;
77}
78
79uint32_t _Thread_Dispatch_decrement_disable_level( void )
80{
81  Thread_Dispatch_disable_level_lock_control *level_lock =
82    &_Thread_Dispatch_disable_level_lock;
83  ISR_Level isr_level;
84  uint32_t disable_level;
85
86  _ISR_Disable_on_this_core( isr_level );
87
88  disable_level = _Thread_Dispatch_disable_level;
89  --disable_level;
90  _Thread_Dispatch_disable_level = disable_level;
91
92  --level_lock->nest_level;
93  if ( level_lock->nest_level == 0 ) {
94    level_lock->owner_cpu = NO_OWNER_CPU;
95    _SMP_lock_Release( &level_lock->lock );
96  }
97
98  _ISR_Enable_on_this_core( isr_level );
99
100  return disable_level;
101}
102
103
104/*
105 * Note this method is taking a heavy handed approach to
106 * setting the dispatch level. This may be optimized at a
107 * later timee, but it must be in such a way that the nesting
108 * level is decremented by the same number as the dispatch level.
109 * This approach is safest until we are sure the nested spinlock
110 * is successfully working with smp isr source code. 
111 */
112
113uint32_t _Thread_Dispatch_set_disable_level(uint32_t value)
114{
115  /*
116   * If we need the dispatch level to go higher
117   * call increment method the desired number of times.
118   */
119
120  while ( value > _Thread_Dispatch_disable_level ) {
121    _Thread_Dispatch_increment_disable_level();
122  }
123
124  /*
125   * If we need the dispatch level to go lower
126   * call increment method the desired number of times.
127   */
128
129  while ( value < _Thread_Dispatch_disable_level ) {
130    _Thread_Dispatch_decrement_disable_level();
131  }
132
133  return value;
134}
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