source: rtems/cpukit/score/src/threaddispatch.c @ 81b329a

4.104.114.9
Last change on this file since 81b329a was 81b329a, checked in by Ralf Corsepius <ralf.corsepius@…>, on Jul 2, 2008 at 3:28:54 PM

Support rtems_ada_self iff RTEMS_ADA is given.

  • Property mode set to 100644
File size: 4.7 KB
Line 
1/*
2 *  Thread Handler
3 *
4 *
5 *  COPYRIGHT (c) 1989-2007.
6 *  On-Line Applications Research Corporation (OAR).
7 *
8 *  The license and distribution terms for this file may be
9 *  found in found in the file LICENSE in this distribution or at
10 *  http://www.rtems.com/license/LICENSE.
11 *
12 *  $Id$
13 */
14
15#if HAVE_CONFIG_H
16#include "config.h"
17#endif
18
19#include <rtems/system.h>
20#include <rtems/score/apiext.h>
21#include <rtems/score/context.h>
22#include <rtems/score/interr.h>
23#include <rtems/score/isr.h>
24#include <rtems/score/object.h>
25#include <rtems/score/priority.h>
26#include <rtems/score/states.h>
27#include <rtems/score/sysstate.h>
28#include <rtems/score/thread.h>
29#include <rtems/score/threadq.h>
30#include <rtems/score/userext.h>
31#include <rtems/score/wkspace.h>
32
33#ifdef RTEMS_ENABLE_NANOSECOND_CPU_USAGE_STATISTICS
34  #include <rtems/score/timespec.h>
35#endif
36
37/*PAGE
38 *
39 *  _Thread_Enable_dispatch
40 *
41 *  This kernel routine exits a context switch disable critical section.
42 *  This is the NOT INLINED version.
43 *
44 *  Input parameters:  NONE
45 *
46 *  Output parameters:  NONE
47 *
48 *  INTERRUPT LATENCY:
49 *    dispatch thread
50 *    no dispatch thread
51 */
52
53#if ( (CPU_INLINE_ENABLE_DISPATCH == FALSE) || \
54      (__RTEMS_DO_NOT_INLINE_THREAD_ENABLE_DISPATCH__ == 1) )
55void _Thread_Enable_dispatch( void )
56{
57  if ( --_Thread_Dispatch_disable_level )
58    return;
59  _Thread_Dispatch();
60}
61#endif
62
63/*PAGE
64 *
65 *  _Thread_Dispatch
66 *
67 *  This kernel routine determines if a dispatch is needed, and if so
68 *  dispatches to the heir thread.  Once the heir is running an attempt
69 *  is made to dispatch any ASRs.
70 *
71 *  ALTERNATE ENTRY POINTS:
72 *    void _Thread_Enable_dispatch();
73 *
74 *  Input parameters:  NONE
75 *
76 *  Output parameters:  NONE
77 *
78 *  INTERRUPT LATENCY:
79 *    dispatch thread
80 *    no dispatch thread
81 */
82
83void _Thread_Dispatch( void )
84{
85  Thread_Control   *executing;
86  Thread_Control   *heir;
87  ISR_Level         level;
88
89  executing   = _Thread_Executing;
90  _ISR_Disable( level );
91  while ( _Context_Switch_necessary == TRUE ) {
92    heir = _Thread_Heir;
93    _Thread_Dispatch_disable_level = 1;
94    _Context_Switch_necessary = FALSE;
95    _Thread_Executing = heir;
96#if __RTEMS_ADA__
97    executing->rtems_ada_self = rtems_ada_self;
98    rtems_ada_self = heir->rtems_ada_self;
99#endif
100    if ( heir->budget_algorithm == THREAD_CPU_BUDGET_ALGORITHM_RESET_TIMESLICE )
101      heir->cpu_time_budget = _Thread_Ticks_per_timeslice;
102    _ISR_Enable( level );
103
104    #ifdef RTEMS_ENABLE_NANOSECOND_CPU_USAGE_STATISTICS
105      {
106        struct timespec uptime, ran;
107        _TOD_Get_uptime( &uptime );
108        _Timespec_Subtract(&_Thread_Time_of_last_context_switch, &uptime, &ran);
109        _Timespec_Add_to( &executing->cpu_time_used, &ran );
110        _Thread_Time_of_last_context_switch = uptime;
111      }
112    #else
113      heir->cpu_time_used++;
114    #endif
115
116    /*
117     * Switch libc's task specific data.
118     */
119    if ( _Thread_libc_reent ) {
120      executing->libc_reent = *_Thread_libc_reent;
121      *_Thread_libc_reent = heir->libc_reent;
122    }
123
124    _User_extensions_Thread_switch( executing, heir );
125
126    /*
127     *  If the CPU has hardware floating point, then we must address saving
128     *  and restoring it as part of the context switch.
129     *
130     *  The second conditional compilation section selects the algorithm used
131     *  to context switch between floating point tasks.  The deferred algorithm
132     *  can be significantly better in a system with few floating point tasks
133     *  because it reduces the total number of save and restore FP context
134     *  operations.  However, this algorithm can not be used on all CPUs due
135     *  to unpredictable use of FP registers by some compilers for integer
136     *  operations.
137     */
138
139#if ( CPU_HARDWARE_FP == TRUE ) || ( CPU_SOFTWARE_FP == TRUE )
140#if ( CPU_USE_DEFERRED_FP_SWITCH != TRUE )
141    if ( executing->fp_context != NULL )
142      _Context_Save_fp( &executing->fp_context );
143#endif
144#endif
145
146    _Context_Switch( &executing->Registers, &heir->Registers );
147
148#if ( CPU_HARDWARE_FP == TRUE ) || ( CPU_SOFTWARE_FP == TRUE )
149#if ( CPU_USE_DEFERRED_FP_SWITCH == TRUE )
150    if ( (executing->fp_context != NULL) &&
151         !_Thread_Is_allocated_fp( executing ) ) {
152      if ( _Thread_Allocated_fp != NULL )
153        _Context_Save_fp( &_Thread_Allocated_fp->fp_context );
154      _Context_Restore_fp( &executing->fp_context );
155      _Thread_Allocated_fp = executing;
156    }
157#else
158    if ( executing->fp_context != NULL )
159      _Context_Restore_fp( &executing->fp_context );
160#endif
161#endif
162
163    executing = _Thread_Executing;
164
165    _ISR_Disable( level );
166  }
167
168  _Thread_Dispatch_disable_level = 0;
169
170  _ISR_Enable( level );
171
172  if ( _Thread_Do_post_task_switch_extension ||
173       executing->do_post_task_switch_extension ) {
174    executing->do_post_task_switch_extension = FALSE;
175    _API_extensions_Run_postswitch();
176  }
177
178}
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