source: rtems/cpukit/score/src/threaddispatch.c @ 632e4306

4.104.115
Last change on this file since 632e4306 was aae7f1a1, checked in by Ralf Corsepius <ralf.corsepius@…>, on 12/22/08 at 05:52:32

Eliminate TRUE/FALSE.

  • Property mode set to 100644
File size: 4.8 KB
Line 
1/*
2 *  Thread Handler
3 *
4 *
5 *  COPYRIGHT (c) 1989-2007.
6 *  On-Line Applications Research Corporation (OAR).
7 *
8 *  The license and distribution terms for this file may be
9 *  found in found in the file LICENSE in this distribution or at
10 *  http://www.rtems.com/license/LICENSE.
11 *
12 *  $Id$
13 */
14
15#if HAVE_CONFIG_H
16#include "config.h"
17#endif
18
19#include <rtems/system.h>
20#include <rtems/score/apiext.h>
21#include <rtems/score/context.h>
22#include <rtems/score/interr.h>
23#include <rtems/score/isr.h>
24#include <rtems/score/object.h>
25#include <rtems/score/priority.h>
26#include <rtems/score/states.h>
27#include <rtems/score/sysstate.h>
28#include <rtems/score/thread.h>
29#include <rtems/score/threadq.h>
30#include <rtems/score/userext.h>
31#include <rtems/score/wkspace.h>
32
33#ifdef RTEMS_ENABLE_NANOSECOND_CPU_USAGE_STATISTICS
34  #include <rtems/score/timestamp.h>
35#endif
36
37/*PAGE
38 *
39 *  _Thread_Enable_dispatch
40 *
41 *  This kernel routine exits a context switch disable critical section.
42 *  This is the NOT INLINED version.
43 *
44 *  Input parameters:  NONE
45 *
46 *  Output parameters:  NONE
47 *
48 *  INTERRUPT LATENCY:
49 *    dispatch thread
50 *    no dispatch thread
51 */
52
53#if ( (CPU_INLINE_ENABLE_DISPATCH == FALSE) || \
54      (__RTEMS_DO_NOT_INLINE_THREAD_ENABLE_DISPATCH__ == 1) )
55void _Thread_Enable_dispatch( void )
56{
57  if ( --_Thread_Dispatch_disable_level )
58    return;
59  _Thread_Dispatch();
60}
61#endif
62
63/*PAGE
64 *
65 *  _Thread_Dispatch
66 *
67 *  This kernel routine determines if a dispatch is needed, and if so
68 *  dispatches to the heir thread.  Once the heir is running an attempt
69 *  is made to dispatch any ASRs.
70 *
71 *  ALTERNATE ENTRY POINTS:
72 *    void _Thread_Enable_dispatch();
73 *
74 *  Input parameters:  NONE
75 *
76 *  Output parameters:  NONE
77 *
78 *  INTERRUPT LATENCY:
79 *    dispatch thread
80 *    no dispatch thread
81 */
82
83void _Thread_Dispatch( void )
84{
85  Thread_Control   *executing;
86  Thread_Control   *heir;
87  ISR_Level         level;
88
89  executing   = _Thread_Executing;
90  _ISR_Disable( level );
91  while ( _Context_Switch_necessary == true ) {
92    heir = _Thread_Heir;
93    _Thread_Dispatch_disable_level = 1;
94    _Context_Switch_necessary = false;
95    _Thread_Executing = heir;
96#if __RTEMS_ADA__
97    executing->rtems_ada_self = rtems_ada_self;
98    rtems_ada_self = heir->rtems_ada_self;
99#endif
100    if ( heir->budget_algorithm == THREAD_CPU_BUDGET_ALGORITHM_RESET_TIMESLICE )
101      heir->cpu_time_budget = _Thread_Ticks_per_timeslice;
102    _ISR_Enable( level );
103
104    #ifdef RTEMS_ENABLE_NANOSECOND_CPU_USAGE_STATISTICS
105      {
106        Timestamp_Control uptime, ran;
107        _TOD_Get_uptime( &uptime );
108        _Timestamp_Subtract(
109          &_Thread_Time_of_last_context_switch,
110          &uptime,
111          &ran
112        );
113        _Timestamp_Add_to( &executing->cpu_time_used, &ran );
114        _Thread_Time_of_last_context_switch = uptime;
115      }
116    #else
117      heir->cpu_time_used++;
118    #endif
119
120    /*
121     * Switch libc's task specific data.
122     */
123    if ( _Thread_libc_reent ) {
124      executing->libc_reent = *_Thread_libc_reent;
125      *_Thread_libc_reent = heir->libc_reent;
126    }
127
128    _User_extensions_Thread_switch( executing, heir );
129
130    /*
131     *  If the CPU has hardware floating point, then we must address saving
132     *  and restoring it as part of the context switch.
133     *
134     *  The second conditional compilation section selects the algorithm used
135     *  to context switch between floating point tasks.  The deferred algorithm
136     *  can be significantly better in a system with few floating point tasks
137     *  because it reduces the total number of save and restore FP context
138     *  operations.  However, this algorithm can not be used on all CPUs due
139     *  to unpredictable use of FP registers by some compilers for integer
140     *  operations.
141     */
142
143#if ( CPU_HARDWARE_FP == TRUE ) || ( CPU_SOFTWARE_FP == TRUE )
144#if ( CPU_USE_DEFERRED_FP_SWITCH != TRUE )
145    if ( executing->fp_context != NULL )
146      _Context_Save_fp( &executing->fp_context );
147#endif
148#endif
149
150    _Context_Switch( &executing->Registers, &heir->Registers );
151
152#if ( CPU_HARDWARE_FP == TRUE ) || ( CPU_SOFTWARE_FP == TRUE )
153#if ( CPU_USE_DEFERRED_FP_SWITCH == TRUE )
154    if ( (executing->fp_context != NULL) &&
155         !_Thread_Is_allocated_fp( executing ) ) {
156      if ( _Thread_Allocated_fp != NULL )
157        _Context_Save_fp( &_Thread_Allocated_fp->fp_context );
158      _Context_Restore_fp( &executing->fp_context );
159      _Thread_Allocated_fp = executing;
160    }
161#else
162    if ( executing->fp_context != NULL )
163      _Context_Restore_fp( &executing->fp_context );
164#endif
165#endif
166
167    executing = _Thread_Executing;
168
169    _ISR_Disable( level );
170  }
171
172  _Thread_Dispatch_disable_level = 0;
173
174  _ISR_Enable( level );
175
176  if ( _Thread_Do_post_task_switch_extension ||
177       executing->do_post_task_switch_extension ) {
178    executing->do_post_task_switch_extension = false;
179    _API_extensions_Run_postswitch();
180  }
181
182}
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