1 | /* |
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2 | * Thread Handler |
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3 | * |
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4 | * |
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5 | * COPYRIGHT (c) 1989-2007. |
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6 | * On-Line Applications Research Corporation (OAR). |
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7 | * |
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8 | * The license and distribution terms for this file may be |
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9 | * found in found in the file LICENSE in this distribution or at |
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10 | * http://www.rtems.com/license/LICENSE. |
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11 | * |
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12 | * $Id$ |
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13 | */ |
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14 | |
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15 | #if HAVE_CONFIG_H |
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16 | #include "config.h" |
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17 | #endif |
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18 | |
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19 | #include <rtems/system.h> |
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20 | #include <rtems/score/apiext.h> |
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21 | #include <rtems/score/context.h> |
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22 | #include <rtems/score/interr.h> |
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23 | #include <rtems/score/isr.h> |
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24 | #include <rtems/score/object.h> |
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25 | #include <rtems/score/priority.h> |
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26 | #include <rtems/score/states.h> |
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27 | #include <rtems/score/sysstate.h> |
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28 | #include <rtems/score/thread.h> |
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29 | #include <rtems/score/threadq.h> |
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30 | #include <rtems/score/userext.h> |
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31 | #include <rtems/score/wkspace.h> |
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32 | |
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33 | #ifdef RTEMS_ENABLE_NANOSECOND_CPU_USAGE_STATISTICS |
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34 | #include <rtems/score/timespec.h> |
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35 | #endif |
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36 | |
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37 | /*PAGE |
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38 | * |
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39 | * _Thread_Enable_dispatch |
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40 | * |
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41 | * This kernel routine exits a context switch disable critical section. |
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42 | * This is the NOT INLINED version. |
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43 | * |
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44 | * Input parameters: NONE |
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45 | * |
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46 | * Output parameters: NONE |
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47 | * |
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48 | * INTERRUPT LATENCY: |
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49 | * dispatch thread |
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50 | * no dispatch thread |
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51 | */ |
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52 | |
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53 | #if ( (CPU_INLINE_ENABLE_DISPATCH == FALSE) || \ |
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54 | (__RTEMS_DO_NOT_INLINE_THREAD_ENABLE_DISPATCH__ == 1) ) |
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55 | void _Thread_Enable_dispatch( void ) |
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56 | { |
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57 | if ( --_Thread_Dispatch_disable_level ) |
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58 | return; |
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59 | _Thread_Dispatch(); |
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60 | } |
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61 | #endif |
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62 | |
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63 | /*PAGE |
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64 | * |
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65 | * _Thread_Dispatch |
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66 | * |
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67 | * This kernel routine determines if a dispatch is needed, and if so |
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68 | * dispatches to the heir thread. Once the heir is running an attempt |
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69 | * is made to dispatch any ASRs. |
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70 | * |
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71 | * ALTERNATE ENTRY POINTS: |
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72 | * void _Thread_Enable_dispatch(); |
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73 | * |
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74 | * Input parameters: NONE |
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75 | * |
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76 | * Output parameters: NONE |
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77 | * |
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78 | * INTERRUPT LATENCY: |
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79 | * dispatch thread |
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80 | * no dispatch thread |
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81 | */ |
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82 | |
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83 | void _Thread_Dispatch( void ) |
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84 | { |
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85 | Thread_Control *executing; |
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86 | Thread_Control *heir; |
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87 | ISR_Level level; |
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88 | |
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89 | executing = _Thread_Executing; |
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90 | _ISR_Disable( level ); |
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91 | while ( _Context_Switch_necessary == TRUE ) { |
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92 | heir = _Thread_Heir; |
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93 | _Thread_Dispatch_disable_level = 1; |
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94 | _Context_Switch_necessary = FALSE; |
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95 | _Thread_Executing = heir; |
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96 | executing->rtems_ada_self = rtems_ada_self; |
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97 | rtems_ada_self = heir->rtems_ada_self; |
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98 | if ( heir->budget_algorithm == THREAD_CPU_BUDGET_ALGORITHM_RESET_TIMESLICE ) |
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99 | heir->cpu_time_budget = _Thread_Ticks_per_timeslice; |
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100 | _ISR_Enable( level ); |
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101 | |
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102 | #ifdef RTEMS_ENABLE_NANOSECOND_CPU_USAGE_STATISTICS |
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103 | { |
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104 | struct timespec uptime, ran; |
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105 | _TOD_Get_uptime( &uptime ); |
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106 | _Timespec_Subtract(&_Thread_Time_of_last_context_switch, &uptime, &ran); |
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107 | _Timespec_Add_to( &executing->cpu_time_used, &ran ); |
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108 | _Thread_Time_of_last_context_switch = uptime; |
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109 | } |
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110 | #else |
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111 | heir->cpu_time_used++; |
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112 | #endif |
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113 | |
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114 | /* |
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115 | * Switch libc's task specific data. |
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116 | */ |
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117 | if ( _Thread_libc_reent ) { |
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118 | executing->libc_reent = *_Thread_libc_reent; |
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119 | *_Thread_libc_reent = heir->libc_reent; |
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120 | } |
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121 | |
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122 | _User_extensions_Thread_switch( executing, heir ); |
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123 | |
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124 | /* |
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125 | * If the CPU has hardware floating point, then we must address saving |
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126 | * and restoring it as part of the context switch. |
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127 | * |
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128 | * The second conditional compilation section selects the algorithm used |
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129 | * to context switch between floating point tasks. The deferred algorithm |
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130 | * can be significantly better in a system with few floating point tasks |
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131 | * because it reduces the total number of save and restore FP context |
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132 | * operations. However, this algorithm can not be used on all CPUs due |
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133 | * to unpredictable use of FP registers by some compilers for integer |
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134 | * operations. |
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135 | */ |
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136 | |
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137 | #if ( CPU_HARDWARE_FP == TRUE ) || ( CPU_SOFTWARE_FP == TRUE ) |
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138 | #if ( CPU_USE_DEFERRED_FP_SWITCH != TRUE ) |
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139 | if ( executing->fp_context != NULL ) |
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140 | _Context_Save_fp( &executing->fp_context ); |
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141 | #endif |
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142 | #endif |
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143 | |
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144 | _Context_Switch( &executing->Registers, &heir->Registers ); |
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145 | |
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146 | #if ( CPU_HARDWARE_FP == TRUE ) || ( CPU_SOFTWARE_FP == TRUE ) |
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147 | #if ( CPU_USE_DEFERRED_FP_SWITCH == TRUE ) |
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148 | if ( (executing->fp_context != NULL) && |
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149 | !_Thread_Is_allocated_fp( executing ) ) { |
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150 | if ( _Thread_Allocated_fp != NULL ) |
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151 | _Context_Save_fp( &_Thread_Allocated_fp->fp_context ); |
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152 | _Context_Restore_fp( &executing->fp_context ); |
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153 | _Thread_Allocated_fp = executing; |
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154 | } |
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155 | #else |
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156 | if ( executing->fp_context != NULL ) |
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157 | _Context_Restore_fp( &executing->fp_context ); |
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158 | #endif |
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159 | #endif |
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160 | |
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161 | executing = _Thread_Executing; |
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162 | |
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163 | _ISR_Disable( level ); |
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164 | } |
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165 | |
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166 | _Thread_Dispatch_disable_level = 0; |
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167 | |
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168 | _ISR_Enable( level ); |
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169 | |
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170 | if ( _Thread_Do_post_task_switch_extension || |
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171 | executing->do_post_task_switch_extension ) { |
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172 | executing->do_post_task_switch_extension = FALSE; |
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173 | _API_extensions_Run_postswitch(); |
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174 | } |
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175 | |
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176 | } |
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