source: rtems/cpukit/score/src/threaddispatch.c @ 54cf0e34

4.115
Last change on this file since 54cf0e34 was 222dc775, checked in by Sebastian Huber <sebastian.huber@…>, on 02/26/15 at 09:32:08

score: Add and use _Thread_Do_dispatch()

The _Thread_Dispatch() function is quite complex and the time to set up
and tear down the stack frame is significant. Split this function into
two parts. The complex part is now in _Thread_Do_dispatch(). Call
_Thread_Do_dispatch() in _Thread_Enable_dispatch() only if necessary.
This increases the average case performance.

Simplify _Thread_Handler() for SMP configurations.

Update #2273.

  • Property mode set to 100644
File size: 4.5 KB
Line 
1/**
2 * @file
3 *
4 * @brief Dispatch Thread
5 * @ingroup ScoreThread
6 */
7
8/*
9 *  COPYRIGHT (c) 1989-2009.
10 *  On-Line Applications Research Corporation (OAR).
11 *
12 *  Copyright (c) 2014 embedded brains GmbH.
13 *
14 *  The license and distribution terms for this file may be
15 *  found in the file LICENSE in this distribution or at
16 *  http://www.rtems.org/license/LICENSE.
17 */
18
19#if HAVE_CONFIG_H
20#include "config.h"
21#endif
22
23#include <rtems/score/threaddispatch.h>
24#include <rtems/score/apiext.h>
25#include <rtems/score/assert.h>
26#include <rtems/score/isr.h>
27#include <rtems/score/threadimpl.h>
28#include <rtems/score/todimpl.h>
29#include <rtems/score/userextimpl.h>
30#include <rtems/score/wkspace.h>
31#include <rtems/config.h>
32
33static Thread_Action *_Thread_Get_post_switch_action(
34  Thread_Control *executing
35)
36{
37  Chain_Control *chain = &executing->Post_switch_actions.Chain;
38
39  return (Thread_Action *) _Chain_Get_unprotected( chain );
40}
41
42static void _Thread_Run_post_switch_actions( Thread_Control *executing )
43{
44  ISR_Level        level;
45  Per_CPU_Control *cpu_self;
46  Thread_Action   *action;
47
48  cpu_self = _Thread_Action_ISR_disable_and_acquire( executing, &level );
49  action = _Thread_Get_post_switch_action( executing );
50
51  while ( action != NULL ) {
52    _Chain_Set_off_chain( &action->Node );
53
54    ( *action->handler )( executing, action, cpu_self, level );
55
56    cpu_self = _Thread_Action_ISR_disable_and_acquire( executing, &level );
57    action = _Thread_Get_post_switch_action( executing );
58  }
59
60  _Thread_Action_release_and_ISR_enable( cpu_self, level );
61}
62
63void _Thread_Do_dispatch( Per_CPU_Control *cpu_self, ISR_Level level )
64{
65  Thread_Control *executing;
66
67  _Assert( cpu_self->thread_dispatch_disable_level == 1 );
68
69  executing = cpu_self->executing;
70
71  do {
72    Thread_Control *heir = _Thread_Get_heir_and_make_it_executing( cpu_self );
73
74    /*
75     *  When the heir and executing are the same, then we are being
76     *  requested to do the post switch dispatching.  This is normally
77     *  done to dispatch signals.
78     */
79    if ( heir == executing )
80      goto post_switch;
81
82    /*
83     *  Since heir and executing are not the same, we need to do a real
84     *  context switch.
85     */
86#if __RTEMS_ADA__
87    executing->rtems_ada_self = rtems_ada_self;
88    rtems_ada_self = heir->rtems_ada_self;
89#endif
90    if ( heir->budget_algorithm == THREAD_CPU_BUDGET_ALGORITHM_RESET_TIMESLICE )
91      heir->cpu_time_budget = rtems_configuration_get_ticks_per_timeslice();
92
93    /*
94     * On SMP the complete context switch must be atomic with respect to one
95     * processor.  See also _Thread_Handler() since _Context_switch() may branch
96     * to this function.
97     */
98#if !defined( RTEMS_SMP )
99    _ISR_Enable( level );
100#endif
101
102    #ifndef __RTEMS_USE_TICKS_FOR_STATISTICS__
103      _Thread_Update_cpu_time_used(
104        executing,
105        &cpu_self->time_of_last_context_switch
106      );
107    #else
108      {
109        _TOD_Get_uptime( &cpu_self->time_of_last_context_switch );
110        heir->cpu_time_used++;
111      }
112    #endif
113
114#if !defined(__DYNAMIC_REENT__)
115    /*
116     * Switch libc's task specific data.
117     */
118    if ( _Thread_libc_reent ) {
119      executing->libc_reent = *_Thread_libc_reent;
120      *_Thread_libc_reent = heir->libc_reent;
121    }
122#endif
123
124    _User_extensions_Thread_switch( executing, heir );
125    _Thread_Save_fp( executing );
126    _Context_Switch( &executing->Registers, &heir->Registers );
127    _Thread_Restore_fp( executing );
128
129    /*
130     * We have to obtain this value again after the context switch since the
131     * heir thread may have migrated from another processor.  Values from the
132     * stack or non-volatile registers reflect the old execution environment.
133     */
134    cpu_self = _Per_CPU_Get();
135
136    _Thread_Debug_set_real_processor( executing, cpu_self );
137
138#if !defined( RTEMS_SMP )
139    _ISR_Disable( level );
140#endif
141  } while (
142#if defined( RTEMS_SMP )
143    false
144#else
145    cpu_self->dispatch_necessary
146#endif
147  );
148
149post_switch:
150  _Assert( cpu_self->thread_dispatch_disable_level == 1 );
151  cpu_self->thread_dispatch_disable_level = 0;
152  _Profiling_Thread_dispatch_enable( cpu_self, 0 );
153
154  _ISR_Enable_without_giant( level );
155
156  _Thread_Run_post_switch_actions( executing );
157}
158
159void _Thread_Dispatch( void )
160{
161  ISR_Level        level;
162  Per_CPU_Control *cpu_self;
163
164  _ISR_Disable_without_giant( level );
165
166  cpu_self = _Per_CPU_Get();
167
168  if ( cpu_self->dispatch_necessary ) {
169    _Profiling_Thread_dispatch_disable( cpu_self, 0 );
170    cpu_self->thread_dispatch_disable_level = 1;
171    _Thread_Do_dispatch( cpu_self, level );
172  } else {
173    _ISR_Enable_without_giant( level );
174  }
175}
Note: See TracBrowser for help on using the repository browser.