1 | /* |
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2 | * SPDX-License-Identifier: BSD-2-Clause |
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3 | * |
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4 | * Copyright (C) 2019 embedded brains GmbH |
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5 | * |
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6 | * Redistribution and use in source and binary forms, with or without |
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7 | * modification, are permitted provided that the following conditions |
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8 | * are met: |
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9 | * 1. Redistributions of source code must retain the above copyright |
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10 | * notice, this list of conditions and the following disclaimer. |
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11 | * 2. Redistributions in binary form must reproduce the above copyright |
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12 | * notice, this list of conditions and the following disclaimer in the |
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13 | * documentation and/or other materials provided with the distribution. |
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14 | * |
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15 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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16 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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17 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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18 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE |
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19 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
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20 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
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21 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
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22 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
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23 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
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24 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
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25 | * POSSIBILITY OF SUCH DAMAGE. |
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26 | */ |
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27 | |
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28 | #ifdef HAVE_CONFIG_H |
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29 | #include "config.h" |
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30 | #endif |
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31 | |
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32 | #include <rtems/score/smpimpl.h> |
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33 | #include <rtems/score/assert.h> |
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34 | |
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35 | #define _Per_CPU_Jobs_ISR_disable_and_acquire( cpu, lock_context ) \ |
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36 | _ISR_lock_ISR_disable_and_acquire( &( cpu )->Jobs.Lock, lock_context ) |
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37 | |
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38 | #define _Per_CPU_Jobs_release_and_ISR_enable( cpu, lock_context ) \ |
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39 | _ISR_lock_Release_and_ISR_enable( &( cpu )->Jobs.Lock, lock_context ) |
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40 | |
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41 | void _Per_CPU_Perform_jobs( Per_CPU_Control *cpu ) |
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42 | { |
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43 | ISR_lock_Context lock_context; |
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44 | Per_CPU_Job *job; |
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45 | |
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46 | _Per_CPU_Jobs_ISR_disable_and_acquire( cpu, &lock_context ); |
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47 | |
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48 | while ( ( job = cpu->Jobs.head ) != NULL ) { |
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49 | const Per_CPU_Job_context *context; |
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50 | |
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51 | cpu->Jobs.head = job->next; |
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52 | _Per_CPU_Jobs_release_and_ISR_enable( cpu, &lock_context ); |
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53 | |
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54 | context = job->context; |
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55 | ( *context->handler )( context->arg ); |
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56 | _Atomic_Store_ulong( &job->done, PER_CPU_JOB_DONE, ATOMIC_ORDER_RELEASE ); |
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57 | |
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58 | _Per_CPU_Jobs_ISR_disable_and_acquire( cpu, &lock_context ); |
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59 | } |
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60 | } |
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61 | |
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62 | void _Per_CPU_Add_job( Per_CPU_Control *cpu, Per_CPU_Job *job ) |
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63 | { |
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64 | ISR_lock_Context lock_context; |
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65 | |
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66 | _Atomic_Store_ulong( &job->done, 0, ATOMIC_ORDER_RELAXED ); |
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67 | _Assert( job->next == NULL ); |
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68 | |
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69 | _Per_CPU_Jobs_ISR_disable_and_acquire( cpu, &lock_context ); |
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70 | |
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71 | if ( cpu->Jobs.head == NULL ) { |
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72 | cpu->Jobs.head = job; |
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73 | } else { |
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74 | *cpu->Jobs.tail = job; |
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75 | } |
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76 | |
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77 | cpu->Jobs.tail = &job->next; |
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78 | |
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79 | _Per_CPU_Jobs_release_and_ISR_enable( cpu, &lock_context ); |
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80 | } |
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81 | |
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82 | static void _Per_CPU_Try_perform_jobs( Per_CPU_Control *cpu_self ) |
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83 | { |
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84 | unsigned long message; |
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85 | |
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86 | message = _Atomic_Load_ulong( &cpu_self->message, ATOMIC_ORDER_RELAXED ); |
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87 | |
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88 | if ( ( message & SMP_MESSAGE_PERFORM_JOBS ) != 0 ) { |
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89 | bool success; |
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90 | |
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91 | success = _Atomic_Compare_exchange_ulong( |
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92 | &cpu_self->message, &message, |
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93 | message & ~SMP_MESSAGE_PERFORM_JOBS, ATOMIC_ORDER_RELAXED, |
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94 | ATOMIC_ORDER_RELAXED |
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95 | ); |
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96 | |
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97 | if ( success ) { |
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98 | _Per_CPU_Perform_jobs( cpu_self ); |
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99 | } |
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100 | } |
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101 | } |
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102 | |
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103 | typedef struct { |
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104 | Per_CPU_Job_context Context; |
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105 | Per_CPU_Job Jobs[ CPU_MAXIMUM_PROCESSORS ]; |
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106 | } SMP_Multicast_jobs; |
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107 | |
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108 | static void _SMP_Issue_action_jobs( |
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109 | const Processor_mask *targets, |
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110 | SMP_Multicast_jobs *jobs, |
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111 | uint32_t cpu_max |
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112 | ) |
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113 | { |
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114 | uint32_t cpu_index; |
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115 | |
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116 | for ( cpu_index = 0; cpu_index < cpu_max; ++cpu_index ) { |
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117 | if ( _Processor_mask_Is_set( targets, cpu_index ) ) { |
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118 | Per_CPU_Job *job; |
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119 | Per_CPU_Control *cpu; |
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120 | |
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121 | job = &jobs->Jobs[ cpu_index ]; |
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122 | job->context = &jobs->Context; |
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123 | cpu = _Per_CPU_Get_by_index( cpu_index ); |
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124 | |
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125 | _Per_CPU_Add_job( cpu, job ); |
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126 | _SMP_Send_message( cpu_index, SMP_MESSAGE_PERFORM_JOBS ); |
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127 | } |
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128 | } |
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129 | } |
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130 | |
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131 | static void _SMP_Wait_for_action_jobs( |
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132 | const Processor_mask *targets, |
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133 | const SMP_Multicast_jobs *jobs, |
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134 | uint32_t cpu_max |
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135 | ) |
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136 | { |
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137 | uint32_t cpu_index; |
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138 | |
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139 | for ( cpu_index = 0; cpu_index < cpu_max; ++cpu_index ) { |
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140 | if ( _Processor_mask_Is_set( targets, cpu_index ) ) { |
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141 | const Per_CPU_Job *job; |
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142 | Per_CPU_Control *cpu; |
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143 | |
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144 | job = &jobs->Jobs[ cpu_index ]; |
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145 | cpu = _Per_CPU_Get_by_index( cpu_index ); |
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146 | |
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147 | while ( |
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148 | _Atomic_Load_ulong( &job->done, ATOMIC_ORDER_ACQUIRE ) |
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149 | != PER_CPU_JOB_DONE |
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150 | ) { |
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151 | switch ( cpu->state ) { |
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152 | case PER_CPU_STATE_INITIAL: |
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153 | case PER_CPU_STATE_READY_TO_START_MULTITASKING: |
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154 | case PER_CPU_STATE_REQUEST_START_MULTITASKING: |
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155 | _CPU_SMP_Processor_event_broadcast(); |
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156 | /* Fall through */ |
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157 | case PER_CPU_STATE_UP: |
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158 | /* |
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159 | * Calling this function with the current processor is intentional. |
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160 | * We have to perform our own jobs here in case inter-processor |
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161 | * interrupts are not working. |
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162 | */ |
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163 | _Per_CPU_Try_perform_jobs( _Per_CPU_Get() ); |
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164 | break; |
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165 | default: |
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166 | _SMP_Fatal( SMP_FATAL_WRONG_CPU_STATE_TO_PERFORM_JOBS ); |
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167 | break; |
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168 | } |
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169 | } |
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170 | } |
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171 | } |
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172 | } |
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173 | |
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174 | void _SMP_Multicast_action( |
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175 | const Processor_mask *targets, |
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176 | SMP_Action_handler handler, |
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177 | void *arg |
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178 | ) |
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179 | { |
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180 | SMP_Multicast_jobs jobs; |
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181 | uint32_t cpu_max; |
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182 | |
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183 | cpu_max = _SMP_Get_processor_maximum(); |
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184 | _Assert( cpu_max <= RTEMS_ARRAY_SIZE( jobs.Jobs ) ); |
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185 | |
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186 | jobs.Context.handler = handler; |
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187 | jobs.Context.arg = arg; |
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188 | |
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189 | _SMP_Issue_action_jobs( targets, &jobs, cpu_max ); |
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190 | _SMP_Wait_for_action_jobs( targets, &jobs, cpu_max ); |
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191 | } |
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192 | |
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193 | void _SMP_Broadcast_action( |
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194 | SMP_Action_handler handler, |
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195 | void *arg |
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196 | ) |
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197 | { |
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198 | _SMP_Multicast_action( _SMP_Get_online_processors(), handler, arg ); |
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199 | } |
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200 | |
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201 | void _SMP_Othercast_action( |
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202 | SMP_Action_handler handler, |
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203 | void *arg |
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204 | ) |
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205 | { |
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206 | Processor_mask targets; |
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207 | |
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208 | _Processor_mask_Assign( &targets, _SMP_Get_online_processors() ); |
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209 | _Processor_mask_Clear( &targets, _SMP_Get_current_processor() ); |
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210 | _SMP_Multicast_action( &targets, handler, arg ); |
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211 | } |
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