1 | /* SPDX-License-Identifier: BSD-2-Clause */ |
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2 | |
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3 | /** |
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4 | * @file |
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5 | * |
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6 | * @ingroup RTEMSScoreSMPBarrier |
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7 | * |
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8 | * @brief This source file contains the implementation of |
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9 | * _SMP_barrier_Wait(). |
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10 | */ |
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11 | |
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12 | /* |
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13 | * Copyright (C) 2013, 2014 embedded brains GmbH & Co. KG |
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14 | * |
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15 | * Redistribution and use in source and binary forms, with or without |
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16 | * modification, are permitted provided that the following conditions |
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17 | * are met: |
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18 | * 1. Redistributions of source code must retain the above copyright |
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19 | * notice, this list of conditions and the following disclaimer. |
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20 | * 2. Redistributions in binary form must reproduce the above copyright |
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21 | * notice, this list of conditions and the following disclaimer in the |
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22 | * documentation and/or other materials provided with the distribution. |
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23 | * |
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24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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27 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE |
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28 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
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29 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
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30 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
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31 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
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32 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
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33 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
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34 | * POSSIBILITY OF SUCH DAMAGE. |
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35 | */ |
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36 | |
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37 | #ifdef HAVE_CONFIG_H |
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38 | #include "config.h" |
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39 | #endif |
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40 | |
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41 | #include <rtems/score/smpbarrier.h> |
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42 | |
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43 | bool _SMP_barrier_Wait( |
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44 | SMP_barrier_Control *control, |
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45 | SMP_barrier_State *state, |
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46 | unsigned int count |
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47 | ) |
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48 | { |
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49 | unsigned int sense = ~state->sense; |
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50 | unsigned int previous_value; |
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51 | bool performed_release; |
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52 | |
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53 | state->sense = sense; |
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54 | |
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55 | previous_value = _Atomic_Fetch_add_uint( |
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56 | &control->value, |
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57 | 1U, |
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58 | ATOMIC_ORDER_RELAXED |
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59 | ); |
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60 | |
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61 | if ( previous_value + 1U == count ) { |
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62 | _Atomic_Store_uint( &control->value, 0U, ATOMIC_ORDER_RELAXED ); |
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63 | _Atomic_Store_uint( &control->sense, sense, ATOMIC_ORDER_RELEASE ); |
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64 | performed_release = true; |
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65 | } else { |
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66 | while ( |
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67 | _Atomic_Load_uint( &control->sense, ATOMIC_ORDER_ACQUIRE ) != sense |
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68 | ) { |
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69 | /* Wait */ |
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70 | } |
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71 | |
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72 | performed_release = false; |
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73 | } |
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74 | |
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75 | return performed_release; |
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76 | } |
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