source: rtems/cpukit/score/src/percpuasm.c @ 57740ce8

4.11
Last change on this file since 57740ce8 was 57740ce8, checked in by Sebastian Huber <sebastian.huber@…>, on Apr 7, 2014 at 12:50:24 PM

score: Clarify CPU port alignment requirements

  • Property mode set to 100644
File size: 2.5 KB
Line 
1/*
2 * Copyright (c) 2012-2014 embedded brains GmbH.  All rights reserved.
3 *
4 *  embedded brains GmbH
5 *  Dornierstr. 4
6 *  82178 Puchheim
7 *  Germany
8 *  <rtems@embedded-brains.de>
9 *
10 * The license and distribution terms for this file may be
11 * found in the file LICENSE in this distribution or at
12 * http://www.rtems.org/license/LICENSE.
13 */
14
15#if HAVE_CONFIG_H
16  #include "config.h"
17#endif
18
19#include <rtems/score/cpu.h>
20
21#define _RTEMS_PERCPU_DEFINE_OFFSETS
22#include <rtems/score/percpu.h>
23
24/*
25 * In case a CPU port needs another alignment, then add this here and make sure
26 * it is a power of two greater than or equal to two.
27 */
28RTEMS_STATIC_ASSERT(
29  CPU_ALIGNMENT == 2
30    || CPU_ALIGNMENT == 4
31    || CPU_ALIGNMENT == 8
32    || CPU_ALIGNMENT == 16
33    || CPU_ALIGNMENT == 32,
34  CPU_ALIGNMENT
35);
36
37/*
38 * In case a CPU port needs another heap alignment, then add this here and make
39 * sure it is a power of two greater than or equal to two.
40 */
41RTEMS_STATIC_ASSERT(
42  CPU_HEAP_ALIGNMENT == 2
43    || CPU_HEAP_ALIGNMENT == 4
44    || CPU_HEAP_ALIGNMENT == 8
45    || CPU_HEAP_ALIGNMENT == 16
46    || CPU_HEAP_ALIGNMENT == 32,
47  CPU_HEAP_ALIGNMENT_0
48);
49
50RTEMS_STATIC_ASSERT(
51  CPU_HEAP_ALIGNMENT >= CPU_ALIGNMENT,
52  CPU_HEAP_ALIGNMENT_1
53);
54
55RTEMS_STATIC_ASSERT(
56  sizeof(void *) == CPU_SIZEOF_POINTER,
57  CPU_SIZEOF_POINTER
58);
59
60#if defined( __SIZEOF_POINTER__ )
61  RTEMS_STATIC_ASSERT(
62    CPU_SIZEOF_POINTER == __SIZEOF_POINTER__,
63    __SIZEOF_POINTER__
64  );
65#endif
66
67RTEMS_STATIC_ASSERT(
68  sizeof( CPU_Per_CPU_control ) == CPU_PER_CPU_CONTROL_SIZE,
69  CPU_PER_CPU_CONTROL_SIZE
70);
71
72#if defined( RTEMS_SMP )
73  RTEMS_STATIC_ASSERT(
74    sizeof( Per_CPU_Control_envelope ) == PER_CPU_CONTROL_SIZE,
75    PER_CPU_CONTROL_SIZE
76  );
77#endif
78
79RTEMS_STATIC_ASSERT(
80  offsetof(Per_CPU_Control, isr_nest_level) == PER_CPU_ISR_NEST_LEVEL,
81  PER_CPU_ISR_NEST_LEVEL
82);
83
84RTEMS_STATIC_ASSERT(
85  offsetof(Per_CPU_Control, thread_dispatch_disable_level)
86    == PER_CPU_THREAD_DISPATCH_DISABLE_LEVEL,
87  PER_CPU_THREAD_DISPATCH_DISABLE_LEVEL
88);
89
90RTEMS_STATIC_ASSERT(
91  offsetof(Per_CPU_Control, dispatch_necessary) == PER_CPU_DISPATCH_NEEDED,
92  PER_CPU_DISPATCH_NEEDED
93);
94
95#if CPU_ALLOCATE_INTERRUPT_STACK == TRUE \
96  || CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE
97  RTEMS_STATIC_ASSERT(
98    offsetof(Per_CPU_Control, interrupt_stack_low)
99      == PER_CPU_INTERRUPT_STACK_LOW,
100    PER_CPU_INTERRUPT_STACK_LOW
101  );
102
103  RTEMS_STATIC_ASSERT(
104    offsetof(Per_CPU_Control, interrupt_stack_high)
105      == PER_CPU_INTERRUPT_STACK_HIGH,
106    PER_CPU_INTERRUPT_STACK_HIGH
107  );
108#endif
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