source: rtems/cpukit/score/src/percpu.c @ 06dcaf0

4.115
Last change on this file since 06dcaf0 was 06dcaf0, checked in by Joel Sherrill <joel.sherrill@…>, on 03/16/11 at 20:05:06

2011-03-16 Jennifer Averett <jennifer.averett@…>

PR 1729/cpukit

  • configure.ac, sapi/include/confdefs.h, sapi/src/exinit.c, score/Makefile.am, score/preinstall.am, score/cpu/i386/rtems/score/cpu.h, score/cpu/sparc/cpu_asm.S, score/cpu/sparc/rtems/score/cpu.h, score/include/rtems/score/basedefs.h, score/include/rtems/score/context.h, score/include/rtems/score/percpu.h, score/src/percpu.c, score/src/thread.c, score/src/threadcreateidle.c: Add next step in SMP support. This adds an allocated array of the Per_CPU structures to support multiple cpus vs a single instance of the structure which is still used if SMP support is disabled. Configuration support is also added to explicitly enable or disable SMP. But SMP can only be enabled for the CPUs which will support it initially -- SPARC and i386. With the stub BSP support, a BSP can be run as a single core SMP system from an RTEMS data structure standpoint.
  • aclocal/check-smp.m4, aclocal/enable-smp.m4, score/include/rtems/bspsmp.h, score/include/rtems/score/smplock.h, score/src/smp.c, score/src/smplock.c: New files.
  • Property mode set to 100644
File size: 1.7 KB
Line 
1/*
2 *  COPYRIGHT (c) 1989-2011.
3 *  On-Line Applications Research Corporation (OAR).
4 *
5 *  The license and distribution terms for this file may be
6 *  found in the file LICENSE in this distribution or at
7 *  http://www.rtems.com/license/LICENSE.
8 *
9 *  $Id$
10 */
11
12#if HAVE_CONFIG_H
13#include "config.h"
14#endif
15
16#include <rtems/system.h>
17#include <rtems/score/thread.h>
18#include <rtems/score/percpu.h>
19#include <rtems/score/wkspace.h>
20#include <rtems/score/wkspace.h>
21#include <rtems/config.h>
22#include <rtems/bspsmp.h>
23#include <string.h>
24
25#if defined(RTEMS_SMP)
26  void _SMP_Handler_initialize(void)
27  {
28    int         cpu;
29    size_t      size;
30    uintptr_t   ptr;
31
32    /*
33     *  Initialize per CPU structures.
34     */
35    size = (_SMP_Processor_count) * sizeof(Per_CPU_Control);
36    memset( _Per_CPU_Information, '\0', size );
37
38    /*
39     *  Initialize per cpu pointer table
40     */
41    size = Configuration.interrupt_stack_size;
42    _Per_CPU_Information_p[0] = &_Per_CPU_Information[0];
43    for (cpu=1 ; cpu < _SMP_Processor_count ; cpu++ ) {
44      Per_CPU_Control *p = &_Per_CPU_Information[cpu];
45
46      _Per_CPU_Information_p[cpu] = p;
47
48      p->interrupt_stack_low = _Workspace_Allocate_or_fatal_error( size );
49
50      ptr = (uintptr_t) _Addresses_Add_offset( p->interrupt_stack_low, size );
51      ptr &= ~CPU_STACK_ALIGNMENT;
52      p->interrupt_stack_high = (void *)ptr;
53      p->state = RTEMS_BSP_SMP_CPU_INITIAL_STATE;
54      RTEMS_COMPILER_MEMORY_BARRIER();
55    }
56  }
57#else
58  /*
59   * On single core systems, we can efficiently directly access a single
60   * statically allocated per cpu structure.  And the fields are initialized
61   * as individual elements just like it has always been done.
62   */
63  Per_CPU_Control _Per_CPU_Information[1];
64#endif
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