1 | /** |
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2 | * @brief Constants and Structures Related with Thread Dispatch |
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3 | */ |
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4 | |
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5 | /* |
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6 | * COPYRIGHT (c) 1989-2009. |
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7 | * On-Line Applications Research Corporation (OAR). |
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8 | * |
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9 | * The license and distribution terms for this file may be |
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10 | * found in the file LICENSE in this distribution or at |
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11 | * http://www.rtems.org/license/LICENSE. |
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12 | */ |
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13 | |
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14 | #ifndef _RTEMS_SCORE_THREADDISPATCH_H |
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15 | #define _RTEMS_SCORE_THREADDISPATCH_H |
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16 | |
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17 | #include <rtems/score/percpu.h> |
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18 | #include <rtems/score/isrlock.h> |
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19 | #include <rtems/score/profiling.h> |
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20 | |
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21 | #ifdef __cplusplus |
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22 | extern "C" { |
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23 | #endif /* __cplusplus */ |
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24 | |
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25 | #if defined(RTEMS_HEAVY_STACK_DEBUG) || \ |
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26 | defined(RTEMS_HEAVY_MALLOC_DEBUG) |
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27 | #define __THREAD_DO_NOT_INLINE_DISABLE_DISPATCH__ |
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28 | #endif |
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29 | |
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30 | #if defined(RTEMS_SMP) || \ |
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31 | (CPU_INLINE_ENABLE_DISPATCH == FALSE) || \ |
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32 | (__RTEMS_DO_NOT_INLINE_THREAD_ENABLE_DISPATCH__ == 1) |
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33 | #define __THREAD_DO_NOT_INLINE_ENABLE_DISPATCH__ |
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34 | #endif |
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35 | |
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36 | /** |
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37 | * @addtogroup ScoreThread |
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38 | * |
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39 | * @{ |
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40 | */ |
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41 | |
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42 | /** |
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43 | * @brief Indicates if the executing thread is inside a thread dispatch |
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44 | * critical section. |
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45 | * |
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46 | * @retval true Thread dispatching is enabled. |
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47 | * @retval false The executing thread is inside a thread dispatch critical |
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48 | * section and dispatching is not allowed. |
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49 | */ |
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50 | RTEMS_INLINE_ROUTINE bool _Thread_Dispatch_is_enabled(void) |
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51 | { |
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52 | bool enabled; |
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53 | |
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54 | #if defined(RTEMS_SMP) |
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55 | ISR_Level level; |
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56 | |
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57 | _ISR_Disable_without_giant( level ); |
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58 | #endif |
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59 | |
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60 | enabled = _Thread_Dispatch_disable_level == 0; |
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61 | |
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62 | #if defined(RTEMS_SMP) |
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63 | _ISR_Enable_without_giant( level ); |
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64 | #endif |
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65 | |
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66 | return enabled; |
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67 | } |
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68 | |
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69 | /** |
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70 | * @brief Gets thread dispatch disable level. |
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71 | * |
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72 | * @return The value of the thread dispatch level. |
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73 | */ |
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74 | RTEMS_INLINE_ROUTINE uint32_t _Thread_Dispatch_get_disable_level(void) |
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75 | { |
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76 | return _Thread_Dispatch_disable_level; |
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77 | } |
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78 | |
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79 | /** |
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80 | * @brief Thread dispatch initialization. |
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81 | * |
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82 | * This routine initializes the thread dispatching subsystem. |
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83 | */ |
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84 | RTEMS_INLINE_ROUTINE void _Thread_Dispatch_initialization( void ) |
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85 | { |
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86 | _Thread_Dispatch_disable_level = 1; |
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87 | } |
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88 | |
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89 | #if defined(RTEMS_SMP) |
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90 | /** |
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91 | * @brief Acquires the giant lock. |
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92 | * |
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93 | * The giant lock is a recursive SMP lock protecting nearly all operating |
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94 | * system services. |
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95 | * |
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96 | * This lock is implicitly acquired in |
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97 | * _Thread_Dispatch_increment_disable_level(). |
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98 | * |
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99 | * Thread dispatching must be disabled before the Giant lock can be acquired |
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100 | * and must no be enabled while owning the Giant lock. The thread dispatch |
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101 | * disable level is not altered by this function. |
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102 | * |
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103 | * @param[in] cpu_self The current processor. |
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104 | */ |
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105 | void _Giant_Acquire( Per_CPU_Control *cpu_self ); |
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106 | |
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107 | /** |
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108 | * @brief Releases the giant lock. |
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109 | * |
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110 | * This lock is implicitly released in |
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111 | * _Thread_Dispatch_decrement_disable_level(). |
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112 | * |
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113 | * The thread dispatch disable level is not altered by this function. |
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114 | * |
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115 | * @param[in] cpu_self The current processor. |
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116 | */ |
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117 | void _Giant_Release( Per_CPU_Control *cpu_self ); |
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118 | |
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119 | /** |
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120 | * @brief Releases the giant lock completely if held by the executing processor. |
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121 | * |
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122 | * The thread dispatch disable level is not altered by this function. |
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123 | * |
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124 | * The only use case for this operation is in _SMP_Request_shutdown(). |
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125 | * |
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126 | * @param[in] cpu_self The current processor. |
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127 | */ |
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128 | void _Giant_Drop( Per_CPU_Control *cpu_self ); |
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129 | |
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130 | /** |
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131 | * @brief Increments the thread dispatch level. |
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132 | * |
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133 | * This rountine increments the thread dispatch level |
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134 | */ |
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135 | uint32_t _Thread_Dispatch_increment_disable_level(void); |
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136 | |
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137 | /** |
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138 | * @brief Decrements the thread dispatch level. |
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139 | * |
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140 | * This routine decrements the thread dispatch level. |
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141 | */ |
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142 | uint32_t _Thread_Dispatch_decrement_disable_level(void); |
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143 | #else /* RTEMS_SMP */ |
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144 | /** |
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145 | * @brief Increase thread dispatch disable level. |
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146 | * |
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147 | * This rountine increments the thread dispatch level |
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148 | */ |
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149 | RTEMS_INLINE_ROUTINE uint32_t _Thread_Dispatch_increment_disable_level(void) |
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150 | { |
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151 | uint32_t disable_level = _Thread_Dispatch_disable_level; |
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152 | #if defined( RTEMS_PROFILING ) |
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153 | ISR_Level level; |
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154 | |
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155 | _ISR_Disable( level ); |
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156 | _Profiling_Thread_dispatch_disable( _Per_CPU_Get(), disable_level ); |
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157 | #endif |
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158 | |
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159 | ++disable_level; |
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160 | _Thread_Dispatch_disable_level = disable_level; |
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161 | |
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162 | #if defined( RTEMS_PROFILING ) |
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163 | _ISR_Enable( level ); |
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164 | #endif |
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165 | |
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166 | return disable_level; |
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167 | } |
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168 | |
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169 | /** |
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170 | * @brief Decrease thread dispatch disable level. |
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171 | * |
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172 | * This routine decrements the thread dispatch level. |
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173 | */ |
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174 | RTEMS_INLINE_ROUTINE uint32_t _Thread_Dispatch_decrement_disable_level(void) |
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175 | { |
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176 | uint32_t disable_level = _Thread_Dispatch_disable_level; |
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177 | #if defined( RTEMS_PROFILING ) |
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178 | ISR_Level level; |
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179 | |
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180 | _ISR_Disable( level ); |
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181 | #endif |
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182 | |
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183 | --disable_level; |
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184 | _Thread_Dispatch_disable_level = disable_level; |
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185 | |
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186 | #if defined( RTEMS_PROFILING ) |
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187 | _Profiling_Thread_dispatch_enable( _Per_CPU_Get(), disable_level ); |
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188 | _ISR_Enable( level ); |
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189 | #endif |
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190 | |
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191 | return disable_level; |
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192 | } |
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193 | |
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194 | RTEMS_INLINE_ROUTINE void _Giant_Acquire( Per_CPU_Control *cpu_self ) |
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195 | { |
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196 | (void) cpu_self; |
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197 | } |
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198 | |
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199 | RTEMS_INLINE_ROUTINE void _Giant_Release( Per_CPU_Control *cpu_self ) |
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200 | { |
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201 | (void) cpu_self; |
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202 | } |
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203 | #endif /* RTEMS_SMP */ |
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204 | |
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205 | /** |
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206 | * @brief Performs a thread dispatch if necessary. |
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207 | * |
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208 | * This routine is responsible for transferring control of the processor from |
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209 | * the executing thread to the heir thread. Once the heir is running an |
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210 | * attempt is made to run the pending post-switch thread actions. |
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211 | * |
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212 | * As part of this process, it is responsible for the following actions |
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213 | * - update timing information of the executing thread, |
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214 | * - save the context of the executing thread, |
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215 | * - invokation of the thread switch user extensions, |
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216 | * - restore the context of the heir thread, and |
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217 | * - run of pending post-switch thread actions of the resulting executing |
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218 | * thread. |
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219 | * |
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220 | * On entry the thread dispatch level must be equal to zero. |
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221 | */ |
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222 | void _Thread_Dispatch( void ); |
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223 | |
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224 | /** |
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225 | * @brief Performs a thread dispatch on the current processor. |
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226 | * |
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227 | * On entry the thread dispatch disable level must be equal to one and |
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228 | * interrupts must be disabled. |
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229 | * |
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230 | * This function assumes that a thread dispatch is necessary. |
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231 | * |
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232 | * @param[in] cpu_self The current processor. |
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233 | * @param[in] level The previous interrupt level. |
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234 | * |
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235 | * @see _Thread_Dispatch(). |
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236 | */ |
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237 | void _Thread_Do_dispatch( Per_CPU_Control *cpu_self, ISR_Level level ); |
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238 | |
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239 | /** |
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240 | * @brief Disables thread dispatching inside a critical section (interrupts |
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241 | * disabled). |
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242 | * |
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243 | * This function does not acquire the Giant lock. |
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244 | * |
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245 | * @param[in] lock_context The lock context of the corresponding |
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246 | * _ISR_lock_ISR_disable() that started the critical section. |
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247 | * |
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248 | * @return The current processor. |
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249 | */ |
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250 | RTEMS_INLINE_ROUTINE Per_CPU_Control *_Thread_Dispatch_disable_critical( |
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251 | const ISR_lock_Context *lock_context |
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252 | ) |
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253 | { |
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254 | Per_CPU_Control *cpu_self; |
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255 | uint32_t disable_level; |
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256 | |
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257 | cpu_self = _Per_CPU_Get(); |
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258 | disable_level = cpu_self->thread_dispatch_disable_level; |
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259 | _Profiling_Thread_dispatch_disable_critical( |
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260 | cpu_self, |
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261 | disable_level, |
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262 | lock_context |
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263 | ); |
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264 | cpu_self->thread_dispatch_disable_level = disable_level + 1; |
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265 | |
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266 | return cpu_self; |
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267 | } |
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268 | |
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269 | /** |
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270 | * @brief Disables thread dispatching. |
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271 | * |
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272 | * This function does not acquire the Giant lock. |
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273 | * |
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274 | * @return The current processor. |
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275 | */ |
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276 | RTEMS_INLINE_ROUTINE Per_CPU_Control *_Thread_Dispatch_disable( void ) |
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277 | { |
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278 | Per_CPU_Control *cpu_self; |
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279 | ISR_lock_Context lock_context; |
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280 | |
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281 | #if defined( RTEMS_SMP ) || defined( RTEMS_PROFILING ) |
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282 | _ISR_lock_ISR_disable( &lock_context ); |
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283 | #endif |
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284 | |
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285 | cpu_self = _Thread_Dispatch_disable_critical( &lock_context ); |
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286 | |
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287 | #if defined( RTEMS_SMP ) || defined( RTEMS_PROFILING ) |
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288 | _ISR_lock_ISR_enable( &lock_context ); |
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289 | #endif |
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290 | |
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291 | return cpu_self; |
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292 | } |
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293 | |
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294 | /** |
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295 | * @brief Enables thread dispatching. |
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296 | * |
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297 | * May perfrom a thread dispatch if necessary as a side-effect. |
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298 | * |
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299 | * This function does not release the Giant lock. |
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300 | * |
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301 | * @param[in] cpu_self The current processor. |
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302 | */ |
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303 | RTEMS_INLINE_ROUTINE void _Thread_Dispatch_enable( Per_CPU_Control *cpu_self ) |
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304 | { |
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305 | uint32_t disable_level = cpu_self->thread_dispatch_disable_level; |
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306 | |
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307 | if ( disable_level == 1 ) { |
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308 | ISR_Level level; |
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309 | |
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310 | _ISR_Disable_without_giant( level ); |
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311 | |
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312 | if ( cpu_self->dispatch_necessary ) { |
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313 | _Thread_Do_dispatch( cpu_self, level ); |
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314 | } else { |
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315 | cpu_self->thread_dispatch_disable_level = 0; |
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316 | _Profiling_Thread_dispatch_enable( cpu_self, 0 ); |
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317 | _ISR_Enable_without_giant( level ); |
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318 | } |
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319 | } else { |
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320 | cpu_self->thread_dispatch_disable_level = disable_level - 1; |
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321 | } |
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322 | } |
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323 | |
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324 | /** |
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325 | * @brief Disables thread dispatching and acquires the Giant lock. |
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326 | */ |
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327 | #if defined ( __THREAD_DO_NOT_INLINE_DISABLE_DISPATCH__ ) |
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328 | void _Thread_Disable_dispatch( void ); |
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329 | #else |
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330 | RTEMS_INLINE_ROUTINE void _Thread_Disable_dispatch( void ) |
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331 | { |
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332 | _Thread_Dispatch_increment_disable_level(); |
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333 | RTEMS_COMPILER_MEMORY_BARRIER(); |
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334 | } |
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335 | #endif |
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336 | |
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337 | RTEMS_INLINE_ROUTINE void _Thread_Enable_dispatch_body( void ) |
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338 | { |
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339 | Per_CPU_Control *cpu_self = _Per_CPU_Get(); |
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340 | |
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341 | _Giant_Release( cpu_self ); |
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342 | _Thread_Dispatch_enable( cpu_self ); |
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343 | } |
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344 | |
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345 | /** |
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346 | * @brief Enables thread dispatching and releases the Giant lock. |
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347 | * |
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348 | * May perfrom a thread dispatch if necessary as a side-effect. |
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349 | */ |
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350 | #if defined ( __THREAD_DO_NOT_INLINE_ENABLE_DISPATCH__ ) |
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351 | void _Thread_Enable_dispatch( void ); |
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352 | #else |
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353 | /* inlining of enable dispatching must be true */ |
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354 | RTEMS_INLINE_ROUTINE void _Thread_Enable_dispatch( void ) |
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355 | { |
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356 | RTEMS_COMPILER_MEMORY_BARRIER(); |
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357 | _Thread_Enable_dispatch_body(); |
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358 | } |
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359 | #endif |
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360 | |
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361 | /** |
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362 | * @brief Enables thread dispatching and releases the Giant lock. |
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363 | * |
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364 | * @warning A thread dispatch is not performed as a side-effect. Use this |
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365 | * function with |
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366 | */ |
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367 | RTEMS_INLINE_ROUTINE void _Thread_Unnest_dispatch( void ) |
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368 | { |
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369 | RTEMS_COMPILER_MEMORY_BARRIER(); |
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370 | _Thread_Dispatch_decrement_disable_level(); |
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371 | } |
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372 | |
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373 | /** @} */ |
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374 | |
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375 | #ifdef __cplusplus |
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376 | } |
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377 | #endif /* __cplusplus */ |
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378 | |
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379 | #endif /* _RTEMS_SCORE_THREADDISPATCH_H */ |
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