source: rtems/cpukit/score/include/rtems/score/smpbarrier.h @ 7e119990

4.115
Last change on this file since 7e119990 was c499856, checked in by Chris Johns <chrisj@…>, on 03/20/14 at 21:10:47

Change all references of rtems.com to rtems.org.

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1/**
2 * @file
3 *
4 * @ingroup ScoreSMPBarrier
5 *
6 * @brief SMP Barrier API
7 */
8
9/*
10 * Copyright (c) 2013-2014 embedded brains GmbH.  All rights reserved.
11 *
12 *  embedded brains GmbH
13 *  Dornierstr. 4
14 *  82178 Puchheim
15 *  Germany
16 *  <rtems@embedded-brains.de>
17 *
18 * The license and distribution terms for this file may be
19 * found in the file LICENSE in this distribution or at
20 * http://www.rtems.org/license/LICENSE.
21 */
22
23#ifndef _RTEMS_SCORE_SMPBARRIER_H
24#define _RTEMS_SCORE_SMPBARRIER_H
25
26#include <rtems/score/cpuopts.h>
27
28#if defined( RTEMS_SMP )
29
30#include <rtems/score/atomic.h>
31
32#ifdef __cplusplus
33extern "C" {
34#endif /* __cplusplus */
35
36/**
37 * @defgroup ScoreSMPBarrier SMP Barriers
38 *
39 * @ingroup Score
40 *
41 * @brief The SMP barrier provides barrier synchronization for SMP systems at
42 * the lowest level.
43 *
44 * The SMP barrier is implemented as a sense barrier, see also Herlihy and
45 * Shavit, "The Art of Multiprocessor Programming", 17.3 Sense-Reversing
46 * Barrier.
47 *
48 * @{
49 */
50
51/**
52 * @brief SMP barrier control.
53 */
54typedef struct {
55  Atomic_Uint value;
56  Atomic_Uint sense;
57} SMP_barrier_Control;
58
59/**
60 * @brief SMP barrier per-thread state.
61 *
62 * Each user of the barrier must provide this per-thread state.
63 */
64typedef struct {
65  unsigned int sense;
66} SMP_barrier_State;
67
68/**
69 * @brief SMP barrier control initializer for static initialization.
70 */
71#define SMP_BARRIER_CONTROL_INITIALIZER \
72  { ATOMIC_INITIALIZER_UINT( 0U ), ATOMIC_INITIALIZER_UINT( 0U ) }
73
74/**
75 * @brief SMP barrier per-thread state initializer for static initialization.
76 */
77#define SMP_BARRIER_STATE_INITIALIZER { 0U }
78
79/**
80 * @brief Initializes a SMP barrier control.
81 *
82 * Concurrent initialization leads to unpredictable results.
83 *
84 * @param[out] control The SMP barrier control.
85 */
86static inline void _SMP_barrier_Control_initialize(
87  SMP_barrier_Control *control
88)
89{
90  _Atomic_Init_uint( &control->value, 0U );
91  _Atomic_Init_uint( &control->sense, 0U );
92}
93
94/**
95 * @brief Initializes a SMP barrier per-thread state.
96 *
97 * @param[out] state The SMP barrier control.
98 */
99static inline void _SMP_barrier_State_initialize(
100  SMP_barrier_State *state
101)
102{
103  state->sense = 0U;
104}
105
106/**
107 * @brief Waits on the SMP barrier until count threads rendezvoused.
108 *
109 * @param[in, out] control The SMP barrier control.
110 * @param[in, out] state The SMP barrier per-thread state.
111 * @param[in] count The thread count bound to rendezvous.
112 */
113void _SMP_barrier_Wait(
114  SMP_barrier_Control *control,
115  SMP_barrier_State *state,
116  unsigned int count
117);
118
119/**@}*/
120
121#ifdef __cplusplus
122}
123#endif /* __cplusplus */
124
125#endif /* defined( RTEMS_SMP ) */
126
127#endif /* _RTEMS_SCORE_SMPBARRIER_H */
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