source: rtems/cpukit/score/include/rtems/score/isrlock.h @ d50acdbb

4.115
Last change on this file since d50acdbb was d50acdbb, checked in by Sebastian Huber <sebastian.huber@…>, on 03/10/14 at 07:25:32

score: Add local context to SMP lock API

Add a local context structure to the SMP lock API for acquire and
release pairs. This context can be used to store the ISR level and
profiling information. It may be later used to enable more
sophisticated lock algorithms, e.g. MCS locks.

There is only one lock that cannot be used with a local context. This
is the per-CPU lock since here we would have to transfer the local
context through a context switch which is very complicated.

  • Property mode set to 100644
File size: 4.6 KB
Line 
1/**
2 * @file
3 *
4 * @ingroup ScoreISRLocks
5 *
6 * @brief ISR Locks
7 */
8
9/*
10 * Copyright (c) 2013 embedded brains GmbH.  All rights reserved.
11 *
12 *  embedded brains GmbH
13 *  Dornierstr. 4
14 *  82178 Puchheim
15 *  Germany
16 *  <rtems@embedded-brains.de>
17 *
18 * The license and distribution terms for this file may be
19 * found in the file LICENSE in this distribution or at
20 * http://www.rtems.com/license/LICENSE.
21 */
22
23#ifndef _RTEMS_SCORE_ISR_LOCK_H
24#define _RTEMS_SCORE_ISR_LOCK_H
25
26#include <rtems/score/isrlevel.h>
27#include <rtems/score/smplock.h>
28
29#ifdef __cplusplus
30extern "C" {
31#endif
32
33/**
34 * @defgroup ScoreISRLocks ISR Locks
35 *
36 * @ingroup ScoreISR
37 *
38 * @brief Low-level lock to protect critical sections accessed by threads and
39 * interrupt service routines.
40 *
41 * On single processor configurations the ISR locks degrade to simple ISR
42 * disable/enable sequences.  No additional storage or objects are required.
43 *
44 * This synchronization primitive is supported on SMP configurations.  Here SMP
45 * locks are used.
46 *
47 * @{
48 */
49
50/**
51 * @brief ISR lock control.
52 */
53typedef struct {
54#if defined( RTEMS_SMP )
55  SMP_lock_Control lock;
56#endif
57} ISR_lock_Control;
58
59/**
60 * @brief Local ISR lock context for acquire and release pairs.
61 */
62typedef struct {
63#if defined( RTEMS_SMP )
64  SMP_lock_Context lock_context;
65#else
66  ISR_Level isr_level;
67#endif
68} ISR_lock_Context;
69
70/**
71 * @brief Initializer for static initialization of ISR locks.
72 */
73#if defined( RTEMS_SMP )
74  #define ISR_LOCK_INITIALIZER \
75    { SMP_LOCK_INITIALIZER }
76#else
77  #define ISR_LOCK_INITIALIZER \
78    { }
79#endif
80
81/**
82 * @brief Initializes an ISR lock.
83 *
84 * Concurrent initialization leads to unpredictable results.
85 *
86 * @param[in,out] lock The ISR lock control.
87 */
88static inline void _ISR_lock_Initialize( ISR_lock_Control *lock )
89{
90#if defined( RTEMS_SMP )
91  _SMP_lock_Initialize( &lock->lock );
92#else
93  (void) lock;
94#endif
95}
96
97/**
98 * @brief Acquires an ISR lock.
99 *
100 * Interrupts will be disabled.  On SMP configurations this function acquires
101 * an SMP lock.
102 *
103 * This function can be used in thread and interrupt context.
104 *
105 * @param[in,out] lock The ISR lock control.
106 * @param[in,out] context The local ISR lock context for an acquire and release
107 * pair.
108 *
109 * @see _ISR_lock_Release_and_ISR_enable().
110 */
111static inline void _ISR_lock_ISR_disable_and_acquire(
112  ISR_lock_Control *lock,
113  ISR_lock_Context *context
114)
115{
116#if defined( RTEMS_SMP )
117  _SMP_lock_ISR_disable_and_acquire( &lock->lock, &context->lock_context );
118#else
119  (void) lock;
120  _ISR_Disable( context->isr_level );
121#endif
122}
123
124/**
125 * @brief Releases an ISR lock.
126 *
127 * The interrupt status will be restored.  On SMP configurations this function
128 * releases an SMP lock.
129 *
130 * This function can be used in thread and interrupt context.
131 *
132 * @param[in,out] lock The ISR lock control.
133 * @param[in,out] context The local ISR lock context for an acquire and release
134 * pair.
135 *
136 * @see _ISR_lock_ISR_disable_and_acquire().
137 */
138static inline void _ISR_lock_Release_and_ISR_enable(
139  ISR_lock_Control *lock,
140  ISR_lock_Context *context
141)
142{
143#if defined( RTEMS_SMP )
144  _SMP_lock_Release_and_ISR_enable( &lock->lock, &context->lock_context );
145#else
146  (void) lock;
147  _ISR_Enable( context->isr_level );
148#endif
149}
150
151/**
152 * @brief Acquires an ISR lock inside an ISR disabled section.
153 *
154 * The interrupt status will remain unchanged.  On SMP configurations this
155 * function acquires an SMP lock.
156 *
157 * In case the executing context can be interrupted by higher priority
158 * interrupts and these interrupts enter the critical section protected by this
159 * lock, then the result is unpredictable.
160 *
161 * @param[in,out] lock The ISR lock control.
162 * @param[in,out] context The local ISR lock context for an acquire and release
163 * pair.
164 *
165 * @see _ISR_lock_Release().
166 */
167static inline void _ISR_lock_Acquire(
168  ISR_lock_Control *lock,
169  ISR_lock_Context *context
170)
171{
172#if defined( RTEMS_SMP )
173  _SMP_lock_Acquire( &lock->lock, &context->lock_context );
174#else
175  (void) lock;
176  (void) context;
177#endif
178}
179
180/**
181 * @brief Releases an ISR lock inside an ISR disabled section.
182 *
183 * The interrupt status will remain unchanged.  On SMP configurations this
184 * function releases an SMP lock.
185 *
186 * @param[in,out] lock The ISR lock control.
187 * @param[in,out] context The local ISR lock context for an acquire and release
188 * pair.
189 *
190 * @see _ISR_lock_Acquire().
191 */
192static inline void _ISR_lock_Release(
193  ISR_lock_Control *lock,
194  ISR_lock_Context *context
195)
196{
197#if defined( RTEMS_SMP )
198  _SMP_lock_Release( &lock->lock, &context->lock_context );
199#else
200  (void) lock;
201  (void) context;
202#endif
203}
204
205/** @} */
206
207#ifdef __cplusplus
208}
209#endif
210
211#endif /* _RTEMS_SCORE_ISR_LOCK_H */
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