source: rtems/cpukit/score/include/rtems/score/isrlock.h @ c499856

4.11
Last change on this file since c499856 was c499856, checked in by Chris Johns <chrisj@…>, on Mar 20, 2014 at 9:10:47 PM

Change all references of rtems.com to rtems.org.

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1/**
2 * @file
3 *
4 * @ingroup ScoreISRLocks
5 *
6 * @brief ISR Locks
7 */
8
9/*
10 * Copyright (c) 2013 embedded brains GmbH.  All rights reserved.
11 *
12 *  embedded brains GmbH
13 *  Dornierstr. 4
14 *  82178 Puchheim
15 *  Germany
16 *  <rtems@embedded-brains.de>
17 *
18 * The license and distribution terms for this file may be
19 * found in the file LICENSE in this distribution or at
20 * http://www.rtems.org/license/LICENSE.
21 */
22
23#ifndef _RTEMS_SCORE_ISR_LOCK_H
24#define _RTEMS_SCORE_ISR_LOCK_H
25
26#include <rtems/score/isrlevel.h>
27#include <rtems/score/smplock.h>
28
29#ifdef __cplusplus
30extern "C" {
31#endif
32
33/**
34 * @defgroup ScoreISRLocks ISR Locks
35 *
36 * @ingroup ScoreISR
37 *
38 * @brief Low-level lock to protect critical sections accessed by threads and
39 * interrupt service routines.
40 *
41 * On single processor configurations the ISR locks degrade to simple ISR
42 * disable/enable sequences.  No additional storage or objects are required.
43 *
44 * This synchronization primitive is supported on SMP configurations.  Here SMP
45 * locks are used.
46 *
47 * @{
48 */
49
50/**
51 * @brief ISR lock control.
52 */
53typedef struct {
54#if defined( RTEMS_SMP )
55  SMP_lock_Control lock;
56#endif
57} ISR_lock_Control;
58
59/**
60 * @brief Local ISR lock context for acquire and release pairs.
61 */
62typedef struct {
63#if defined( RTEMS_SMP )
64  SMP_lock_Context lock_context;
65#else
66  ISR_Level isr_level;
67#endif
68} ISR_lock_Context;
69
70/**
71 * @brief Initializer for static initialization of ISR locks.
72 */
73#if defined( RTEMS_SMP )
74  #define ISR_LOCK_INITIALIZER( name ) \
75    { SMP_LOCK_INITIALIZER( name ) }
76#else
77  #define ISR_LOCK_INITIALIZER( name ) \
78    { }
79#endif
80
81/**
82 * @brief Initializes an ISR lock.
83 *
84 * Concurrent initialization leads to unpredictable results.
85 *
86 * @param[in,out] lock The ISR lock control.
87 * @param[in] name The name for the ISR lock.  This name must be persistent
88 * throughout the life time of this lock.
89 */
90static inline void _ISR_lock_Initialize(
91  ISR_lock_Control *lock,
92  const char *name
93)
94{
95#if defined( RTEMS_SMP )
96  _SMP_lock_Initialize( &lock->lock, name );
97#else
98  (void) lock;
99  (void) name;
100#endif
101}
102
103/**
104 * @brief Destroys an ISR lock.
105 *
106 * Concurrent destruction leads to unpredictable results.
107 *
108 * @param[in,out] lock The ISR lock control.
109 */
110static inline void _ISR_lock_Destroy( ISR_lock_Control *lock )
111{
112#if defined( RTEMS_SMP )
113  _SMP_lock_Destroy( &lock->lock );
114#else
115  (void) lock;
116#endif
117}
118
119/**
120 * @brief Acquires an ISR lock.
121 *
122 * Interrupts will be disabled.  On SMP configurations this function acquires
123 * an SMP lock.
124 *
125 * This function can be used in thread and interrupt context.
126 *
127 * @param[in,out] lock The ISR lock control.
128 * @param[in,out] context The local ISR lock context for an acquire and release
129 * pair.
130 *
131 * @see _ISR_lock_Release_and_ISR_enable().
132 */
133static inline void _ISR_lock_ISR_disable_and_acquire(
134  ISR_lock_Control *lock,
135  ISR_lock_Context *context
136)
137{
138#if defined( RTEMS_SMP )
139  _SMP_lock_ISR_disable_and_acquire( &lock->lock, &context->lock_context );
140#else
141  (void) lock;
142  _ISR_Disable( context->isr_level );
143#endif
144}
145
146/**
147 * @brief Releases an ISR lock.
148 *
149 * The interrupt status will be restored.  On SMP configurations this function
150 * releases an SMP lock.
151 *
152 * This function can be used in thread and interrupt context.
153 *
154 * @param[in,out] lock The ISR lock control.
155 * @param[in,out] context The local ISR lock context for an acquire and release
156 * pair.
157 *
158 * @see _ISR_lock_ISR_disable_and_acquire().
159 */
160static inline void _ISR_lock_Release_and_ISR_enable(
161  ISR_lock_Control *lock,
162  ISR_lock_Context *context
163)
164{
165#if defined( RTEMS_SMP )
166  _SMP_lock_Release_and_ISR_enable( &lock->lock, &context->lock_context );
167#else
168  (void) lock;
169  _ISR_Enable( context->isr_level );
170#endif
171}
172
173/**
174 * @brief Acquires an ISR lock inside an ISR disabled section.
175 *
176 * The interrupt status will remain unchanged.  On SMP configurations this
177 * function acquires an SMP lock.
178 *
179 * In case the executing context can be interrupted by higher priority
180 * interrupts and these interrupts enter the critical section protected by this
181 * lock, then the result is unpredictable.
182 *
183 * @param[in,out] lock The ISR lock control.
184 * @param[in,out] context The local ISR lock context for an acquire and release
185 * pair.
186 *
187 * @see _ISR_lock_Release().
188 */
189static inline void _ISR_lock_Acquire(
190  ISR_lock_Control *lock,
191  ISR_lock_Context *context
192)
193{
194#if defined( RTEMS_SMP )
195  _SMP_lock_Acquire( &lock->lock, &context->lock_context );
196#else
197  (void) lock;
198  (void) context;
199#endif
200}
201
202/**
203 * @brief Releases an ISR lock inside an ISR disabled section.
204 *
205 * The interrupt status will remain unchanged.  On SMP configurations this
206 * function releases an SMP lock.
207 *
208 * @param[in,out] lock The ISR lock control.
209 * @param[in,out] context The local ISR lock context for an acquire and release
210 * pair.
211 *
212 * @see _ISR_lock_Acquire().
213 */
214static inline void _ISR_lock_Release(
215  ISR_lock_Control *lock,
216  ISR_lock_Context *context
217)
218{
219#if defined( RTEMS_SMP )
220  _SMP_lock_Release( &lock->lock, &context->lock_context );
221#else
222  (void) lock;
223  (void) context;
224#endif
225}
226
227/** @} */
228
229#ifdef __cplusplus
230}
231#endif
232
233#endif /* _RTEMS_SCORE_ISR_LOCK_H */
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