source: rtems/cpukit/score/include/rtems/score/isrlock.h @ 28779c7

4.11
Last change on this file since 28779c7 was 28779c7, checked in by Sebastian Huber <sebastian.huber@…>, on Mar 7, 2014 at 11:53:41 AM

score: Add function to destroy SMP locks

  • Property mode set to 100644
File size: 4.9 KB
Line 
1/**
2 * @file
3 *
4 * @ingroup ScoreISRLocks
5 *
6 * @brief ISR Locks
7 */
8
9/*
10 * Copyright (c) 2013 embedded brains GmbH.  All rights reserved.
11 *
12 *  embedded brains GmbH
13 *  Dornierstr. 4
14 *  82178 Puchheim
15 *  Germany
16 *  <rtems@embedded-brains.de>
17 *
18 * The license and distribution terms for this file may be
19 * found in the file LICENSE in this distribution or at
20 * http://www.rtems.com/license/LICENSE.
21 */
22
23#ifndef _RTEMS_SCORE_ISR_LOCK_H
24#define _RTEMS_SCORE_ISR_LOCK_H
25
26#include <rtems/score/isrlevel.h>
27#include <rtems/score/smplock.h>
28
29#ifdef __cplusplus
30extern "C" {
31#endif
32
33/**
34 * @defgroup ScoreISRLocks ISR Locks
35 *
36 * @ingroup ScoreISR
37 *
38 * @brief Low-level lock to protect critical sections accessed by threads and
39 * interrupt service routines.
40 *
41 * On single processor configurations the ISR locks degrade to simple ISR
42 * disable/enable sequences.  No additional storage or objects are required.
43 *
44 * This synchronization primitive is supported on SMP configurations.  Here SMP
45 * locks are used.
46 *
47 * @{
48 */
49
50/**
51 * @brief ISR lock control.
52 */
53typedef struct {
54#if defined( RTEMS_SMP )
55  SMP_lock_Control lock;
56#endif
57} ISR_lock_Control;
58
59/**
60 * @brief Local ISR lock context for acquire and release pairs.
61 */
62typedef struct {
63#if defined( RTEMS_SMP )
64  SMP_lock_Context lock_context;
65#else
66  ISR_Level isr_level;
67#endif
68} ISR_lock_Context;
69
70/**
71 * @brief Initializer for static initialization of ISR locks.
72 */
73#if defined( RTEMS_SMP )
74  #define ISR_LOCK_INITIALIZER \
75    { SMP_LOCK_INITIALIZER }
76#else
77  #define ISR_LOCK_INITIALIZER \
78    { }
79#endif
80
81/**
82 * @brief Initializes an ISR lock.
83 *
84 * Concurrent initialization leads to unpredictable results.
85 *
86 * @param[in,out] lock The ISR lock control.
87 */
88static inline void _ISR_lock_Initialize( ISR_lock_Control *lock )
89{
90#if defined( RTEMS_SMP )
91  _SMP_lock_Initialize( &lock->lock );
92#else
93  (void) lock;
94#endif
95}
96
97/**
98 * @brief Destroys an ISR lock.
99 *
100 * Concurrent destruction leads to unpredictable results.
101 *
102 * @param[in,out] lock The ISR lock control.
103 */
104static inline void _ISR_lock_Destroy( ISR_lock_Control *lock )
105{
106#if defined( RTEMS_SMP )
107  _SMP_lock_Destroy( &lock->lock );
108#else
109  (void) lock;
110#endif
111}
112
113/**
114 * @brief Acquires an ISR lock.
115 *
116 * Interrupts will be disabled.  On SMP configurations this function acquires
117 * an SMP lock.
118 *
119 * This function can be used in thread and interrupt context.
120 *
121 * @param[in,out] lock The ISR lock control.
122 * @param[in,out] context The local ISR lock context for an acquire and release
123 * pair.
124 *
125 * @see _ISR_lock_Release_and_ISR_enable().
126 */
127static inline void _ISR_lock_ISR_disable_and_acquire(
128  ISR_lock_Control *lock,
129  ISR_lock_Context *context
130)
131{
132#if defined( RTEMS_SMP )
133  _SMP_lock_ISR_disable_and_acquire( &lock->lock, &context->lock_context );
134#else
135  (void) lock;
136  _ISR_Disable( context->isr_level );
137#endif
138}
139
140/**
141 * @brief Releases an ISR lock.
142 *
143 * The interrupt status will be restored.  On SMP configurations this function
144 * releases an SMP lock.
145 *
146 * This function can be used in thread and interrupt context.
147 *
148 * @param[in,out] lock The ISR lock control.
149 * @param[in,out] context The local ISR lock context for an acquire and release
150 * pair.
151 *
152 * @see _ISR_lock_ISR_disable_and_acquire().
153 */
154static inline void _ISR_lock_Release_and_ISR_enable(
155  ISR_lock_Control *lock,
156  ISR_lock_Context *context
157)
158{
159#if defined( RTEMS_SMP )
160  _SMP_lock_Release_and_ISR_enable( &lock->lock, &context->lock_context );
161#else
162  (void) lock;
163  _ISR_Enable( context->isr_level );
164#endif
165}
166
167/**
168 * @brief Acquires an ISR lock inside an ISR disabled section.
169 *
170 * The interrupt status will remain unchanged.  On SMP configurations this
171 * function acquires an SMP lock.
172 *
173 * In case the executing context can be interrupted by higher priority
174 * interrupts and these interrupts enter the critical section protected by this
175 * lock, then the result is unpredictable.
176 *
177 * @param[in,out] lock The ISR lock control.
178 * @param[in,out] context The local ISR lock context for an acquire and release
179 * pair.
180 *
181 * @see _ISR_lock_Release().
182 */
183static inline void _ISR_lock_Acquire(
184  ISR_lock_Control *lock,
185  ISR_lock_Context *context
186)
187{
188#if defined( RTEMS_SMP )
189  _SMP_lock_Acquire( &lock->lock, &context->lock_context );
190#else
191  (void) lock;
192  (void) context;
193#endif
194}
195
196/**
197 * @brief Releases an ISR lock inside an ISR disabled section.
198 *
199 * The interrupt status will remain unchanged.  On SMP configurations this
200 * function releases an SMP lock.
201 *
202 * @param[in,out] lock The ISR lock control.
203 * @param[in,out] context The local ISR lock context for an acquire and release
204 * pair.
205 *
206 * @see _ISR_lock_Acquire().
207 */
208static inline void _ISR_lock_Release(
209  ISR_lock_Control *lock,
210  ISR_lock_Context *context
211)
212{
213#if defined( RTEMS_SMP )
214  _SMP_lock_Release( &lock->lock, &context->lock_context );
215#else
216  (void) lock;
217  (void) context;
218#endif
219}
220
221/** @} */
222
223#ifdef __cplusplus
224}
225#endif
226
227#endif /* _RTEMS_SCORE_ISR_LOCK_H */
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