source: rtems/cpukit/score/include/rtems/score/cpustdatomic.h @ 4e3d9a4d

4.11
Last change on this file since 4e3d9a4d was 4e3d9a4d, checked in by Sebastian Huber <sebastian.huber@…>, on Feb 18, 2015 at 4:46:37 PM

score: Make <rtems/score/atomic.h> available

Make <rtems/score/atomic.h> available for all RTEMS configurations. Use
inline functions instead of macros. Use ISR disable/enable on
uni-processor configurations to ensure atomicity.

Update #2273.

  • Property mode set to 100644
File size: 16.6 KB
Line 
1/**
2 * @file
3 *
4 * @brief Atomic Operations CPU API
5 */
6
7/*
8 * COPYRIGHT (c) 2013 Deng Hengyi.
9 * Copyright (c) 2015 embedded brains GmbH.
10 *
11 * The license and distribution terms for this file may be
12 * found in the file LICENSE in this distribution or at
13 * http://www.rtems.org/license/LICENSE.
14 */
15
16#ifndef _RTEMS_SCORE_CPUSTDATOMIC_H
17#define _RTEMS_SCORE_CPUSTDATOMIC_H
18
19#include <rtems/score/basedefs.h>
20
21#ifdef RTEMS_SMP
22  #if defined(__cplusplus) && __GNUC__ >= 4 && __GNUC_MINOR__ >= 9
23    /*
24     * The GCC 4.9 ships its own <stdatomic.h> which is not C++ compatible.  The
25     * suggested solution was to include <atomic> in case C++ is used.  This works
26     * at least with GCC 4.9.  See also:
27     *
28     * http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60932
29     * http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60940
30     */
31    #include <atomic>
32    #define _RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC
33  #else
34    #include <stdatomic.h>
35    #define _RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC
36  #endif
37#else
38  #include <rtems/score/isrlevel.h>
39#endif
40
41#if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
42
43typedef std::atomic_uint CPU_atomic_Uint;
44
45typedef std::atomic_ulong CPU_atomic_Ulong;
46
47typedef std::atomic_uintptr_t CPU_atomic_Pointer;
48
49typedef std::atomic_flag CPU_atomic_Flag;
50
51typedef std::memory_order CPU_atomic_Order;
52
53#define CPU_ATOMIC_ORDER_RELAXED std::memory_order_relaxed
54
55#define CPU_ATOMIC_ORDER_ACQUIRE std::memory_order_acquire
56
57#define CPU_ATOMIC_ORDER_RELEASE std::memory_order_release
58
59#define CPU_ATOMIC_ORDER_SEQ_CST std::memory_order_seq_cst
60
61#define CPU_ATOMIC_INITIALIZER_UINT( value ) ATOMIC_VAR_INIT( value )
62
63#define CPU_ATOMIC_INITIALIZER_ULONG( value ) ATOMIC_VAR_INIT( value )
64
65#define CPU_ATOMIC_INITIALIZER_PTR( value ) \
66  ATOMIC_VAR_INIT( (uintptr_t) (value) )
67
68#define CPU_ATOMIC_INITIALIZER_FLAG ATOMIC_FLAG_INIT
69
70#elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
71
72typedef atomic_uint CPU_atomic_Uint;
73
74typedef atomic_ulong CPU_atomic_Ulong;
75
76typedef atomic_uintptr_t CPU_atomic_Pointer;
77
78typedef atomic_flag CPU_atomic_Flag;
79
80typedef memory_order CPU_atomic_Order;
81
82#define CPU_ATOMIC_ORDER_RELAXED memory_order_relaxed
83
84#define CPU_ATOMIC_ORDER_ACQUIRE memory_order_acquire
85
86#define CPU_ATOMIC_ORDER_RELEASE memory_order_release
87
88#define CPU_ATOMIC_ORDER_SEQ_CST memory_order_seq_cst
89
90#define CPU_ATOMIC_INITIALIZER_UINT( value ) ATOMIC_VAR_INIT( value )
91
92#define CPU_ATOMIC_INITIALIZER_ULONG( value ) ATOMIC_VAR_INIT( value )
93
94#define CPU_ATOMIC_INITIALIZER_PTR( value ) \
95  ATOMIC_VAR_INIT( (uintptr_t) (value) )
96
97#define CPU_ATOMIC_INITIALIZER_FLAG ATOMIC_FLAG_INIT
98
99#else
100
101typedef unsigned int CPU_atomic_Uint;
102
103typedef unsigned long CPU_atomic_Ulong;
104
105typedef uintptr_t CPU_atomic_Pointer;
106
107typedef bool CPU_atomic_Flag;
108
109typedef int CPU_atomic_Order;
110
111#define CPU_ATOMIC_ORDER_RELAXED 0
112
113#define CPU_ATOMIC_ORDER_ACQUIRE 2
114
115#define CPU_ATOMIC_ORDER_RELEASE 3
116
117#define CPU_ATOMIC_ORDER_SEQ_CST 5
118
119#define CPU_ATOMIC_INITIALIZER_UINT( value ) ( value )
120
121#define CPU_ATOMIC_INITIALIZER_ULONG( value ) ( value )
122
123#define CPU_ATOMIC_INITIALIZER_PTR( value ) ( (uintptr_t) (value) )
124
125#define CPU_ATOMIC_INITIALIZER_FLAG false
126
127#endif
128
129static inline void _CPU_atomic_Fence( CPU_atomic_Order order )
130{
131#if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
132  std::atomic_thread_fence( order );
133#elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
134  atomic_thread_fence( order );
135#else
136  (void) order;
137  RTEMS_COMPILER_MEMORY_BARRIER();
138#endif
139}
140
141static inline void _CPU_atomic_Init_uint( CPU_atomic_Uint *obj, unsigned int desired )
142{
143#if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
144  obj->store( desired );
145#elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
146  atomic_init( obj, desired );
147#else
148  *obj = desired;
149#endif
150}
151
152static inline void _CPU_atomic_Init_ulong( CPU_atomic_Ulong *obj, unsigned long desired )
153{
154#if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
155  obj->store( desired );
156#elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
157  atomic_init( obj, desired );
158#else
159  *obj = desired;
160#endif
161}
162
163static inline void _CPU_atomic_Init_ptr( CPU_atomic_Pointer *obj, void *desired )
164{
165#if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
166  obj->store( (uintptr_t) desired );
167#elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
168  atomic_init( obj, (uintptr_t) desired );
169#else
170  *obj = (uintptr_t) desired;
171#endif
172}
173
174static inline unsigned int _CPU_atomic_Load_uint( const CPU_atomic_Uint *obj, CPU_atomic_Order order )
175{
176#if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
177  return obj->load( order );
178#elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
179  return atomic_load_explicit( obj, order );
180#else
181  (void) order;
182  return *obj;
183#endif
184}
185
186static inline unsigned long _CPU_atomic_Load_ulong( const CPU_atomic_Ulong *obj, CPU_atomic_Order order )
187{
188#if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
189  return obj->load( order );
190#elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
191  return atomic_load_explicit( obj, order );
192#else
193  (void) order;
194  return *obj;
195#endif
196}
197
198static inline void *_CPU_atomic_Load_ptr( const CPU_atomic_Pointer *obj, CPU_atomic_Order order )
199{
200#if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
201  return (void *) obj->load( order );
202#elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
203  return (void *) atomic_load_explicit( obj, order );
204#else
205  (void) order;
206  return (void *) *obj;
207#endif
208}
209
210static inline void _CPU_atomic_Store_uint( CPU_atomic_Uint *obj, unsigned int desired, CPU_atomic_Order order )
211{
212#if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
213  obj->store( desired );
214#elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
215  atomic_store_explicit( obj, desired, order );
216#else
217  (void) order;
218  *obj = desired;
219#endif
220}
221
222static inline void _CPU_atomic_Store_ulong( CPU_atomic_Ulong *obj, unsigned long desired, CPU_atomic_Order order )
223{
224#if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
225  obj->store( desired );
226#elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
227  atomic_store_explicit( obj, desired, order );
228#else
229  (void) order;
230  *obj = desired;
231#endif
232}
233
234static inline void _CPU_atomic_Store_ptr( CPU_atomic_Pointer *obj, void *desired, CPU_atomic_Order order )
235{
236#if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
237  obj->store( (uintptr_t) desired );
238#elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
239  atomic_store_explicit( obj, (uintptr_t) desired, order );
240#else
241  (void) order;
242  *obj = (uintptr_t) desired;
243#endif
244}
245
246static inline unsigned int _CPU_atomic_Fetch_add_uint( CPU_atomic_Uint *obj, unsigned int arg, CPU_atomic_Order order )
247{
248#if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
249  return obj->fetch_add( arg, order );
250#elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
251  return atomic_fetch_add_explicit( obj, arg, order );
252#else
253  unsigned int val;
254  ISR_Level level;
255
256  (void) order;
257  _ISR_Disable( level );
258  val = *obj;
259  *obj = val + arg;
260  _ISR_Enable( level );
261
262  return val;
263#endif
264}
265
266static inline unsigned long _CPU_atomic_Fetch_add_ulong( CPU_atomic_Ulong *obj, unsigned long arg, CPU_atomic_Order order )
267{
268#if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
269  return obj->fetch_add( arg, order );
270#elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
271  return atomic_fetch_add_explicit( obj, arg, order );
272#else
273  unsigned long val;
274  ISR_Level level;
275
276  (void) order;
277  _ISR_Disable( level );
278  val = *obj;
279  *obj = val + arg;
280  _ISR_Enable( level );
281
282  return val;
283#endif
284}
285
286static inline void *_CPU_atomic_Fetch_add_ptr( CPU_atomic_Pointer *obj, void *arg, CPU_atomic_Order order )
287{
288#if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
289  return (void *) obj->fetch_add( (uintptr_t) arg, order );
290#elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
291  return (void *) atomic_fetch_add_explicit( obj, (uintptr_t) arg, order );
292#else
293  uintptr_t val;
294  ISR_Level level;
295
296  (void) order;
297  _ISR_Disable( level );
298  val = *obj;
299  *obj = val + (uintptr_t) arg;
300  _ISR_Enable( level );
301
302  return (void *) val;
303#endif
304}
305
306static inline unsigned int _CPU_atomic_Fetch_sub_uint( CPU_atomic_Uint *obj, unsigned int arg, CPU_atomic_Order order )
307{
308#if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
309  return obj->fetch_sub( arg, order );
310#elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
311  return atomic_fetch_sub_explicit( obj, arg, order );
312#else
313  unsigned int val;
314  ISR_Level level;
315
316  (void) order;
317  _ISR_Disable( level );
318  val = *obj;
319  *obj = val - arg;
320  _ISR_Enable( level );
321
322  return val;
323#endif
324}
325
326static inline unsigned long _CPU_atomic_Fetch_sub_ulong( CPU_atomic_Ulong *obj, unsigned long arg, CPU_atomic_Order order )
327{
328#if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
329  return obj->fetch_sub( arg, order );
330#elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
331  return atomic_fetch_sub_explicit( obj, arg, order );
332#else
333  unsigned long val;
334  ISR_Level level;
335
336  (void) order;
337  _ISR_Disable( level );
338  val = *obj;
339  *obj = val - arg;
340  _ISR_Enable( level );
341
342  return val;
343#endif
344}
345
346static inline void *_CPU_atomic_Fetch_sub_ptr( CPU_atomic_Pointer *obj, void *arg, CPU_atomic_Order order )
347{
348#if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
349  return (void *) obj->fetch_sub( (uintptr_t) arg, order );
350#elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
351  return (void *) atomic_fetch_sub_explicit( obj, (uintptr_t) arg, order );
352#else
353  unsigned int val;
354  ISR_Level level;
355
356  (void) order;
357  _ISR_Disable( level );
358  val = *obj;
359  *obj = val - (uintptr_t) arg;
360  _ISR_Enable( level );
361
362  return (void *) val;
363#endif
364}
365
366static inline unsigned int _CPU_atomic_Fetch_or_uint( CPU_atomic_Uint *obj, unsigned int arg, CPU_atomic_Order order )
367{
368#if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
369  return obj->fetch_or( arg, order );
370#elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
371  return atomic_fetch_or_explicit( obj, arg, order );
372#else
373  unsigned int val;
374  ISR_Level level;
375
376  (void) order;
377  _ISR_Disable( level );
378  val = *obj;
379  *obj = val | arg;
380  _ISR_Enable( level );
381
382  return val;
383#endif
384}
385
386static inline unsigned long _CPU_atomic_Fetch_or_ulong( CPU_atomic_Ulong *obj, unsigned long arg, CPU_atomic_Order order )
387{
388#if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
389  return obj->fetch_or( arg, order );
390#elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
391  return atomic_fetch_or_explicit( obj, arg, order );
392#else
393  unsigned long val;
394  ISR_Level level;
395
396  (void) order;
397  _ISR_Disable( level );
398  val = *obj;
399  *obj = val | arg;
400  _ISR_Enable( level );
401
402  return val;
403#endif
404}
405
406static inline void *_CPU_atomic_Fetch_or_ptr( CPU_atomic_Pointer *obj, void *arg, CPU_atomic_Order order )
407{
408#if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
409  return (void *) obj->fetch_or( (uintptr_t) arg, order );
410#elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
411  return (void *) atomic_fetch_or_explicit( obj, (uintptr_t) arg, order );
412#else
413  uintptr_t val;
414  ISR_Level level;
415
416  (void) order;
417  _ISR_Disable( level );
418  val = *obj;
419  *obj = val | (uintptr_t) arg;
420  _ISR_Enable( level );
421
422  return (void *) val;
423#endif
424}
425
426static inline unsigned int _CPU_atomic_Fetch_and_uint( CPU_atomic_Uint *obj, unsigned int arg, CPU_atomic_Order order )
427{
428#if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
429  return obj->fetch_and( arg, order );
430#elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
431  return atomic_fetch_and_explicit( obj, arg, order );
432#else
433  unsigned int val;
434  ISR_Level level;
435
436  (void) order;
437  _ISR_Disable( level );
438  val = *obj;
439  *obj = val & arg;
440  _ISR_Enable( level );
441
442  return val;
443#endif
444}
445
446static inline unsigned long _CPU_atomic_Fetch_and_ulong( CPU_atomic_Ulong *obj, unsigned long arg, CPU_atomic_Order order )
447{
448#if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
449  return obj->fetch_and( arg, order );
450#elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
451  return atomic_fetch_and_explicit( obj, arg, order );
452#else
453  unsigned long val;
454  ISR_Level level;
455
456  (void) order;
457  _ISR_Disable( level );
458  val = *obj;
459  *obj = val & arg;
460  _ISR_Enable( level );
461
462  return val;
463#endif
464}
465
466static inline void *_CPU_atomic_Fetch_and_ptr( CPU_atomic_Pointer *obj, void *arg, CPU_atomic_Order order )
467{
468#if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
469  return (void *) obj->fetch_and( (uintptr_t) arg, order );
470#elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
471  return (void *) atomic_fetch_and_explicit( obj, (uintptr_t) arg, order );
472#else
473  uintptr_t val;
474  ISR_Level level;
475
476  (void) order;
477  _ISR_Disable( level );
478  val = *obj;
479  *obj = val & (uintptr_t) arg;
480  _ISR_Enable( level );
481
482  return (void *) val;
483#endif
484}
485
486static inline unsigned int _CPU_atomic_Exchange_uint( CPU_atomic_Uint *obj, unsigned int desired, CPU_atomic_Order order )
487{
488#if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
489  return obj->exchange( desired, order );
490#elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
491  return atomic_exchange_explicit( obj, desired, order );
492#else
493  unsigned int val;
494  ISR_Level level;
495
496  (void) order;
497  _ISR_Disable( level );
498  val = *obj;
499  *obj = desired;
500  _ISR_Enable( level );
501
502  return val;
503#endif
504}
505
506static inline unsigned long _CPU_atomic_Exchange_ulong( CPU_atomic_Ulong *obj, unsigned long desired, CPU_atomic_Order order )
507{
508#if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
509  return obj->exchange( desired, order );
510#elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
511  return atomic_exchange_explicit( obj, desired, order );
512#else
513  unsigned long val;
514  ISR_Level level;
515
516  (void) order;
517  _ISR_Disable( level );
518  val = *obj;
519  *obj = desired;
520  _ISR_Enable( level );
521
522  return val;
523#endif
524}
525
526static inline void *_CPU_atomic_Exchange_ptr( CPU_atomic_Pointer *obj, void *desired, CPU_atomic_Order order )
527{
528#if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
529  return (void *) obj->exchange( (uintptr_t) desired, order );
530#elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
531  return (void *) atomic_exchange_explicit( obj, (uintptr_t) desired, order );
532#else
533  uintptr_t val;
534  ISR_Level level;
535
536  (void) order;
537  _ISR_Disable( level );
538  val = *obj;
539  *obj = (uintptr_t) desired;
540  _ISR_Enable( level );
541
542  return (void *) val;
543#endif
544}
545
546static inline bool _CPU_atomic_Compare_exchange_uint( CPU_atomic_Uint *obj, unsigned int *expected, unsigned int desired, CPU_atomic_Order succ, CPU_atomic_Order fail )
547{
548#if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
549  return obj->compare_exchange_strong( *expected, desired, succ, fail );
550#elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
551  return atomic_compare_exchange_strong_explicit( obj, expected, desired, succ, fail );
552#else
553  bool success;
554  ISR_Level level;
555
556  (void) succ;
557  (void) fail;
558  _ISR_Disable( level );
559  success = *obj == *expected;
560  if ( success ) {
561    *obj = desired;
562  }
563  _ISR_Enable( level );
564
565  return success;
566#endif
567}
568
569static inline bool _CPU_atomic_Compare_exchange_ulong( CPU_atomic_Ulong *obj, unsigned long *expected, unsigned long desired, CPU_atomic_Order succ, CPU_atomic_Order fail )
570{
571#if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
572  return obj->compare_exchange_strong( *expected, desired, succ, fail );
573#elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
574  return atomic_compare_exchange_strong_explicit( obj, expected, desired, succ, fail );
575#else
576  bool success;
577  ISR_Level level;
578
579  (void) succ;
580  (void) fail;
581  _ISR_Disable( level );
582  success = *obj == *expected;
583  if ( success ) {
584    *obj = desired;
585  }
586  _ISR_Enable( level );
587
588  return success;
589#endif
590}
591
592static inline bool _CPU_atomic_Compare_exchange_ptr( CPU_atomic_Pointer *obj, void **expected, void *desired, CPU_atomic_Order succ, CPU_atomic_Order fail )
593{
594#if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
595  return obj->compare_exchange_strong( *(uintptr_t *) expected, (uintptr_t) desired, succ, fail );
596#elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
597  return atomic_compare_exchange_strong_explicit( obj, (uintptr_t *) expected, (uintptr_t) desired, succ, fail );
598#else
599  bool success;
600  ISR_Level level;
601
602  (void) succ;
603  (void) fail;
604  _ISR_Disable( level );
605  success = *obj == (uintptr_t) *expected;
606  if ( success ) {
607    *obj = (uintptr_t) desired;
608  }
609  _ISR_Enable( level );
610
611  return success;
612#endif
613}
614
615static inline void _CPU_atomic_Flag_clear( CPU_atomic_Flag *obj, CPU_atomic_Order order )
616{
617#if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
618  obj->clear( order );
619#elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
620  atomic_flag_clear_explicit( obj, order );
621#else
622  (void) order;
623  *obj = false;
624#endif
625}
626
627static inline bool _CPU_atomic_Flag_test_and_set( CPU_atomic_Flag *obj, CPU_atomic_Order order )
628{
629#if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
630  return obj->test_and_set( order );
631#elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
632  return atomic_flag_test_and_set_explicit( obj, order );
633#else
634  bool flag;
635  ISR_Level level;
636
637  (void) order;
638  _ISR_Disable( level );
639  flag = *obj;
640  *obj = true;
641  _ISR_Enable( level );
642
643  return flag;
644#endif
645}
646
647#endif /* _RTEMS_SCORE_CPUSTDATOMIC_H */
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