1 | /* |
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2 | * Copyright (c) 2018. |
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3 | * Amaan Cheval <amaan.cheval@gmail.com> |
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4 | * |
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5 | * Redistribution and use in source and binary forms, with or without |
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6 | * modification, are permitted provided that the following conditions |
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7 | * are met: |
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8 | * 1. Redistributions of source code must retain the above copyright |
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9 | * notice, this list of conditions and the following disclaimer. |
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10 | * 2. Redistributions in binary form must reproduce the above copyright |
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11 | * notice, this list of conditions and the following disclaimer in the |
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12 | * documentation and/or other materials provided with the distribution. |
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13 | * |
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14 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND |
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15 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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16 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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17 | * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE |
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18 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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19 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
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20 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
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21 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
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22 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
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23 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
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24 | * SUCH DAMAGE. |
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25 | */ |
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26 | |
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27 | #include <rtems/score/cpu.h> |
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28 | #include <rtems/score/tls.h> |
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29 | |
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30 | /* |
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31 | * Stack alignment note: |
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32 | * |
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33 | * Per the x86-64 SysV ABI, the stack frame layout is as follows: |
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34 | * optional args |
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35 | * ------ (16-byte alignment boundary) |
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36 | * RSP-> return_addr (RSP is moved lower as needed for this frame) |
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37 | * |
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38 | * Per the ABI: |
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39 | * |
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40 | * > The end of the input argument area shall be aligned on a 16 (32 or 64, if |
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41 | * __m256 or __m512 is passed on stack) byte boundary. |
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42 | * |
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43 | * > In other words, the value (%rsp + 8) is always a multiple of 16 (32 or 64) |
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44 | * when control is transferred to the function entry point. |
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45 | * |
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46 | * We want the stack to look to the '_entry_point' routine |
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47 | * like an ordinary stack frame as if '_entry_point' was |
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48 | * called from C-code. |
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49 | * Note that '_entry_point' is jumped-to by the 'ret' |
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50 | * instruction returning from _CPU_Context_switch() or |
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51 | * _CPU_Context_restore() thus popping the _entry_point |
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52 | * from the stack. |
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53 | * |
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54 | * Hence we must initialize the stack as follows |
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55 | * |
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56 | * [arg0 (aligned)]: n/a |
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57 | * [ret. addr ]: NULL |
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58 | * RSP-> [jump-target ]: _entry_point |
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59 | * |
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60 | * When Context_switch returns it pops the _entry_point from |
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61 | * the stack which then finds a standard layout. |
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62 | */ |
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63 | void _CPU_Context_Initialize( |
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64 | Context_Control *the_context, |
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65 | void *stack_area_begin, |
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66 | size_t stack_area_size, |
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67 | uint32_t new_level, |
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68 | void (*entry_point)( void ), |
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69 | bool is_fp, |
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70 | void *tls_area |
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71 | ) |
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72 | { |
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73 | uintptr_t _stack; |
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74 | |
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75 | /* avoid warning for being unused */ |
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76 | (void) is_fp; |
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77 | |
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78 | // XXX: Should be used in the future |
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79 | (void) tls_area; |
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80 | |
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81 | if ( new_level ) { |
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82 | the_context->rflags = CPU_EFLAGS_INTERRUPTS_OFF; |
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83 | } |
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84 | else { |
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85 | the_context->rflags = CPU_EFLAGS_INTERRUPTS_ON; |
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86 | } |
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87 | |
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88 | _stack = ((uintptr_t) stack_area_begin) + stack_area_size; |
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89 | _stack &= ~(CPU_STACK_ALIGNMENT - 1); |
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90 | _stack -= sizeof(uintptr_t); /* fake return address for entry_point's frame; |
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91 | * this allows rsp+8 to be an aligned boundary */ |
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92 | *((proc_ptr *) _stack) = entry_point; |
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93 | |
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94 | the_context->rbp = (void *) 0; |
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95 | the_context->rsp = (void *) _stack; |
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96 | |
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97 | // XXX: Initialize thread-local storage area (TLS / TCB) |
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98 | } |
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