source: rtems/cpukit/score/cpu/unix/cpu.c @ d83c39dc

4.104.114.84.95
Last change on this file since d83c39dc was d83c39dc, checked in by Joel Sherrill <joel.sherrill@…>, on Oct 5, 1999 at 1:08:41 PM

Bug report and fix from Jay Kulpinski <jskulpin@…> where
sigemptyset(&old_mask) needed to be added on glibc2 systems. Ian
Lance Taylor pointed out that sigemptyset() is portable so Joel removed
all conditionals around calls to sigemptyset().

  • Property mode set to 100644
File size: 23.1 KB
Line 
1/*
2 *  UNIX Simulator Dependent Source
3 *
4 *  COPYRIGHT (c) 1994,95 by Division Incorporated
5 *
6 *  The license and distribution terms for this file may be
7 *  found in the file LICENSE in this distribution or at
8 *  http://www.OARcorp.com/rtems/license.html.
9 *
10 *  $Id$
11 */
12
13#include <rtems/system.h>
14#include <rtems/score/isr.h>
15#include <rtems/score/interr.h>
16
17#if defined(__linux__)
18#define _XOPEN_SOURCE
19#define MALLOC_0_RETURNS_NULL
20#endif
21
22#include <sys/types.h>
23#include <sys/times.h>
24#include <stdio.h>
25#include <stdlib.h>
26#include <setjmp.h>
27#include <signal.h>
28#include <time.h>
29#include <sys/time.h>
30#include <errno.h>
31#include <unistd.h>
32#include <sys/ipc.h>
33#include <sys/shm.h>
34#include <sys/sem.h>
35#include <string.h>   /* memset */
36
37#ifndef SA_RESTART
38#define SA_RESTART 0
39#endif
40
41typedef struct {
42  jmp_buf   regs;
43  int  isr_level;
44} Context_Control_overlay;
45
46void  _CPU_Signal_initialize(void);
47void  _CPU_Stray_signal(int);
48void  _CPU_ISR_Handler(int);
49
50static sigset_t _CPU_Signal_mask;
51static Context_Control_overlay
52          _CPU_Context_Default_with_ISRs_enabled CPU_STRUCTURE_ALIGNMENT;
53static Context_Control_overlay
54          _CPU_Context_Default_with_ISRs_disabled CPU_STRUCTURE_ALIGNMENT;
55
56/*
57 * Sync IO support, an entry for each fd that can be set
58 */
59
60void  _CPU_Sync_io_Init();
61
62static rtems_sync_io_handler _CPU_Sync_io_handlers[FD_SETSIZE];
63static int sync_io_nfds;
64static fd_set sync_io_readfds;
65static fd_set sync_io_writefds;
66static fd_set sync_io_exceptfds;
67
68/*
69 * Which cpu are we? Used by libcpu and libbsp.
70 */
71
72int cpu_number;
73
74/*PAGE
75 *
76 *  _CPU_ISR_From_CPU_Init
77 */
78
79sigset_t  posix_empty_mask;
80
81void _CPU_ISR_From_CPU_Init()
82{
83  unsigned32        i;
84  proc_ptr          old_handler;
85
86  /*
87   * Generate an empty mask to be used by disable_support
88   */
89
90  sigemptyset(&posix_empty_mask);
91
92  /*
93   * Block all the signals except SIGTRAP for the debugger
94   * and fatal error signals.
95   */
96
97  (void) sigfillset(&_CPU_Signal_mask);
98  (void) sigdelset(&_CPU_Signal_mask, SIGTRAP);
99  (void) sigdelset(&_CPU_Signal_mask, SIGABRT);
100  (void) sigdelset(&_CPU_Signal_mask, SIGIOT);
101  (void) sigdelset(&_CPU_Signal_mask, SIGCONT);
102  (void) sigdelset(&_CPU_Signal_mask, SIGSEGV);
103  (void) sigdelset(&_CPU_Signal_mask, SIGBUS);
104  (void) sigdelset(&_CPU_Signal_mask, SIGFPE);
105
106  _CPU_ISR_Enable(1);
107
108  /*
109   * Set the handler for all signals to be signal_handler
110   * which will then vector out to the correct handler
111   * for whichever signal actually happened. Initially
112   * set the vectors to the stray signal handler.
113   */
114
115  for (i = 0; i < CPU_INTERRUPT_NUMBER_OF_VECTORS; i++)
116      (void)_CPU_ISR_install_vector(i, _CPU_Stray_signal, &old_handler);
117
118  _CPU_Signal_initialize();
119}
120
121void _CPU_Signal_initialize( void )
122{
123  struct sigaction  act;
124  sigset_t          mask;
125
126  /* mark them all active except for TraceTrap  and Abort */
127
128  mask = _CPU_Signal_mask;
129  sigprocmask(SIG_UNBLOCK, &mask, 0);
130
131  act.sa_handler = _CPU_ISR_Handler;
132  act.sa_mask = mask;
133  act.sa_flags = SA_RESTART;
134
135  sigaction(SIGHUP, &act, 0);
136  sigaction(SIGINT, &act, 0);
137  sigaction(SIGQUIT, &act, 0);
138  sigaction(SIGILL, &act, 0);
139#ifdef SIGEMT
140  sigaction(SIGEMT, &act, 0);
141#endif
142  sigaction(SIGFPE, &act, 0);
143  sigaction(SIGKILL, &act, 0);
144  sigaction(SIGBUS, &act, 0);
145  sigaction(SIGSEGV, &act, 0);
146#ifdef SIGSYS
147  sigaction(SIGSYS, &act, 0);
148#endif
149  sigaction(SIGPIPE, &act, 0);
150  sigaction(SIGALRM, &act, 0);
151  sigaction(SIGTERM, &act, 0);
152  sigaction(SIGUSR1, &act, 0);
153  sigaction(SIGUSR2, &act, 0);
154  sigaction(SIGCHLD, &act, 0);
155#ifdef SIGCLD
156  sigaction(SIGCLD, &act, 0);
157#endif
158#ifdef SIGPWR
159  sigaction(SIGPWR, &act, 0);
160#endif
161  sigaction(SIGVTALRM, &act, 0);
162  sigaction(SIGPROF, &act, 0);
163  sigaction(SIGIO, &act, 0);
164  sigaction(SIGWINCH, &act, 0);
165  sigaction(SIGSTOP, &act, 0);
166  sigaction(SIGTTIN, &act, 0);
167  sigaction(SIGTTOU, &act, 0);
168  sigaction(SIGURG, &act, 0);
169#ifdef SIGLOST
170    sigaction(SIGLOST, &act, 0);
171#endif
172}
173
174/*PAGE
175 *
176 *  _CPU_Context_From_CPU_Init
177 */
178
179void _CPU_Context_From_CPU_Init()
180{
181
182#if defined(__hppa__) && defined(RTEMS_UNIXLIB_SETJMP)
183    /*
184     * HACK - set the _SYSTEM_ID to 0x20c so that setjmp/longjmp
185     * will handle the full 32 floating point registers.
186     */
187
188    {
189      extern unsigned32 _SYSTEM_ID;
190
191      _SYSTEM_ID = 0x20c;
192    }
193#endif
194
195  /*
196   *  get default values to use in _CPU_Context_Initialize()
197   */
198
199
200  (void) memset(
201    &_CPU_Context_Default_with_ISRs_enabled,
202    0,
203    sizeof(Context_Control)
204  );
205  (void) memset(
206    &_CPU_Context_Default_with_ISRs_disabled,
207    0,
208    sizeof(Context_Control)
209  );
210
211  _CPU_ISR_Set_level( 0 );
212  _CPU_Context_switch(
213    (Context_Control *) &_CPU_Context_Default_with_ISRs_enabled,
214    (Context_Control *) &_CPU_Context_Default_with_ISRs_enabled
215  );
216
217  _CPU_ISR_Set_level( 1 );
218  _CPU_Context_switch(
219    (Context_Control *) &_CPU_Context_Default_with_ISRs_disabled,
220    (Context_Control *) &_CPU_Context_Default_with_ISRs_disabled
221  );
222}
223
224/*PAGE
225 *
226 *  _CPU_Sync_io_Init
227 */
228
229void _CPU_Sync_io_Init()
230{
231  int fd;
232
233  for (fd = 0; fd < FD_SETSIZE; fd++)
234    _CPU_Sync_io_handlers[fd] = NULL;
235
236  sync_io_nfds = 0;
237  FD_ZERO(&sync_io_readfds);
238  FD_ZERO(&sync_io_writefds);
239  FD_ZERO(&sync_io_exceptfds);
240}
241
242/*PAGE
243 *
244 *  _CPU_ISR_Get_level
245 */
246
247unsigned32 _CPU_ISR_Get_level( void )
248{
249  sigset_t old_mask;
250
251  sigemptyset( &old_mask );
252  sigprocmask(SIG_BLOCK, 0, &old_mask);
253
254  if (memcmp((void *)&posix_empty_mask, (void *)&old_mask, sizeof(sigset_t)))
255      return 1;
256
257  return 0;
258}
259
260/*  _CPU_Initialize
261 *
262 *  This routine performs processor dependent initialization.
263 *
264 *  INPUT PARAMETERS:
265 *    cpu_table       - CPU table to initialize
266 *    thread_dispatch - address of disptaching routine
267 */
268
269
270void _CPU_Initialize(
271  rtems_cpu_table  *cpu_table,
272  void            (*thread_dispatch)      /* ignored on this CPU */
273)
274{
275  /*
276   *  The thread_dispatch argument is the address of the entry point
277   *  for the routine called at the end of an ISR once it has been
278   *  decided a context switch is necessary.  On some compilation
279   *  systems it is difficult to call a high-level language routine
280   *  from assembly.  This allows us to trick these systems.
281   *
282   *  If you encounter this problem save the entry point in a CPU
283   *  dependent variable.
284   */
285
286  _CPU_Thread_dispatch_pointer = thread_dispatch;
287
288  /*
289   * XXX; If there is not an easy way to initialize the FP context
290   *      during Context_Initialize, then it is usually easier to
291   *      save an "uninitialized" FP context here and copy it to
292   *      the task's during Context_Initialize.
293   */
294
295  /* XXX: FP context initialization support */
296
297  _CPU_Table = *cpu_table;
298
299  _CPU_ISR_From_CPU_Init();
300
301  _CPU_Sync_io_Init();
302
303  _CPU_Context_From_CPU_Init();
304
305}
306
307/*PAGE
308 *
309 *  _CPU_ISR_install_raw_handler
310 */
311
312void _CPU_ISR_install_raw_handler(
313  unsigned32  vector,
314  proc_ptr    new_handler,
315  proc_ptr   *old_handler
316)
317{
318  _CPU_Fatal_halt( 0xdeaddead );
319}
320
321/*PAGE
322 *
323 *  _CPU_ISR_install_vector
324 *
325 *  This kernel routine installs the RTEMS handler for the
326 *  specified vector.
327 *
328 *  Input parameters:
329 *    vector      - interrupt vector number
330 *    old_handler - former ISR for this vector number
331 *    new_handler - replacement ISR for this vector number
332 *
333 *  Output parameters:  NONE
334 *
335 */
336
337
338void _CPU_ISR_install_vector(
339  unsigned32  vector,
340  proc_ptr    new_handler,
341  proc_ptr   *old_handler
342)
343{
344   *old_handler = _ISR_Vector_table[ vector ];
345
346   /*
347    *  If the interrupt vector table is a table of pointer to isr entry
348    *  points, then we need to install the appropriate RTEMS interrupt
349    *  handler for this vector number.
350    */
351
352   /*
353    *  We put the actual user ISR address in '_ISR_vector_table'.  This will
354    *  be used by the _CPU_ISR_Handler so the user gets control.
355    */
356
357    _ISR_Vector_table[ vector ] = new_handler;
358}
359
360/*PAGE
361 *
362 *  _CPU_Install_interrupt_stack
363 */
364
365void _CPU_Install_interrupt_stack( void )
366{
367}
368
369/*PAGE
370 *
371 *  _CPU_Thread_Idle_body
372 *
373 *  Stop until we get a signal which is the logically the same thing
374 *  entering low-power or sleep mode on a real processor and waiting for
375 *  an interrupt.  This significantly reduces the consumption of host
376 *  CPU cycles which is again similar to low power mode.
377 */
378
379void _CPU_Thread_Idle_body( void )
380{
381#if CPU_SYNC_IO
382  extern void _Thread_Dispatch(void);
383  int fd;
384#endif
385
386  while (1) {
387#ifdef RTEMS_DEBUG
388    /* interrupts had better be enabled at this point! */
389    if (_CPU_ISR_Get_level() != 0)
390       abort();
391#endif
392
393    /*
394     *  Block on a select statement, the CPU interface added allow the
395     *  user to add new descriptors which are to be blocked on
396     */
397
398#if CPU_SYNC_IO
399    if (sync_io_nfds) {
400      int result;
401      fd_set readfds, writefds, exceptfds;
402
403      readfds = sync_io_readfds;
404      writefds = sync_io_writefds;
405      exceptfds = sync_io_exceptfds;
406      result = select(sync_io_nfds,
407                 &readfds,
408                 &writefds,
409                 &exceptfds,
410                 NULL);
411
412      if (result < 0) {
413        if (errno != EINTR)
414          _CPU_Fatal_error(0x200);       /* FIXME : what number should go here !! */
415        _Thread_Dispatch();
416        continue;
417      }
418
419      for (fd = 0; fd < sync_io_nfds; fd++) {
420        boolean read = FD_ISSET(fd, &readfds);
421        boolean write = FD_ISSET(fd, &writefds);
422        boolean except = FD_ISSET(fd, &exceptfds);
423
424        if (_CPU_Sync_io_handlers[fd] && (read || write || except))
425          _CPU_Sync_io_handlers[fd](fd, read, write, except);
426      }
427
428      _Thread_Dispatch();
429    } else
430      pause();
431#else
432    pause();
433#endif
434
435  }
436
437}
438
439/*PAGE
440 *
441 *  _CPU_Context_Initialize
442 */
443
444void _CPU_Context_Initialize(
445  Context_Control  *_the_context,
446  unsigned32       *_stack_base,
447  unsigned32        _size,
448  unsigned32        _new_level,
449  void             *_entry_point,
450  boolean           _is_fp
451)
452{
453  unsigned32  *addr;
454  unsigned32   jmp_addr;
455  unsigned32   _stack_low;   /* lowest "stack aligned" address */
456  unsigned32   _stack_high;  /* highest "stack aligned" address */
457  unsigned32   _the_size;
458
459  jmp_addr = (unsigned32) _entry_point;
460
461  /*
462   *  On CPUs with stacks which grow down, we build the stack
463   *  based on the _stack_high address.  On CPUs with stacks which
464   *  grow up, we build the stack based on the _stack_low address.
465   */
466
467  _stack_low = (unsigned32)(_stack_base) + CPU_STACK_ALIGNMENT - 1;
468  _stack_low &= ~(CPU_STACK_ALIGNMENT - 1);
469
470  _stack_high = (unsigned32)(_stack_base) + _size;
471  _stack_high &= ~(CPU_STACK_ALIGNMENT - 1);
472
473  if (_stack_high > _stack_low)
474    _the_size = _stack_high - _stack_low;
475  else
476    _the_size = _stack_low - _stack_high;
477
478  /*
479   * Slam our jmp_buf template into the context we are creating
480   */
481
482  if ( _new_level == 0 )
483      *_the_context = *(Context_Control *)
484                         &_CPU_Context_Default_with_ISRs_enabled;
485  else
486      *_the_context = *(Context_Control *)
487                         &_CPU_Context_Default_with_ISRs_disabled;
488
489  addr = (unsigned32 *)_the_context;
490
491#if defined(__hppa__)
492  *(addr + RP_OFF) = jmp_addr;
493  *(addr + SP_OFF) = (unsigned32)(_stack_low + CPU_FRAME_SIZE);
494
495  /*
496   * See if we are using shared libraries by checking
497   * bit 30 in 24 off of newp. If bit 30 is set then
498   * we are using shared libraries and the jump address
499   * points to the pointer, so we put that into rp instead.
500   */
501
502  if (jmp_addr & 0x40000000) {
503    jmp_addr &= 0xfffffffc;
504     *(addr + RP_OFF) = *(unsigned32 *)jmp_addr;
505  }
506#elif defined(__sparc__)
507
508  /*
509   *  See /usr/include/sys/stack.h in Solaris 2.3 for a nice
510   *  diagram of the stack.
511   */
512
513  asm ("ta  0x03");            /* flush registers */
514
515  *(addr + RP_OFF) = jmp_addr + ADDR_ADJ_OFFSET;
516  *(addr + SP_OFF) = (unsigned32)(_stack_high - CPU_FRAME_SIZE);
517  *(addr + FP_OFF) = (unsigned32)(_stack_high);
518
519#elif defined(__i386__)
520
521    /*
522     *  This information was gathered by disassembling setjmp().
523     */
524
525    {
526      unsigned32 stack_ptr;
527
528      stack_ptr = _stack_high - CPU_FRAME_SIZE;
529
530      *(addr + EBX_OFF) = 0xFEEDFEED;
531      *(addr + ESI_OFF) = 0xDEADDEAD;
532      *(addr + EDI_OFF) = 0xDEAFDEAF;
533      *(addr + EBP_OFF) = stack_ptr;
534      *(addr + ESP_OFF) = stack_ptr;
535      *(addr + RET_OFF) = jmp_addr;
536
537      addr = (unsigned32 *) stack_ptr;
538
539      addr[ 0 ] = jmp_addr;
540      addr[ 1 ] = (unsigned32) stack_ptr;
541      addr[ 2 ] = (unsigned32) stack_ptr;
542    }
543
544#else
545#error "UNKNOWN CPU!!!"
546#endif
547
548}
549
550/*PAGE
551 *
552 *  _CPU_Context_restore
553 */
554
555void _CPU_Context_restore(
556  Context_Control  *next
557)
558{
559  Context_Control_overlay *nextp = (Context_Control_overlay *)next;
560
561  _CPU_ISR_Enable(nextp->isr_level);
562  longjmp( nextp->regs, 0 );
563}
564
565/*PAGE
566 *
567 *  _CPU_Context_switch
568 */
569
570static void do_jump(
571  Context_Control_overlay *currentp,
572  Context_Control_overlay *nextp
573);
574
575void _CPU_Context_switch(
576  Context_Control  *current,
577  Context_Control  *next
578)
579{
580  Context_Control_overlay *currentp = (Context_Control_overlay *)current;
581  Context_Control_overlay *nextp = (Context_Control_overlay *)next;
582#if 0
583  int status;
584#endif
585
586  currentp->isr_level = _CPU_ISR_Disable_support();
587
588  do_jump( currentp, nextp );
589
590#if 0
591  if (sigsetjmp(currentp->regs, 1) == 0) {    /* Save the current context */
592     siglongjmp(nextp->regs, 0);           /* Switch to the new context */
593     _Internal_error_Occurred(
594         INTERNAL_ERROR_CORE,
595         TRUE,
596         status
597       );
598  }
599#endif
600
601#ifdef RTEMS_DEBUG
602    if (_CPU_ISR_Get_level() == 0)
603       abort();
604#endif
605
606  _CPU_ISR_Enable(currentp->isr_level);
607}
608
609static void do_jump(
610  Context_Control_overlay *currentp,
611  Context_Control_overlay *nextp
612)
613{
614  int status;
615
616  if (setjmp(currentp->regs) == 0) {    /* Save the current context */
617     longjmp(nextp->regs, 0);           /* Switch to the new context */
618     _Internal_error_Occurred(
619         INTERNAL_ERROR_CORE,
620         TRUE,
621         status
622       );
623  }
624}
625
626/*PAGE
627 *
628 *  _CPU_Save_float_context
629 */
630
631void _CPU_Save_float_context(
632  Context_Control_fp *fp_context
633)
634{
635}
636
637/*PAGE
638 *
639 *  _CPU_Restore_float_context
640 */
641
642void _CPU_Restore_float_context(
643  Context_Control_fp *fp_context
644)
645{
646}
647
648/*PAGE
649 *
650 *  _CPU_ISR_Disable_support
651 */
652
653unsigned32 _CPU_ISR_Disable_support(void)
654{
655  int status;
656  sigset_t  old_mask;
657
658  sigemptyset( &old_mask );
659  status = sigprocmask(SIG_BLOCK, &_CPU_Signal_mask, &old_mask);
660  if ( status )
661    _Internal_error_Occurred(
662      INTERNAL_ERROR_CORE,
663      TRUE,
664      status
665    );
666
667  if (memcmp((void *)&posix_empty_mask, (void *)&old_mask, sizeof(sigset_t)))
668    return 1;
669
670  return 0;
671}
672
673/*PAGE
674 *
675 *  _CPU_ISR_Enable
676 */
677
678void _CPU_ISR_Enable(
679  unsigned32 level
680)
681{
682  int status;
683
684  if (level == 0)
685    status = sigprocmask(SIG_UNBLOCK, &_CPU_Signal_mask, 0);
686  else
687    status = sigprocmask(SIG_BLOCK, &_CPU_Signal_mask, 0);
688
689  if ( status )
690    _Internal_error_Occurred(
691      INTERNAL_ERROR_CORE,
692      TRUE,
693      status
694    );
695}
696
697/*PAGE
698 *
699 *  _CPU_ISR_Handler
700 *
701 *  External interrupt handler.
702 *  This is installed as a UNIX signal handler.
703 *  It vectors out to specific user interrupt handlers.
704 */
705
706void _CPU_ISR_Handler(int vector)
707{
708  extern void        _Thread_Dispatch(void);
709  extern unsigned32  _Thread_Dispatch_disable_level;
710  extern boolean     _Context_Switch_necessary;
711
712  if (_ISR_Nest_level++ == 0) {
713      /* switch to interrupt stack */
714  }
715
716  _Thread_Dispatch_disable_level++;
717
718  if (_ISR_Vector_table[vector]) {
719     _ISR_Vector_table[vector](vector);
720  } else {
721     _CPU_Stray_signal(vector);
722  }
723
724  if (_ISR_Nest_level-- == 0) {
725      /* switch back to original stack */
726  }
727
728  _Thread_Dispatch_disable_level--;
729
730  if (_Thread_Dispatch_disable_level == 0 &&
731      (_Context_Switch_necessary || _ISR_Signals_to_thread_executing)) {
732      _ISR_Signals_to_thread_executing = FALSE;
733      _CPU_ISR_Enable(0);
734      _Thread_Dispatch();
735  }
736}
737
738/*PAGE
739 *
740 *  _CPU_Stray_signal
741 */
742
743void _CPU_Stray_signal(int sig_num)
744{
745  char buffer[ 4 ];
746
747  /*
748   * print "stray" msg about ones which that might mean something
749   * Avoid using the stdio section of the library.
750   * The following is generally safe.
751   */
752
753  switch (sig_num)
754  {
755#ifdef SIGCLD
756      case SIGCLD:
757          break;
758#endif
759      default:
760      {
761        /*
762         *  We avoid using the stdio section of the library.
763         *  The following is generally safe
764         */
765
766        int digit;
767        int number = sig_num;
768        int len = 0;
769
770        digit = number / 100;
771        number %= 100;
772        if (digit) buffer[len++] = '0' + digit;
773
774        digit = number / 10;
775        number %= 10;
776        if (digit || len) buffer[len++] = '0' + digit;
777
778        digit = number;
779        buffer[len++] = '0' + digit;
780
781        buffer[ len++ ] = '\n';
782
783        write( 2, "Stray signal ", 13 );
784        write( 2, buffer, len );
785
786      }
787  }
788
789  /*
790   * If it was a "fatal" signal, then exit here
791   * If app code has installed a hander for one of these, then
792   * we won't call _CPU_Stray_signal, so this is ok.
793   */
794
795  switch (sig_num) {
796      case SIGINT:
797      case SIGHUP:
798      case SIGQUIT:
799      case SIGILL:
800#ifdef SIGEMT
801      case SIGEMT:
802#endif
803      case SIGKILL:
804      case SIGBUS:
805      case SIGSEGV:
806      case SIGTERM:
807      case SIGIOT:
808        _CPU_Fatal_error(0x100 + sig_num);
809  }
810}
811
812/*PAGE
813 *
814 *  _CPU_Fatal_error
815 */
816
817void _CPU_Fatal_error(unsigned32 error)
818{
819  setitimer(ITIMER_REAL, 0, 0);
820
821  if ( error ) {
822#ifdef RTEMS_DEBUG
823    abort();
824#endif
825    if (getenv("RTEMS_DEBUG"))
826      abort();
827  }
828
829  _exit(error);
830}
831
832/*
833 *  Special Purpose Routines to hide the use of UNIX system calls.
834 */
835
836int _CPU_Set_sync_io_handler(
837  int fd,
838  boolean read,
839  boolean write,
840  boolean except,
841  rtems_sync_io_handler handler
842)
843{
844  if ((fd < FD_SETSIZE) && (_CPU_Sync_io_handlers[fd] == NULL)) {
845    if (read)
846      FD_SET(fd, &sync_io_readfds);
847    else
848      FD_CLR(fd, &sync_io_readfds);
849    if (write)
850      FD_SET(fd, &sync_io_writefds);
851    else
852      FD_CLR(fd, &sync_io_writefds);
853    if (except)
854      FD_SET(fd, &sync_io_exceptfds);
855    else
856      FD_CLR(fd, &sync_io_exceptfds);
857    _CPU_Sync_io_handlers[fd] = handler;
858    if ((fd + 1) > sync_io_nfds)
859      sync_io_nfds = fd + 1;
860    return 0;
861  }
862  return -1;
863}
864
865int _CPU_Clear_sync_io_handler(
866  int fd
867)
868{
869  if ((fd < FD_SETSIZE) && _CPU_Sync_io_handlers[fd]) {
870    FD_CLR(fd, &sync_io_readfds);
871    FD_CLR(fd, &sync_io_writefds);
872    FD_CLR(fd, &sync_io_exceptfds);
873    _CPU_Sync_io_handlers[fd] = NULL;
874    sync_io_nfds = 0;
875    for (fd = 0; fd < FD_SETSIZE; fd++)
876      if (FD_ISSET(fd, &sync_io_readfds) ||
877          FD_ISSET(fd, &sync_io_writefds) ||
878          FD_ISSET(fd, &sync_io_exceptfds))
879        sync_io_nfds = fd + 1;
880    return 0;
881  }
882  return -1;
883}
884
885int _CPU_Get_clock_vector( void )
886{
887  return SIGALRM;
888}
889
890void _CPU_Start_clock(
891  int microseconds
892)
893{
894  struct itimerval  new;
895
896  new.it_value.tv_sec = 0;
897  new.it_value.tv_usec = microseconds;
898  new.it_interval.tv_sec = 0;
899  new.it_interval.tv_usec = microseconds;
900
901  setitimer(ITIMER_REAL, &new, 0);
902}
903
904void _CPU_Stop_clock( void )
905{
906  struct itimerval  new;
907  struct sigaction  act;
908
909  /*
910   * Set the SIGALRM signal to ignore any last
911   * signals that might come in while we are
912   * disarming the timer and removing the interrupt
913   * vector.
914   */
915
916  (void) memset(&act, 0, sizeof(act));
917  act.sa_handler = SIG_IGN;
918
919  sigaction(SIGALRM, &act, 0);
920
921  (void) memset(&new, 0, sizeof(new));
922  setitimer(ITIMER_REAL, &new, 0);
923}
924
925int  _CPU_SHM_Semid;
926extern       void fix_syscall_errno( void );
927
928void _CPU_SHM_Init(
929  unsigned32   maximum_nodes,
930  boolean      is_master_node,
931  void       **shm_address,
932  unsigned32  *shm_length
933)
934{
935  int          i;
936  int          shmid;
937  char        *shm_addr;
938  key_t        shm_key;
939  key_t        sem_key;
940  int          status = 0;  /* to avoid unitialized warnings */
941  int          shm_size;
942
943  if (getenv("RTEMS_SHM_KEY"))
944    shm_key = strtol(getenv("RTEMS_SHM_KEY"), 0, 0);
945  else
946#ifdef RTEMS_SHM_KEY
947    shm_key = RTEMS_SHM_KEY;
948#else
949    shm_key = 0xa000;
950#endif
951
952    if (getenv("RTEMS_SHM_SIZE"))
953      shm_size = strtol(getenv("RTEMS_SHM_SIZE"), 0, 0);
954    else
955#ifdef RTEMS_SHM_SIZE
956      shm_size = RTEMS_SHM_SIZE;
957#else
958      shm_size = 64 * 1024;
959#endif
960
961    if (getenv("RTEMS_SHM_SEMAPHORE_KEY"))
962      sem_key = strtol(getenv("RTEMS_SHM_SEMAPHORE_KEY"), 0, 0);
963    else
964#ifdef RTEMS_SHM_SEMAPHORE_KEY
965      sem_key = RTEMS_SHM_SEMAPHORE_KEY;
966#else
967      sem_key = 0xa001;
968#endif
969
970    shmid = shmget(shm_key, shm_size, IPC_CREAT | 0660);
971    if ( shmid == -1 ) {
972      fix_syscall_errno(); /* in case of newlib */
973      perror( "shmget" );
974      _CPU_Fatal_halt( 0xdead0001 );
975    }
976
977    shm_addr = shmat(shmid, (char *)0, SHM_RND);
978    if ( shm_addr == (void *)-1 ) {
979      fix_syscall_errno(); /* in case of newlib */
980      perror( "shmat" );
981      _CPU_Fatal_halt( 0xdead0002 );
982    }
983
984    _CPU_SHM_Semid = semget(sem_key, maximum_nodes + 1, IPC_CREAT | 0660);
985    if ( _CPU_SHM_Semid == -1 ) {
986      fix_syscall_errno(); /* in case of newlib */
987      perror( "semget" );
988      _CPU_Fatal_halt( 0xdead0003 );
989    }
990
991    if ( is_master_node ) {
992      for ( i=0 ; i <= maximum_nodes ; i++ ) {
993#if !HAS_UNION_SEMUN
994        union semun {
995          int val;
996          struct semid_ds *buf;
997          unsigned short int *array;
998#if defined(__linux__)
999          struct seminfo *__buf;
1000#endif         
1001        } ;
1002#endif
1003        union semun help ;
1004        help.val = 1;
1005        status = semctl( _CPU_SHM_Semid, i, SETVAL, help );
1006
1007        fix_syscall_errno(); /* in case of newlib */
1008        if ( status == -1 ) {
1009          _CPU_Fatal_halt( 0xdead0004 );
1010        }
1011      }
1012    }
1013
1014  *shm_address = shm_addr;
1015  *shm_length = shm_size;
1016
1017}
1018
1019int _CPU_Get_pid( void )
1020{
1021  return getpid();
1022}
1023
1024/*
1025 * Define this to use signals for MPCI shared memory driver.
1026 * If undefined, the shared memory driver will poll from the
1027 * clock interrupt.
1028 * Ref: ../shmsupp/getcfg.c
1029 *
1030 * BEWARE:: many UN*X kernels and debuggers become severely confused when
1031 *          debugging programs which use signals.  The problem is *much*
1032 *          worse when using multiple signals, since ptrace(2) tends to
1033 *          drop all signals except 1 in the case of multiples.
1034 *          On hpux9, this problem was so bad, we couldn't use interrupts
1035 *          with the shared memory driver if we ever hoped to debug
1036 *          RTEMS programs.
1037 *          Maybe systems that use /proc don't have this problem...
1038 */
1039
1040
1041int _CPU_SHM_Get_vector( void )
1042{
1043#ifdef CPU_USE_SHM_INTERRUPTS
1044  return SIGUSR1;
1045#else
1046  return 0;
1047#endif
1048}
1049
1050void _CPU_SHM_Send_interrupt(
1051  int pid,
1052  int vector
1053)
1054{
1055  kill((pid_t) pid, vector);
1056}
1057
1058void _CPU_SHM_Lock(
1059  int semaphore
1060)
1061{
1062  struct sembuf sb;
1063
1064  sb.sem_num = semaphore;
1065  sb.sem_op  = -1;
1066  sb.sem_flg = 0;
1067
1068  while (1) {
1069    int status = -1;
1070
1071    status = semop(_CPU_SHM_Semid, &sb, 1);
1072    if ( status >= 0 )
1073      break;
1074    if ( status == -1 ) {
1075       fix_syscall_errno();    /* in case of newlib */
1076        if (errno == EINTR)
1077            continue;
1078        perror("shm lock");
1079        _CPU_Fatal_halt( 0xdead0005 );
1080    }
1081  }
1082
1083}
1084
1085void _CPU_SHM_Unlock(
1086  int semaphore
1087)
1088{
1089  struct sembuf  sb;
1090  int            status;
1091
1092  sb.sem_num = semaphore;
1093  sb.sem_op  = 1;
1094  sb.sem_flg = 0;
1095
1096  while (1) {
1097    status = semop(_CPU_SHM_Semid, &sb, 1);
1098    if ( status >= 0 )
1099      break;
1100
1101    if ( status == -1 ) {
1102      fix_syscall_errno();    /* in case of newlib */
1103      if (errno == EINTR)
1104          continue;
1105      perror("shm unlock");
1106      _CPU_Fatal_halt( 0xdead0006 );
1107    }
1108  }
1109
1110}
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