source: rtems/cpukit/score/cpu/unix/cpu.c @ b4e3b2b

4.104.114.84.95
Last change on this file since b4e3b2b was b4e3b2b, checked in by Joel Sherrill <joel.sherrill@…>, on Oct 28, 1998 at 7:25:12 PM

Patch from Ian Lance Taylor <ian@…>.

I just happened across the sync_io support in

c/src/exec/score/cpu/unix/cpu.c

(is this documented anywhere?). That looked more useful than the
signal driven I/O I was using before, so I tried it. I ran across a
few bugs in the way it uses select.

Select changes its fd_set arguments, so you can't use global variables
for them. You have to copy them into local variables first.

If select returns -1 with errno set to EINTR, then it has not changed
any of the fd_sets. You can't start looking at them.

When clearing a descriptor, the code has the usual select off by one
error when setting sync_io_nfds.

I don't see how this code could ever have worked correctly.

I have appended a patch for the problems I found.

  • Property mode set to 100644
File size: 23.2 KB
Line 
1/*
2 *  UNIX Simulator Dependent Source
3 *
4 *  COPYRIGHT (c) 1994,95 by Division Incorporated
5 *
6 *  The license and distribution terms for this file may be
7 *  found in the file LICENSE in this distribution or at
8 *  http://www.OARcorp.com/rtems/license.html.
9 *
10 *  $Id$
11 */
12
13#include <rtems/system.h>
14#include <rtems/score/isr.h>
15#include <rtems/score/interr.h>
16
17#if defined(__linux__)
18#define _XOPEN_SOURCE
19#define MALLOC_0_RETURNS_NULL
20#endif
21
22#include <sys/types.h>
23#include <sys/times.h>
24#include <stdio.h>
25#include <stdlib.h>
26#include <setjmp.h>
27#include <signal.h>
28#include <time.h>
29#include <sys/time.h>
30#include <errno.h>
31#include <unistd.h>
32#include <sys/ipc.h>
33#include <sys/shm.h>
34#include <sys/sem.h>
35#include <string.h>   /* memset */
36
37#ifndef SA_RESTART
38#define SA_RESTART 0
39#endif
40
41typedef struct {
42  jmp_buf   regs;
43  int  isr_level;
44} Context_Control_overlay;
45
46void  _CPU_Signal_initialize(void);
47void  _CPU_Stray_signal(int);
48void  _CPU_ISR_Handler(int);
49
50static sigset_t         _CPU_Signal_mask;
51static Context_Control_overlay
52          _CPU_Context_Default_with_ISRs_enabled CPU_STRUCTURE_ALIGNMENT;
53static Context_Control_overlay
54          _CPU_Context_Default_with_ISRs_disabled CPU_STRUCTURE_ALIGNMENT;
55
56/*
57 * Sync IO support, an entry for each fd that can be set
58 */
59
60void  _CPU_Sync_io_Init();
61
62static rtems_sync_io_handler _CPU_Sync_io_handlers[FD_SETSIZE];
63static int sync_io_nfds;
64static fd_set sync_io_readfds;
65static fd_set sync_io_writefds;
66static fd_set sync_io_exceptfds;
67
68/*
69 * Which cpu are we? Used by libcpu and libbsp.
70 */
71
72int cpu_number;
73
74/*PAGE
75 *
76 *  _CPU_ISR_From_CPU_Init
77 */
78
79sigset_t  posix_empty_mask;
80
81void _CPU_ISR_From_CPU_Init()
82{
83  unsigned32        i;
84  proc_ptr          old_handler;
85
86  /*
87   * Generate an empty mask to be used by disable_support
88   */
89
90  sigemptyset(&posix_empty_mask);
91
92  /*
93   * Block all the signals except SIGTRAP for the debugger
94   * and fatal error signals.
95   */
96
97  (void) sigfillset(&_CPU_Signal_mask);
98  (void) sigdelset(&_CPU_Signal_mask, SIGTRAP);
99  (void) sigdelset(&_CPU_Signal_mask, SIGABRT);
100  (void) sigdelset(&_CPU_Signal_mask, SIGIOT);
101  (void) sigdelset(&_CPU_Signal_mask, SIGCONT);
102  (void) sigdelset(&_CPU_Signal_mask, SIGSEGV);
103  (void) sigdelset(&_CPU_Signal_mask, SIGBUS);
104  (void) sigdelset(&_CPU_Signal_mask, SIGFPE);
105
106  _CPU_ISR_Enable(1);
107
108  /*
109   * Set the handler for all signals to be signal_handler
110   * which will then vector out to the correct handler
111   * for whichever signal actually happened. Initially
112   * set the vectors to the stray signal handler.
113   */
114
115  for (i = 0; i < CPU_INTERRUPT_NUMBER_OF_VECTORS; i++)
116      (void)_CPU_ISR_install_vector(i, _CPU_Stray_signal, &old_handler);
117
118  _CPU_Signal_initialize();
119}
120
121void _CPU_Signal_initialize( void )
122{
123  struct sigaction  act;
124  sigset_t          mask;
125
126  /* mark them all active except for TraceTrap  and Abort */
127
128  mask = _CPU_Signal_mask;
129  sigprocmask(SIG_UNBLOCK, &mask, 0);
130
131  act.sa_handler = _CPU_ISR_Handler;
132  act.sa_mask = mask;
133  act.sa_flags = SA_RESTART;
134
135  sigaction(SIGHUP, &act, 0);
136  sigaction(SIGINT, &act, 0);
137  sigaction(SIGQUIT, &act, 0);
138  sigaction(SIGILL, &act, 0);
139#ifdef SIGEMT
140  sigaction(SIGEMT, &act, 0);
141#endif
142  sigaction(SIGFPE, &act, 0);
143  sigaction(SIGKILL, &act, 0);
144  sigaction(SIGBUS, &act, 0);
145  sigaction(SIGSEGV, &act, 0);
146#ifdef SIGSYS
147  sigaction(SIGSYS, &act, 0);
148#endif
149  sigaction(SIGPIPE, &act, 0);
150  sigaction(SIGALRM, &act, 0);
151  sigaction(SIGTERM, &act, 0);
152  sigaction(SIGUSR1, &act, 0);
153  sigaction(SIGUSR2, &act, 0);
154  sigaction(SIGCHLD, &act, 0);
155#ifdef SIGCLD
156  sigaction(SIGCLD, &act, 0);
157#endif
158#ifdef SIGPWR
159  sigaction(SIGPWR, &act, 0);
160#endif
161  sigaction(SIGVTALRM, &act, 0);
162  sigaction(SIGPROF, &act, 0);
163  sigaction(SIGIO, &act, 0);
164  sigaction(SIGWINCH, &act, 0);
165  sigaction(SIGSTOP, &act, 0);
166  sigaction(SIGTTIN, &act, 0);
167  sigaction(SIGTTOU, &act, 0);
168  sigaction(SIGURG, &act, 0);
169#ifdef SIGLOST
170    sigaction(SIGLOST, &act, 0);
171#endif
172}
173
174/*PAGE
175 *
176 *  _CPU_Context_From_CPU_Init
177 */
178
179void _CPU_Context_From_CPU_Init()
180{
181
182#if defined(__hppa__) && defined(RTEMS_UNIXLIB_SETJMP)
183    /*
184     * HACK - set the _SYSTEM_ID to 0x20c so that setjmp/longjmp
185     * will handle the full 32 floating point registers.
186     */
187
188    {
189      extern unsigned32 _SYSTEM_ID;
190
191      _SYSTEM_ID = 0x20c;
192    }
193#endif
194
195  /*
196   *  get default values to use in _CPU_Context_Initialize()
197   */
198
199
200  (void) memset(
201    &_CPU_Context_Default_with_ISRs_enabled,
202    0,
203    sizeof(Context_Control)
204  );
205  (void) memset(
206    &_CPU_Context_Default_with_ISRs_disabled,
207    0,
208    sizeof(Context_Control)
209  );
210
211  _CPU_ISR_Set_level( 0 );
212  _CPU_Context_switch(
213    (Context_Control *) &_CPU_Context_Default_with_ISRs_enabled,
214    (Context_Control *) &_CPU_Context_Default_with_ISRs_enabled
215  );
216
217  _CPU_ISR_Set_level( 1 );
218  _CPU_Context_switch(
219    (Context_Control *) &_CPU_Context_Default_with_ISRs_disabled,
220    (Context_Control *) &_CPU_Context_Default_with_ISRs_disabled
221  );
222}
223
224/*PAGE
225 *
226 *  _CPU_Sync_io_Init
227 */
228
229void _CPU_Sync_io_Init()
230{
231  int fd;
232
233  for (fd = 0; fd < FD_SETSIZE; fd++)
234    _CPU_Sync_io_handlers[fd] = NULL;
235
236  sync_io_nfds = 0;
237  FD_ZERO(&sync_io_readfds);
238  FD_ZERO(&sync_io_writefds);
239  FD_ZERO(&sync_io_exceptfds);
240}
241
242/*PAGE
243 *
244 *  _CPU_ISR_Get_level
245 */
246
247unsigned32 _CPU_ISR_Get_level( void )
248{
249  sigset_t old_mask;
250
251#if defined(__linux__)
252  sigemptyset( &old_mask );
253#endif
254  sigprocmask(SIG_BLOCK, 0, &old_mask);
255
256  if (memcmp((void *)&posix_empty_mask, (void *)&old_mask, sizeof(sigset_t)))
257      return 1;
258
259  return 0;
260}
261
262/*  _CPU_Initialize
263 *
264 *  This routine performs processor dependent initialization.
265 *
266 *  INPUT PARAMETERS:
267 *    cpu_table       - CPU table to initialize
268 *    thread_dispatch - address of disptaching routine
269 */
270
271
272void _CPU_Initialize(
273  rtems_cpu_table  *cpu_table,
274  void            (*thread_dispatch)      /* ignored on this CPU */
275)
276{
277  /*
278   *  The thread_dispatch argument is the address of the entry point
279   *  for the routine called at the end of an ISR once it has been
280   *  decided a context switch is necessary.  On some compilation
281   *  systems it is difficult to call a high-level language routine
282   *  from assembly.  This allows us to trick these systems.
283   *
284   *  If you encounter this problem save the entry point in a CPU
285   *  dependent variable.
286   */
287
288  _CPU_Thread_dispatch_pointer = thread_dispatch;
289
290  /*
291   * XXX; If there is not an easy way to initialize the FP context
292   *      during Context_Initialize, then it is usually easier to
293   *      save an "uninitialized" FP context here and copy it to
294   *      the task's during Context_Initialize.
295   */
296
297  /* XXX: FP context initialization support */
298
299  _CPU_Table = *cpu_table;
300
301  _CPU_ISR_From_CPU_Init();
302
303  _CPU_Sync_io_Init();
304
305  _CPU_Context_From_CPU_Init();
306
307}
308
309/*PAGE
310 *
311 *  _CPU_ISR_install_raw_handler
312 */
313
314void _CPU_ISR_install_raw_handler(
315  unsigned32  vector,
316  proc_ptr    new_handler,
317  proc_ptr   *old_handler
318)
319{
320  _CPU_Fatal_halt( 0xdeaddead );
321}
322
323/*PAGE
324 *
325 *  _CPU_ISR_install_vector
326 *
327 *  This kernel routine installs the RTEMS handler for the
328 *  specified vector.
329 *
330 *  Input parameters:
331 *    vector      - interrupt vector number
332 *    old_handler - former ISR for this vector number
333 *    new_handler - replacement ISR for this vector number
334 *
335 *  Output parameters:  NONE
336 *
337 */
338
339
340void _CPU_ISR_install_vector(
341  unsigned32  vector,
342  proc_ptr    new_handler,
343  proc_ptr   *old_handler
344)
345{
346   *old_handler = _ISR_Vector_table[ vector ];
347
348   /*
349    *  If the interrupt vector table is a table of pointer to isr entry
350    *  points, then we need to install the appropriate RTEMS interrupt
351    *  handler for this vector number.
352    */
353
354   /*
355    *  We put the actual user ISR address in '_ISR_vector_table'.  This will
356    *  be used by the _CPU_ISR_Handler so the user gets control.
357    */
358
359    _ISR_Vector_table[ vector ] = new_handler;
360}
361
362/*PAGE
363 *
364 *  _CPU_Install_interrupt_stack
365 */
366
367void _CPU_Install_interrupt_stack( void )
368{
369}
370
371/*PAGE
372 *
373 *  _CPU_Thread_Idle_body
374 *
375 *  Stop until we get a signal which is the logically the same thing
376 *  entering low-power or sleep mode on a real processor and waiting for
377 *  an interrupt.  This significantly reduces the consumption of host
378 *  CPU cycles which is again similar to low power mode.
379 */
380
381void _CPU_Thread_Idle_body( void )
382{
383#if CPU_SYNC_IO
384  extern void _Thread_Dispatch(void);
385  int fd;
386#endif
387
388  while (1) {
389#ifdef RTEMS_DEBUG
390    /* interrupts had better be enabled at this point! */
391    if (_CPU_ISR_Get_level() != 0)
392       abort();
393#endif
394
395    /*
396     *  Block on a select statement, the CPU interface added allow the
397     *  user to add new descriptors which are to be blocked on
398     */
399
400#if CPU_SYNC_IO
401    if (sync_io_nfds) {
402      int result;
403      fd_set readfds, writefds, exceptfds;
404
405      readfds = sync_io_readfds;
406      writefds = sync_io_writefds;
407      exceptfds = sync_io_exceptfds;
408      result = select(sync_io_nfds,
409                 &readfds,
410                 &writefds,
411                 &exceptfds,
412                 NULL);
413
414      if (result < 0) {
415        if (errno != EINTR)
416          _CPU_Fatal_error(0x200);       /* FIXME : what number should go here !! */
417        _Thread_Dispatch();
418        continue;
419      }
420
421      for (fd = 0; fd < sync_io_nfds; fd++) {
422        boolean read = FD_ISSET(fd, &readfds);
423        boolean write = FD_ISSET(fd, &writefds);
424        boolean except = FD_ISSET(fd, &exceptfds);
425
426        if (_CPU_Sync_io_handlers[fd] && (read || write || except))
427          _CPU_Sync_io_handlers[fd](fd, read, write, except);
428      }
429
430      _Thread_Dispatch();
431    } else
432      pause();
433#else
434    pause();
435#endif
436
437  }
438
439}
440
441/*PAGE
442 *
443 *  _CPU_Context_Initialize
444 */
445
446void _CPU_Context_Initialize(
447  Context_Control  *_the_context,
448  unsigned32       *_stack_base,
449  unsigned32        _size,
450  unsigned32        _new_level,
451  void             *_entry_point,
452  boolean           _is_fp
453)
454{
455  unsigned32  *addr;
456  unsigned32   jmp_addr;
457  unsigned32   _stack_low;   /* lowest "stack aligned" address */
458  unsigned32   _stack_high;  /* highest "stack aligned" address */
459  unsigned32   _the_size;
460
461  jmp_addr = (unsigned32) _entry_point;
462
463  /*
464   *  On CPUs with stacks which grow down, we build the stack
465   *  based on the _stack_high address.  On CPUs with stacks which
466   *  grow up, we build the stack based on the _stack_low address.
467   */
468
469  _stack_low = (unsigned32)(_stack_base) + CPU_STACK_ALIGNMENT - 1;
470  _stack_low &= ~(CPU_STACK_ALIGNMENT - 1);
471
472  _stack_high = (unsigned32)(_stack_base) + _size;
473  _stack_high &= ~(CPU_STACK_ALIGNMENT - 1);
474
475  if (_stack_high > _stack_low)
476    _the_size = _stack_high - _stack_low;
477  else
478    _the_size = _stack_low - _stack_high;
479
480  /*
481   * Slam our jmp_buf template into the context we are creating
482   */
483
484  if ( _new_level == 0 )
485      *_the_context = *(Context_Control *)
486                         &_CPU_Context_Default_with_ISRs_enabled;
487  else
488      *_the_context = *(Context_Control *)
489                         &_CPU_Context_Default_with_ISRs_disabled;
490
491  addr = (unsigned32 *)_the_context;
492
493#if defined(__hppa__)
494  *(addr + RP_OFF) = jmp_addr;
495  *(addr + SP_OFF) = (unsigned32)(_stack_low + CPU_FRAME_SIZE);
496
497  /*
498   * See if we are using shared libraries by checking
499   * bit 30 in 24 off of newp. If bit 30 is set then
500   * we are using shared libraries and the jump address
501   * points to the pointer, so we put that into rp instead.
502   */
503
504  if (jmp_addr & 0x40000000) {
505    jmp_addr &= 0xfffffffc;
506     *(addr + RP_OFF) = *(unsigned32 *)jmp_addr;
507  }
508#elif defined(__sparc__)
509
510  /*
511   *  See /usr/include/sys/stack.h in Solaris 2.3 for a nice
512   *  diagram of the stack.
513   */
514
515  asm ("ta  0x03");            /* flush registers */
516
517  *(addr + RP_OFF) = jmp_addr + ADDR_ADJ_OFFSET;
518  *(addr + SP_OFF) = (unsigned32)(_stack_high - CPU_FRAME_SIZE);
519  *(addr + FP_OFF) = (unsigned32)(_stack_high);
520
521#elif defined(__i386__)
522
523    /*
524     *  This information was gathered by disassembling setjmp().
525     */
526
527    {
528      unsigned32 stack_ptr;
529
530      stack_ptr = _stack_high - CPU_FRAME_SIZE;
531
532      *(addr + EBX_OFF) = 0xFEEDFEED;
533      *(addr + ESI_OFF) = 0xDEADDEAD;
534      *(addr + EDI_OFF) = 0xDEAFDEAF;
535      *(addr + EBP_OFF) = stack_ptr;
536      *(addr + ESP_OFF) = stack_ptr;
537      *(addr + RET_OFF) = jmp_addr;
538
539      addr = (unsigned32 *) stack_ptr;
540
541      addr[ 0 ] = jmp_addr;
542      addr[ 1 ] = (unsigned32) stack_ptr;
543      addr[ 2 ] = (unsigned32) stack_ptr;
544    }
545
546#else
547#error "UNKNOWN CPU!!!"
548#endif
549
550}
551
552/*PAGE
553 *
554 *  _CPU_Context_restore
555 */
556
557void _CPU_Context_restore(
558  Context_Control  *next
559)
560{
561  Context_Control_overlay *nextp = (Context_Control_overlay *)next;
562
563  _CPU_ISR_Enable(nextp->isr_level);
564  longjmp( nextp->regs, 0 );
565}
566
567/*PAGE
568 *
569 *  _CPU_Context_switch
570 */
571
572static void do_jump(
573  Context_Control_overlay *currentp,
574  Context_Control_overlay *nextp
575);
576
577void _CPU_Context_switch(
578  Context_Control  *current,
579  Context_Control  *next
580)
581{
582  Context_Control_overlay *currentp = (Context_Control_overlay *)current;
583  Context_Control_overlay *nextp = (Context_Control_overlay *)next;
584#if 0
585  int status;
586#endif
587
588  currentp->isr_level = _CPU_ISR_Disable_support();
589
590  do_jump( currentp, nextp );
591
592#if 0
593  if (sigsetjmp(currentp->regs, 1) == 0) {    /* Save the current context */
594     siglongjmp(nextp->regs, 0);           /* Switch to the new context */
595     _Internal_error_Occurred(
596         INTERNAL_ERROR_CORE,
597         TRUE,
598         status
599       );
600  }
601#endif
602
603#ifdef RTEMS_DEBUG
604    if (_CPU_ISR_Get_level() == 0)
605       abort();
606#endif
607
608  _CPU_ISR_Enable(currentp->isr_level);
609}
610
611static void do_jump(
612  Context_Control_overlay *currentp,
613  Context_Control_overlay *nextp
614)
615{
616  int status;
617
618  if (setjmp(currentp->regs) == 0) {    /* Save the current context */
619     longjmp(nextp->regs, 0);           /* Switch to the new context */
620     _Internal_error_Occurred(
621         INTERNAL_ERROR_CORE,
622         TRUE,
623         status
624       );
625  }
626}
627
628/*PAGE
629 *
630 *  _CPU_Save_float_context
631 */
632
633void _CPU_Save_float_context(
634  Context_Control_fp *fp_context
635)
636{
637}
638
639/*PAGE
640 *
641 *  _CPU_Restore_float_context
642 */
643
644void _CPU_Restore_float_context(
645  Context_Control_fp *fp_context
646)
647{
648}
649
650/*PAGE
651 *
652 *  _CPU_ISR_Disable_support
653 */
654
655unsigned32 _CPU_ISR_Disable_support(void)
656{
657  int status;
658  sigset_t  old_mask;
659
660  status = sigprocmask(SIG_BLOCK, &_CPU_Signal_mask, &old_mask);
661  if ( status )
662    _Internal_error_Occurred(
663      INTERNAL_ERROR_CORE,
664      TRUE,
665      status
666    );
667
668  if (memcmp((void *)&posix_empty_mask, (void *)&old_mask, sizeof(sigset_t)))
669    return 1;
670
671  return 0;
672}
673
674/*PAGE
675 *
676 *  _CPU_ISR_Enable
677 */
678
679void _CPU_ISR_Enable(
680  unsigned32 level
681)
682{
683  int status;
684
685  if (level == 0)
686    status = sigprocmask(SIG_UNBLOCK, &_CPU_Signal_mask, 0);
687  else
688    status = sigprocmask(SIG_BLOCK, &_CPU_Signal_mask, 0);
689
690  if ( status )
691    _Internal_error_Occurred(
692      INTERNAL_ERROR_CORE,
693      TRUE,
694      status
695    );
696}
697
698/*PAGE
699 *
700 *  _CPU_ISR_Handler
701 *
702 *  External interrupt handler.
703 *  This is installed as a UNIX signal handler.
704 *  It vectors out to specific user interrupt handlers.
705 */
706
707void _CPU_ISR_Handler(int vector)
708{
709  extern void        _Thread_Dispatch(void);
710  extern unsigned32  _Thread_Dispatch_disable_level;
711  extern boolean     _Context_Switch_necessary;
712
713  if (_ISR_Nest_level++ == 0) {
714      /* switch to interrupt stack */
715  }
716
717  _Thread_Dispatch_disable_level++;
718
719  if (_ISR_Vector_table[vector]) {
720     _ISR_Vector_table[vector](vector);
721  } else {
722     _CPU_Stray_signal(vector);
723  }
724
725  if (_ISR_Nest_level-- == 0) {
726      /* switch back to original stack */
727  }
728
729  _Thread_Dispatch_disable_level--;
730
731  if (_Thread_Dispatch_disable_level == 0 &&
732      (_Context_Switch_necessary || _ISR_Signals_to_thread_executing)) {
733      _ISR_Signals_to_thread_executing = FALSE;
734      _CPU_ISR_Enable(0);
735      _Thread_Dispatch();
736  }
737}
738
739/*PAGE
740 *
741 *  _CPU_Stray_signal
742 */
743
744void _CPU_Stray_signal(int sig_num)
745{
746  char buffer[ 4 ];
747
748  /*
749   * print "stray" msg about ones which that might mean something
750   * Avoid using the stdio section of the library.
751   * The following is generally safe.
752   */
753
754  switch (sig_num)
755  {
756#ifdef SIGCLD
757      case SIGCLD:
758          break;
759#endif
760      default:
761      {
762        /*
763         *  We avoid using the stdio section of the library.
764         *  The following is generally safe
765         */
766
767        int digit;
768        int number = sig_num;
769        int len = 0;
770
771        digit = number / 100;
772        number %= 100;
773        if (digit) buffer[len++] = '0' + digit;
774
775        digit = number / 10;
776        number %= 10;
777        if (digit || len) buffer[len++] = '0' + digit;
778
779        digit = number;
780        buffer[len++] = '0' + digit;
781
782        buffer[ len++ ] = '\n';
783
784        write( 2, "Stray signal ", 13 );
785        write( 2, buffer, len );
786
787      }
788  }
789
790  /*
791   * If it was a "fatal" signal, then exit here
792   * If app code has installed a hander for one of these, then
793   * we won't call _CPU_Stray_signal, so this is ok.
794   */
795
796  switch (sig_num) {
797      case SIGINT:
798      case SIGHUP:
799      case SIGQUIT:
800      case SIGILL:
801#ifdef SIGEMT
802      case SIGEMT:
803#endif
804      case SIGKILL:
805      case SIGBUS:
806      case SIGSEGV:
807      case SIGTERM:
808      case SIGIOT:
809        _CPU_Fatal_error(0x100 + sig_num);
810  }
811}
812
813/*PAGE
814 *
815 *  _CPU_Fatal_error
816 */
817
818void _CPU_Fatal_error(unsigned32 error)
819{
820  setitimer(ITIMER_REAL, 0, 0);
821
822  if ( error ) {
823#ifdef RTEMS_DEBUG
824    abort();
825#endif
826    if (getenv("RTEMS_DEBUG"))
827      abort();
828  }
829
830  _exit(error);
831}
832
833/*
834 *  Special Purpose Routines to hide the use of UNIX system calls.
835 */
836
837int _CPU_Set_sync_io_handler(
838  int fd,
839  boolean read,
840  boolean write,
841  boolean except,
842  rtems_sync_io_handler handler
843)
844{
845  if ((fd < FD_SETSIZE) && (_CPU_Sync_io_handlers[fd] == NULL)) {
846    if (read)
847      FD_SET(fd, &sync_io_readfds);
848    else
849      FD_CLR(fd, &sync_io_readfds);
850    if (write)
851      FD_SET(fd, &sync_io_writefds);
852    else
853      FD_CLR(fd, &sync_io_writefds);
854    if (except)
855      FD_SET(fd, &sync_io_exceptfds);
856    else
857      FD_CLR(fd, &sync_io_exceptfds);
858    _CPU_Sync_io_handlers[fd] = handler;
859    if ((fd + 1) > sync_io_nfds)
860      sync_io_nfds = fd + 1;
861    return 0;
862  }
863  return -1;
864}
865
866int _CPU_Clear_sync_io_handler(
867  int fd
868)
869{
870  if ((fd < FD_SETSIZE) && _CPU_Sync_io_handlers[fd]) {
871    FD_CLR(fd, &sync_io_readfds);
872    FD_CLR(fd, &sync_io_writefds);
873    FD_CLR(fd, &sync_io_exceptfds);
874    _CPU_Sync_io_handlers[fd] = NULL;
875    sync_io_nfds = 0;
876    for (fd = 0; fd < FD_SETSIZE; fd++)
877      if (FD_ISSET(fd, &sync_io_readfds) ||
878          FD_ISSET(fd, &sync_io_writefds) ||
879          FD_ISSET(fd, &sync_io_exceptfds))
880        sync_io_nfds = fd + 1;
881    return 0;
882  }
883  return -1;
884}
885
886int _CPU_Get_clock_vector( void )
887{
888  return SIGALRM;
889}
890
891void _CPU_Start_clock(
892  int microseconds
893)
894{
895  struct itimerval  new;
896
897  new.it_value.tv_sec = 0;
898  new.it_value.tv_usec = microseconds;
899  new.it_interval.tv_sec = 0;
900  new.it_interval.tv_usec = microseconds;
901
902  setitimer(ITIMER_REAL, &new, 0);
903}
904
905void _CPU_Stop_clock( void )
906{
907  struct itimerval  new;
908  struct sigaction  act;
909
910  /*
911   * Set the SIGALRM signal to ignore any last
912   * signals that might come in while we are
913   * disarming the timer and removing the interrupt
914   * vector.
915   */
916
917  (void) memset(&act, 0, sizeof(act));
918  act.sa_handler = SIG_IGN;
919
920  sigaction(SIGALRM, &act, 0);
921
922  (void) memset(&new, 0, sizeof(new));
923  setitimer(ITIMER_REAL, &new, 0);
924}
925
926int  _CPU_SHM_Semid;
927extern       void fix_syscall_errno( void );
928
929void _CPU_SHM_Init(
930  unsigned32   maximum_nodes,
931  boolean      is_master_node,
932  void       **shm_address,
933  unsigned32  *shm_length
934)
935{
936  int          i;
937  int          shmid;
938  char        *shm_addr;
939  key_t        shm_key;
940  key_t        sem_key;
941  int          status = 0;  /* to avoid unitialized warnings */
942  int          shm_size;
943
944  if (getenv("RTEMS_SHM_KEY"))
945    shm_key = strtol(getenv("RTEMS_SHM_KEY"), 0, 0);
946  else
947#ifdef RTEMS_SHM_KEY
948    shm_key = RTEMS_SHM_KEY;
949#else
950    shm_key = 0xa000;
951#endif
952
953    if (getenv("RTEMS_SHM_SIZE"))
954      shm_size = strtol(getenv("RTEMS_SHM_SIZE"), 0, 0);
955    else
956#ifdef RTEMS_SHM_SIZE
957      shm_size = RTEMS_SHM_SIZE;
958#else
959      shm_size = 64 * 1024;
960#endif
961
962    if (getenv("RTEMS_SHM_SEMAPHORE_KEY"))
963      sem_key = strtol(getenv("RTEMS_SHM_SEMAPHORE_KEY"), 0, 0);
964    else
965#ifdef RTEMS_SHM_SEMAPHORE_KEY
966      sem_key = RTEMS_SHM_SEMAPHORE_KEY;
967#else
968      sem_key = 0xa001;
969#endif
970
971    shmid = shmget(shm_key, shm_size, IPC_CREAT | 0660);
972    if ( shmid == -1 ) {
973      fix_syscall_errno(); /* in case of newlib */
974      perror( "shmget" );
975      _CPU_Fatal_halt( 0xdead0001 );
976    }
977
978    shm_addr = shmat(shmid, (char *)0, SHM_RND);
979    if ( shm_addr == (void *)-1 ) {
980      fix_syscall_errno(); /* in case of newlib */
981      perror( "shmat" );
982      _CPU_Fatal_halt( 0xdead0002 );
983    }
984
985    _CPU_SHM_Semid = semget(sem_key, maximum_nodes + 1, IPC_CREAT | 0660);
986    if ( _CPU_SHM_Semid == -1 ) {
987      fix_syscall_errno(); /* in case of newlib */
988      perror( "semget" );
989      _CPU_Fatal_halt( 0xdead0003 );
990    }
991
992    if ( is_master_node ) {
993      for ( i=0 ; i <= maximum_nodes ; i++ ) {
994#if defined(solaris2)
995        union semun {
996          int val;
997          struct semid_ds *buf;
998          ushort *array;
999        } help;
1000
1001        help.val = 1;
1002        status = semctl( _CPU_SHM_Semid, i, SETVAL, help );
1003#elif defined(__linux__) || defined(__FreeBSD__)
1004        union semun help;
1005
1006        help.val = 1;
1007        status = semctl( _CPU_SHM_Semid, i, SETVAL, help );
1008#elif defined(hpux)
1009        status = semctl( _CPU_SHM_Semid, i, SETVAL, 1 );
1010#else
1011#error "Not a supported unix variant"
1012#endif
1013
1014        fix_syscall_errno(); /* in case of newlib */
1015        if ( status == -1 ) {
1016          _CPU_Fatal_halt( 0xdead0004 );
1017        }
1018      }
1019    }
1020
1021  *shm_address = shm_addr;
1022  *shm_length = shm_size;
1023
1024}
1025
1026int _CPU_Get_pid( void )
1027{
1028  return getpid();
1029}
1030
1031/*
1032 * Define this to use signals for MPCI shared memory driver.
1033 * If undefined, the shared memory driver will poll from the
1034 * clock interrupt.
1035 * Ref: ../shmsupp/getcfg.c
1036 *
1037 * BEWARE:: many UN*X kernels and debuggers become severely confused when
1038 *          debugging programs which use signals.  The problem is *much*
1039 *          worse when using multiple signals, since ptrace(2) tends to
1040 *          drop all signals except 1 in the case of multiples.
1041 *          On hpux9, this problem was so bad, we couldn't use interrupts
1042 *          with the shared memory driver if we ever hoped to debug
1043 *          RTEMS programs.
1044 *          Maybe systems that use /proc don't have this problem...
1045 */
1046
1047
1048int _CPU_SHM_Get_vector( void )
1049{
1050#ifdef CPU_USE_SHM_INTERRUPTS
1051  return SIGUSR1;
1052#else
1053  return 0;
1054#endif
1055}
1056
1057void _CPU_SHM_Send_interrupt(
1058  int pid,
1059  int vector
1060)
1061{
1062  kill((pid_t) pid, vector);
1063}
1064
1065void _CPU_SHM_Lock(
1066  int semaphore
1067)
1068{
1069  struct sembuf sb;
1070
1071  sb.sem_num = semaphore;
1072  sb.sem_op  = -1;
1073  sb.sem_flg = 0;
1074
1075  while (1) {
1076    int status = -1;
1077
1078    status = semop(_CPU_SHM_Semid, &sb, 1);
1079    if ( status >= 0 )
1080      break;
1081    if ( status == -1 ) {
1082       fix_syscall_errno();    /* in case of newlib */
1083        if (errno == EINTR)
1084            continue;
1085        perror("shm lock");
1086        _CPU_Fatal_halt( 0xdead0005 );
1087    }
1088  }
1089
1090}
1091
1092void _CPU_SHM_Unlock(
1093  int semaphore
1094)
1095{
1096  struct sembuf  sb;
1097  int            status;
1098
1099  sb.sem_num = semaphore;
1100  sb.sem_op  = 1;
1101  sb.sem_flg = 0;
1102
1103  while (1) {
1104    status = semop(_CPU_SHM_Semid, &sb, 1);
1105    if ( status >= 0 )
1106      break;
1107
1108    if ( status == -1 ) {
1109      fix_syscall_errno();    /* in case of newlib */
1110      if (errno == EINTR)
1111          continue;
1112      perror("shm unlock");
1113      _CPU_Fatal_halt( 0xdead0006 );
1114    }
1115  }
1116
1117}
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