1 | /* |
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2 | * UNIX Simulator Dependent Source |
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3 | * |
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4 | * COPYRIGHT (c) 1994,95 by Division Incorporated |
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5 | * |
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6 | * The license and distribution terms for this file may be |
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7 | * found in the file LICENSE in this distribution or at |
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8 | * http://www.OARcorp.com/rtems/license.html. |
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9 | * |
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10 | * $Id$ |
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11 | */ |
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12 | |
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13 | #include <rtems/system.h> |
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14 | #include <rtems/score/isr.h> |
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15 | #include <rtems/score/interr.h> |
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16 | |
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17 | #if defined(__linux__) |
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18 | #define _XOPEN_SOURCE |
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19 | #define MALLOC_0_RETURNS_NULL |
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20 | #endif |
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21 | |
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22 | #include <sys/types.h> |
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23 | #include <sys/times.h> |
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24 | #include <stdio.h> |
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25 | #include <stdlib.h> |
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26 | #include <setjmp.h> |
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27 | #include <signal.h> |
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28 | #include <time.h> |
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29 | #include <sys/time.h> |
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30 | #include <errno.h> |
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31 | #include <unistd.h> |
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32 | #include <sys/ipc.h> |
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33 | #include <sys/shm.h> |
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34 | #include <sys/sem.h> |
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35 | #include <string.h> /* memset */ |
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36 | |
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37 | #ifndef SA_RESTART |
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38 | #define SA_RESTART 0 |
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39 | #endif |
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40 | |
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41 | typedef struct { |
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42 | jmp_buf regs; |
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43 | int isr_level; |
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44 | } Context_Control_overlay; |
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45 | |
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46 | void _CPU_Signal_initialize(void); |
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47 | void _CPU_Stray_signal(int); |
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48 | void _CPU_ISR_Handler(int); |
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49 | |
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50 | static sigset_t _CPU_Signal_mask; |
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51 | static Context_Control_overlay |
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52 | _CPU_Context_Default_with_ISRs_enabled CPU_STRUCTURE_ALIGNMENT; |
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53 | static Context_Control_overlay |
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54 | _CPU_Context_Default_with_ISRs_disabled CPU_STRUCTURE_ALIGNMENT; |
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55 | |
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56 | /* |
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57 | * Sync IO support, an entry for each fd that can be set |
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58 | */ |
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59 | |
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60 | void _CPU_Sync_io_Init(); |
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61 | |
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62 | static rtems_sync_io_handler _CPU_Sync_io_handlers[FD_SETSIZE]; |
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63 | static int sync_io_nfds; |
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64 | static fd_set sync_io_readfds; |
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65 | static fd_set sync_io_writefds; |
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66 | static fd_set sync_io_exceptfds; |
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67 | |
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68 | /* |
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69 | * Which cpu are we? Used by libcpu and libbsp. |
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70 | */ |
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71 | |
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72 | int cpu_number; |
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73 | |
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74 | /*PAGE |
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75 | * |
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76 | * _CPU_ISR_From_CPU_Init |
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77 | */ |
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78 | |
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79 | sigset_t posix_empty_mask; |
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80 | |
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81 | void _CPU_ISR_From_CPU_Init() |
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82 | { |
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83 | unsigned32 i; |
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84 | proc_ptr old_handler; |
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85 | |
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86 | /* |
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87 | * Generate an empty mask to be used by disable_support |
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88 | */ |
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89 | |
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90 | sigemptyset(&posix_empty_mask); |
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91 | |
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92 | /* |
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93 | * Block all the signals except SIGTRAP for the debugger |
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94 | * and fatal error signals. |
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95 | */ |
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96 | |
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97 | (void) sigfillset(&_CPU_Signal_mask); |
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98 | (void) sigdelset(&_CPU_Signal_mask, SIGTRAP); |
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99 | (void) sigdelset(&_CPU_Signal_mask, SIGABRT); |
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100 | (void) sigdelset(&_CPU_Signal_mask, SIGIOT); |
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101 | (void) sigdelset(&_CPU_Signal_mask, SIGCONT); |
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102 | (void) sigdelset(&_CPU_Signal_mask, SIGSEGV); |
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103 | (void) sigdelset(&_CPU_Signal_mask, SIGBUS); |
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104 | (void) sigdelset(&_CPU_Signal_mask, SIGFPE); |
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105 | |
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106 | _CPU_ISR_Enable(1); |
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107 | |
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108 | /* |
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109 | * Set the handler for all signals to be signal_handler |
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110 | * which will then vector out to the correct handler |
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111 | * for whichever signal actually happened. Initially |
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112 | * set the vectors to the stray signal handler. |
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113 | */ |
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114 | |
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115 | for (i = 0; i < CPU_INTERRUPT_NUMBER_OF_VECTORS; i++) |
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116 | (void)_CPU_ISR_install_vector(i, _CPU_Stray_signal, &old_handler); |
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117 | |
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118 | _CPU_Signal_initialize(); |
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119 | } |
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120 | |
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121 | void _CPU_Signal_initialize( void ) |
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122 | { |
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123 | struct sigaction act; |
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124 | sigset_t mask; |
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125 | |
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126 | /* mark them all active except for TraceTrap and Abort */ |
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127 | |
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128 | mask = _CPU_Signal_mask; |
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129 | sigprocmask(SIG_UNBLOCK, &mask, 0); |
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130 | |
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131 | act.sa_handler = _CPU_ISR_Handler; |
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132 | act.sa_mask = mask; |
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133 | act.sa_flags = SA_RESTART; |
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134 | |
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135 | sigaction(SIGHUP, &act, 0); |
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136 | sigaction(SIGINT, &act, 0); |
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137 | sigaction(SIGQUIT, &act, 0); |
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138 | sigaction(SIGILL, &act, 0); |
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139 | #ifdef SIGEMT |
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140 | sigaction(SIGEMT, &act, 0); |
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141 | #endif |
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142 | sigaction(SIGFPE, &act, 0); |
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143 | sigaction(SIGKILL, &act, 0); |
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144 | sigaction(SIGBUS, &act, 0); |
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145 | sigaction(SIGSEGV, &act, 0); |
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146 | #ifdef SIGSYS |
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147 | sigaction(SIGSYS, &act, 0); |
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148 | #endif |
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149 | sigaction(SIGPIPE, &act, 0); |
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150 | sigaction(SIGALRM, &act, 0); |
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151 | sigaction(SIGTERM, &act, 0); |
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152 | sigaction(SIGUSR1, &act, 0); |
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153 | sigaction(SIGUSR2, &act, 0); |
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154 | sigaction(SIGCHLD, &act, 0); |
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155 | #ifdef SIGCLD |
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156 | sigaction(SIGCLD, &act, 0); |
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157 | #endif |
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158 | #ifdef SIGPWR |
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159 | sigaction(SIGPWR, &act, 0); |
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160 | #endif |
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161 | sigaction(SIGVTALRM, &act, 0); |
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162 | sigaction(SIGPROF, &act, 0); |
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163 | sigaction(SIGIO, &act, 0); |
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164 | sigaction(SIGWINCH, &act, 0); |
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165 | sigaction(SIGSTOP, &act, 0); |
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166 | sigaction(SIGTTIN, &act, 0); |
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167 | sigaction(SIGTTOU, &act, 0); |
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168 | sigaction(SIGURG, &act, 0); |
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169 | #ifdef SIGLOST |
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170 | sigaction(SIGLOST, &act, 0); |
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171 | #endif |
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172 | } |
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173 | |
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174 | /*PAGE |
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175 | * |
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176 | * _CPU_Context_From_CPU_Init |
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177 | */ |
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178 | |
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179 | void _CPU_Context_From_CPU_Init() |
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180 | { |
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181 | |
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182 | #if defined(__hppa__) && defined(RTEMS_UNIXLIB_SETJMP) |
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183 | /* |
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184 | * HACK - set the _SYSTEM_ID to 0x20c so that setjmp/longjmp |
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185 | * will handle the full 32 floating point registers. |
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186 | */ |
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187 | |
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188 | { |
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189 | extern unsigned32 _SYSTEM_ID; |
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190 | |
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191 | _SYSTEM_ID = 0x20c; |
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192 | } |
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193 | #endif |
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194 | |
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195 | /* |
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196 | * get default values to use in _CPU_Context_Initialize() |
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197 | */ |
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198 | |
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199 | |
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200 | (void) memset( |
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201 | &_CPU_Context_Default_with_ISRs_enabled, |
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202 | 0, |
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203 | sizeof(Context_Control) |
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204 | ); |
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205 | (void) memset( |
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206 | &_CPU_Context_Default_with_ISRs_disabled, |
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207 | 0, |
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208 | sizeof(Context_Control) |
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209 | ); |
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210 | |
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211 | _CPU_ISR_Set_level( 0 ); |
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212 | _CPU_Context_switch( |
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213 | (Context_Control *) &_CPU_Context_Default_with_ISRs_enabled, |
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214 | (Context_Control *) &_CPU_Context_Default_with_ISRs_enabled |
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215 | ); |
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216 | |
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217 | _CPU_ISR_Set_level( 1 ); |
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218 | _CPU_Context_switch( |
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219 | (Context_Control *) &_CPU_Context_Default_with_ISRs_disabled, |
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220 | (Context_Control *) &_CPU_Context_Default_with_ISRs_disabled |
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221 | ); |
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222 | } |
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223 | |
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224 | /*PAGE |
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225 | * |
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226 | * _CPU_Sync_io_Init |
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227 | */ |
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228 | |
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229 | void _CPU_Sync_io_Init() |
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230 | { |
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231 | int fd; |
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232 | |
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233 | for (fd = 0; fd < FD_SETSIZE; fd++) |
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234 | _CPU_Sync_io_handlers[fd] = NULL; |
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235 | |
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236 | sync_io_nfds = 0; |
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237 | FD_ZERO(&sync_io_readfds); |
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238 | FD_ZERO(&sync_io_writefds); |
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239 | FD_ZERO(&sync_io_exceptfds); |
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240 | } |
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241 | |
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242 | /*PAGE |
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243 | * |
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244 | * _CPU_ISR_Get_level |
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245 | */ |
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246 | |
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247 | unsigned32 _CPU_ISR_Get_level( void ) |
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248 | { |
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249 | sigset_t old_mask; |
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250 | |
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251 | #if defined(__linux__) |
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252 | sigemptyset( &old_mask ); |
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253 | #endif |
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254 | sigprocmask(SIG_BLOCK, 0, &old_mask); |
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255 | |
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256 | if (memcmp((void *)&posix_empty_mask, (void *)&old_mask, sizeof(sigset_t))) |
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257 | return 1; |
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258 | |
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259 | return 0; |
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260 | } |
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261 | |
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262 | /* _CPU_Initialize |
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263 | * |
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264 | * This routine performs processor dependent initialization. |
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265 | * |
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266 | * INPUT PARAMETERS: |
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267 | * cpu_table - CPU table to initialize |
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268 | * thread_dispatch - address of disptaching routine |
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269 | */ |
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270 | |
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271 | |
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272 | void _CPU_Initialize( |
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273 | rtems_cpu_table *cpu_table, |
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274 | void (*thread_dispatch) /* ignored on this CPU */ |
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275 | ) |
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276 | { |
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277 | /* |
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278 | * The thread_dispatch argument is the address of the entry point |
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279 | * for the routine called at the end of an ISR once it has been |
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280 | * decided a context switch is necessary. On some compilation |
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281 | * systems it is difficult to call a high-level language routine |
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282 | * from assembly. This allows us to trick these systems. |
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283 | * |
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284 | * If you encounter this problem save the entry point in a CPU |
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285 | * dependent variable. |
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286 | */ |
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287 | |
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288 | _CPU_Thread_dispatch_pointer = thread_dispatch; |
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289 | |
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290 | /* |
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291 | * XXX; If there is not an easy way to initialize the FP context |
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292 | * during Context_Initialize, then it is usually easier to |
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293 | * save an "uninitialized" FP context here and copy it to |
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294 | * the task's during Context_Initialize. |
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295 | */ |
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296 | |
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297 | /* XXX: FP context initialization support */ |
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298 | |
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299 | _CPU_Table = *cpu_table; |
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300 | |
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301 | _CPU_ISR_From_CPU_Init(); |
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302 | |
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303 | _CPU_Sync_io_Init(); |
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304 | |
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305 | _CPU_Context_From_CPU_Init(); |
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306 | |
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307 | } |
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308 | |
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309 | /*PAGE |
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310 | * |
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311 | * _CPU_ISR_install_raw_handler |
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312 | */ |
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313 | |
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314 | void _CPU_ISR_install_raw_handler( |
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315 | unsigned32 vector, |
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316 | proc_ptr new_handler, |
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317 | proc_ptr *old_handler |
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318 | ) |
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319 | { |
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320 | _CPU_Fatal_halt( 0xdeaddead ); |
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321 | } |
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322 | |
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323 | /*PAGE |
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324 | * |
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325 | * _CPU_ISR_install_vector |
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326 | * |
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327 | * This kernel routine installs the RTEMS handler for the |
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328 | * specified vector. |
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329 | * |
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330 | * Input parameters: |
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331 | * vector - interrupt vector number |
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332 | * old_handler - former ISR for this vector number |
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333 | * new_handler - replacement ISR for this vector number |
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334 | * |
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335 | * Output parameters: NONE |
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336 | * |
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337 | */ |
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338 | |
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339 | |
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340 | void _CPU_ISR_install_vector( |
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341 | unsigned32 vector, |
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342 | proc_ptr new_handler, |
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343 | proc_ptr *old_handler |
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344 | ) |
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345 | { |
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346 | *old_handler = _ISR_Vector_table[ vector ]; |
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347 | |
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348 | /* |
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349 | * If the interrupt vector table is a table of pointer to isr entry |
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350 | * points, then we need to install the appropriate RTEMS interrupt |
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351 | * handler for this vector number. |
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352 | */ |
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353 | |
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354 | /* |
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355 | * We put the actual user ISR address in '_ISR_vector_table'. This will |
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356 | * be used by the _CPU_ISR_Handler so the user gets control. |
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357 | */ |
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358 | |
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359 | _ISR_Vector_table[ vector ] = new_handler; |
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360 | } |
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361 | |
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362 | /*PAGE |
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363 | * |
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364 | * _CPU_Install_interrupt_stack |
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365 | */ |
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366 | |
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367 | void _CPU_Install_interrupt_stack( void ) |
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368 | { |
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369 | } |
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370 | |
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371 | /*PAGE |
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372 | * |
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373 | * _CPU_Thread_Idle_body |
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374 | * |
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375 | * Stop until we get a signal which is the logically the same thing |
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376 | * entering low-power or sleep mode on a real processor and waiting for |
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377 | * an interrupt. This significantly reduces the consumption of host |
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378 | * CPU cycles which is again similar to low power mode. |
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379 | */ |
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380 | |
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381 | void _CPU_Thread_Idle_body( void ) |
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382 | { |
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383 | #if CPU_SYNC_IO |
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384 | extern void _Thread_Dispatch(void); |
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385 | int fd; |
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386 | #endif |
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387 | |
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388 | while (1) { |
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389 | #ifdef RTEMS_DEBUG |
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390 | /* interrupts had better be enabled at this point! */ |
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391 | if (_CPU_ISR_Get_level() != 0) |
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392 | abort(); |
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393 | #endif |
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394 | |
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395 | /* |
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396 | * Block on a select statement, the CPU interface added allow the |
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397 | * user to add new descriptors which are to be blocked on |
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398 | */ |
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399 | |
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400 | #if CPU_SYNC_IO |
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401 | if (sync_io_nfds) { |
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402 | int result; |
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403 | |
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404 | result = select(sync_io_nfds, |
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405 | &sync_io_readfds, |
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406 | &sync_io_writefds, |
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407 | &sync_io_exceptfds, |
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408 | NULL); |
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409 | |
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410 | if ((result < 0) && (errno != EINTR)) |
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411 | _CPU_Fatal_error(0x200); /* FIXME : what number should go here !! */ |
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412 | |
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413 | for (fd = 0; fd < sync_io_nfds; fd++) { |
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414 | boolean read = FD_ISSET(fd, &sync_io_readfds); |
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415 | boolean write = FD_ISSET(fd, &sync_io_writefds); |
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416 | boolean except = FD_ISSET(fd, &sync_io_exceptfds); |
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417 | |
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418 | if (_CPU_Sync_io_handlers[fd] && (read || write || except)) |
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419 | _CPU_Sync_io_handlers[fd](fd, read, write, except); |
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420 | |
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421 | _Thread_Dispatch(); |
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422 | } |
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423 | } else |
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424 | pause(); |
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425 | #else |
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426 | pause(); |
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427 | #endif |
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428 | |
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429 | } |
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430 | |
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431 | } |
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432 | |
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433 | /*PAGE |
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434 | * |
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435 | * _CPU_Context_Initialize |
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436 | */ |
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437 | |
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438 | void _CPU_Context_Initialize( |
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439 | Context_Control *_the_context, |
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440 | unsigned32 *_stack_base, |
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441 | unsigned32 _size, |
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442 | unsigned32 _new_level, |
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443 | void *_entry_point, |
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444 | boolean _is_fp |
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445 | ) |
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446 | { |
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447 | unsigned32 *addr; |
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448 | unsigned32 jmp_addr; |
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449 | unsigned32 _stack_low; /* lowest "stack aligned" address */ |
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450 | unsigned32 _stack_high; /* highest "stack aligned" address */ |
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451 | unsigned32 _the_size; |
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452 | |
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453 | jmp_addr = (unsigned32) _entry_point; |
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454 | |
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455 | /* |
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456 | * On CPUs with stacks which grow down, we build the stack |
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457 | * based on the _stack_high address. On CPUs with stacks which |
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458 | * grow up, we build the stack based on the _stack_low address. |
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459 | */ |
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460 | |
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461 | _stack_low = (unsigned32)(_stack_base) + CPU_STACK_ALIGNMENT - 1; |
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462 | _stack_low &= ~(CPU_STACK_ALIGNMENT - 1); |
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463 | |
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464 | _stack_high = (unsigned32)(_stack_base) + _size; |
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465 | _stack_high &= ~(CPU_STACK_ALIGNMENT - 1); |
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466 | |
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467 | if (_stack_high > _stack_low) |
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468 | _the_size = _stack_high - _stack_low; |
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469 | else |
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470 | _the_size = _stack_low - _stack_high; |
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471 | |
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472 | /* |
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473 | * Slam our jmp_buf template into the context we are creating |
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474 | */ |
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475 | |
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476 | if ( _new_level == 0 ) |
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477 | *_the_context = *(Context_Control *) |
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478 | &_CPU_Context_Default_with_ISRs_enabled; |
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479 | else |
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480 | *_the_context = *(Context_Control *) |
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481 | &_CPU_Context_Default_with_ISRs_disabled; |
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482 | |
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483 | addr = (unsigned32 *)_the_context; |
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484 | |
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485 | #if defined(__hppa__) |
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486 | *(addr + RP_OFF) = jmp_addr; |
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487 | *(addr + SP_OFF) = (unsigned32)(_stack_low + CPU_FRAME_SIZE); |
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488 | |
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489 | /* |
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490 | * See if we are using shared libraries by checking |
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491 | * bit 30 in 24 off of newp. If bit 30 is set then |
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492 | * we are using shared libraries and the jump address |
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493 | * points to the pointer, so we put that into rp instead. |
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494 | */ |
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495 | |
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496 | if (jmp_addr & 0x40000000) { |
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497 | jmp_addr &= 0xfffffffc; |
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498 | *(addr + RP_OFF) = *(unsigned32 *)jmp_addr; |
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499 | } |
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500 | #elif defined(__sparc__) |
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501 | |
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502 | /* |
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503 | * See /usr/include/sys/stack.h in Solaris 2.3 for a nice |
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504 | * diagram of the stack. |
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505 | */ |
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506 | |
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507 | asm ("ta 0x03"); /* flush registers */ |
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508 | |
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509 | *(addr + RP_OFF) = jmp_addr + ADDR_ADJ_OFFSET; |
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510 | *(addr + SP_OFF) = (unsigned32)(_stack_high - CPU_FRAME_SIZE); |
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511 | *(addr + FP_OFF) = (unsigned32)(_stack_high); |
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512 | |
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513 | #elif defined(__i386__) |
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514 | |
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515 | /* |
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516 | * This information was gathered by disassembling setjmp(). |
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517 | */ |
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518 | |
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519 | { |
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520 | unsigned32 stack_ptr; |
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521 | |
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522 | stack_ptr = _stack_high - CPU_FRAME_SIZE; |
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523 | |
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524 | *(addr + EBX_OFF) = 0xFEEDFEED; |
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525 | *(addr + ESI_OFF) = 0xDEADDEAD; |
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526 | *(addr + EDI_OFF) = 0xDEAFDEAF; |
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527 | *(addr + EBP_OFF) = stack_ptr; |
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528 | *(addr + ESP_OFF) = stack_ptr; |
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529 | *(addr + RET_OFF) = jmp_addr; |
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530 | |
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531 | addr = (unsigned32 *) stack_ptr; |
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532 | |
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533 | addr[ 0 ] = jmp_addr; |
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534 | addr[ 1 ] = (unsigned32) stack_ptr; |
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535 | addr[ 2 ] = (unsigned32) stack_ptr; |
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536 | } |
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537 | |
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538 | #else |
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539 | #error "UNKNOWN CPU!!!" |
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540 | #endif |
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541 | |
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542 | } |
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543 | |
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544 | /*PAGE |
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545 | * |
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546 | * _CPU_Context_restore |
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547 | */ |
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548 | |
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549 | void _CPU_Context_restore( |
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550 | Context_Control *next |
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551 | ) |
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552 | { |
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553 | Context_Control_overlay *nextp = (Context_Control_overlay *)next; |
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554 | |
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555 | _CPU_ISR_Enable(nextp->isr_level); |
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556 | longjmp( nextp->regs, 0 ); |
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557 | } |
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558 | |
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559 | /*PAGE |
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560 | * |
---|
561 | * _CPU_Context_switch |
---|
562 | */ |
---|
563 | |
---|
564 | static void do_jump( |
---|
565 | Context_Control_overlay *currentp, |
---|
566 | Context_Control_overlay *nextp |
---|
567 | ); |
---|
568 | |
---|
569 | void _CPU_Context_switch( |
---|
570 | Context_Control *current, |
---|
571 | Context_Control *next |
---|
572 | ) |
---|
573 | { |
---|
574 | Context_Control_overlay *currentp = (Context_Control_overlay *)current; |
---|
575 | Context_Control_overlay *nextp = (Context_Control_overlay *)next; |
---|
576 | #if 0 |
---|
577 | int status; |
---|
578 | #endif |
---|
579 | |
---|
580 | currentp->isr_level = _CPU_ISR_Disable_support(); |
---|
581 | |
---|
582 | do_jump( currentp, nextp ); |
---|
583 | |
---|
584 | #if 0 |
---|
585 | if (sigsetjmp(currentp->regs, 1) == 0) { /* Save the current context */ |
---|
586 | siglongjmp(nextp->regs, 0); /* Switch to the new context */ |
---|
587 | _Internal_error_Occurred( |
---|
588 | INTERNAL_ERROR_CORE, |
---|
589 | TRUE, |
---|
590 | status |
---|
591 | ); |
---|
592 | } |
---|
593 | #endif |
---|
594 | |
---|
595 | #ifdef RTEMS_DEBUG |
---|
596 | if (_CPU_ISR_Get_level() == 0) |
---|
597 | abort(); |
---|
598 | #endif |
---|
599 | |
---|
600 | _CPU_ISR_Enable(currentp->isr_level); |
---|
601 | } |
---|
602 | |
---|
603 | static void do_jump( |
---|
604 | Context_Control_overlay *currentp, |
---|
605 | Context_Control_overlay *nextp |
---|
606 | ) |
---|
607 | { |
---|
608 | int status; |
---|
609 | |
---|
610 | if (setjmp(currentp->regs) == 0) { /* Save the current context */ |
---|
611 | longjmp(nextp->regs, 0); /* Switch to the new context */ |
---|
612 | _Internal_error_Occurred( |
---|
613 | INTERNAL_ERROR_CORE, |
---|
614 | TRUE, |
---|
615 | status |
---|
616 | ); |
---|
617 | } |
---|
618 | } |
---|
619 | |
---|
620 | /*PAGE |
---|
621 | * |
---|
622 | * _CPU_Save_float_context |
---|
623 | */ |
---|
624 | |
---|
625 | void _CPU_Save_float_context( |
---|
626 | Context_Control_fp *fp_context |
---|
627 | ) |
---|
628 | { |
---|
629 | } |
---|
630 | |
---|
631 | /*PAGE |
---|
632 | * |
---|
633 | * _CPU_Restore_float_context |
---|
634 | */ |
---|
635 | |
---|
636 | void _CPU_Restore_float_context( |
---|
637 | Context_Control_fp *fp_context |
---|
638 | ) |
---|
639 | { |
---|
640 | } |
---|
641 | |
---|
642 | /*PAGE |
---|
643 | * |
---|
644 | * _CPU_ISR_Disable_support |
---|
645 | */ |
---|
646 | |
---|
647 | unsigned32 _CPU_ISR_Disable_support(void) |
---|
648 | { |
---|
649 | int status; |
---|
650 | sigset_t old_mask; |
---|
651 | |
---|
652 | status = sigprocmask(SIG_BLOCK, &_CPU_Signal_mask, &old_mask); |
---|
653 | if ( status ) |
---|
654 | _Internal_error_Occurred( |
---|
655 | INTERNAL_ERROR_CORE, |
---|
656 | TRUE, |
---|
657 | status |
---|
658 | ); |
---|
659 | |
---|
660 | if (memcmp((void *)&posix_empty_mask, (void *)&old_mask, sizeof(sigset_t))) |
---|
661 | return 1; |
---|
662 | |
---|
663 | return 0; |
---|
664 | } |
---|
665 | |
---|
666 | /*PAGE |
---|
667 | * |
---|
668 | * _CPU_ISR_Enable |
---|
669 | */ |
---|
670 | |
---|
671 | void _CPU_ISR_Enable( |
---|
672 | unsigned32 level |
---|
673 | ) |
---|
674 | { |
---|
675 | int status; |
---|
676 | |
---|
677 | if (level == 0) |
---|
678 | status = sigprocmask(SIG_UNBLOCK, &_CPU_Signal_mask, 0); |
---|
679 | else |
---|
680 | status = sigprocmask(SIG_BLOCK, &_CPU_Signal_mask, 0); |
---|
681 | |
---|
682 | if ( status ) |
---|
683 | _Internal_error_Occurred( |
---|
684 | INTERNAL_ERROR_CORE, |
---|
685 | TRUE, |
---|
686 | status |
---|
687 | ); |
---|
688 | } |
---|
689 | |
---|
690 | /*PAGE |
---|
691 | * |
---|
692 | * _CPU_ISR_Handler |
---|
693 | * |
---|
694 | * External interrupt handler. |
---|
695 | * This is installed as a UNIX signal handler. |
---|
696 | * It vectors out to specific user interrupt handlers. |
---|
697 | */ |
---|
698 | |
---|
699 | void _CPU_ISR_Handler(int vector) |
---|
700 | { |
---|
701 | extern void _Thread_Dispatch(void); |
---|
702 | extern unsigned32 _Thread_Dispatch_disable_level; |
---|
703 | extern boolean _Context_Switch_necessary; |
---|
704 | |
---|
705 | if (_ISR_Nest_level++ == 0) { |
---|
706 | /* switch to interrupt stack */ |
---|
707 | } |
---|
708 | |
---|
709 | _Thread_Dispatch_disable_level++; |
---|
710 | |
---|
711 | if (_ISR_Vector_table[vector]) { |
---|
712 | _ISR_Vector_table[vector](vector); |
---|
713 | } else { |
---|
714 | _CPU_Stray_signal(vector); |
---|
715 | } |
---|
716 | |
---|
717 | if (_ISR_Nest_level-- == 0) { |
---|
718 | /* switch back to original stack */ |
---|
719 | } |
---|
720 | |
---|
721 | _Thread_Dispatch_disable_level--; |
---|
722 | |
---|
723 | if (_Thread_Dispatch_disable_level == 0 && |
---|
724 | (_Context_Switch_necessary || _ISR_Signals_to_thread_executing)) { |
---|
725 | _ISR_Signals_to_thread_executing = FALSE; |
---|
726 | _CPU_ISR_Enable(0); |
---|
727 | _Thread_Dispatch(); |
---|
728 | } |
---|
729 | } |
---|
730 | |
---|
731 | /*PAGE |
---|
732 | * |
---|
733 | * _CPU_Stray_signal |
---|
734 | */ |
---|
735 | |
---|
736 | void _CPU_Stray_signal(int sig_num) |
---|
737 | { |
---|
738 | char buffer[ 4 ]; |
---|
739 | |
---|
740 | /* |
---|
741 | * print "stray" msg about ones which that might mean something |
---|
742 | * Avoid using the stdio section of the library. |
---|
743 | * The following is generally safe. |
---|
744 | */ |
---|
745 | |
---|
746 | switch (sig_num) |
---|
747 | { |
---|
748 | #ifdef SIGCLD |
---|
749 | case SIGCLD: |
---|
750 | break; |
---|
751 | #endif |
---|
752 | default: |
---|
753 | { |
---|
754 | /* |
---|
755 | * We avoid using the stdio section of the library. |
---|
756 | * The following is generally safe |
---|
757 | */ |
---|
758 | |
---|
759 | int digit; |
---|
760 | int number = sig_num; |
---|
761 | int len = 0; |
---|
762 | |
---|
763 | digit = number / 100; |
---|
764 | number %= 100; |
---|
765 | if (digit) buffer[len++] = '0' + digit; |
---|
766 | |
---|
767 | digit = number / 10; |
---|
768 | number %= 10; |
---|
769 | if (digit || len) buffer[len++] = '0' + digit; |
---|
770 | |
---|
771 | digit = number; |
---|
772 | buffer[len++] = '0' + digit; |
---|
773 | |
---|
774 | buffer[ len++ ] = '\n'; |
---|
775 | |
---|
776 | write( 2, "Stray signal ", 13 ); |
---|
777 | write( 2, buffer, len ); |
---|
778 | |
---|
779 | } |
---|
780 | } |
---|
781 | |
---|
782 | /* |
---|
783 | * If it was a "fatal" signal, then exit here |
---|
784 | * If app code has installed a hander for one of these, then |
---|
785 | * we won't call _CPU_Stray_signal, so this is ok. |
---|
786 | */ |
---|
787 | |
---|
788 | switch (sig_num) { |
---|
789 | case SIGINT: |
---|
790 | case SIGHUP: |
---|
791 | case SIGQUIT: |
---|
792 | case SIGILL: |
---|
793 | #ifdef SIGEMT |
---|
794 | case SIGEMT: |
---|
795 | #endif |
---|
796 | case SIGKILL: |
---|
797 | case SIGBUS: |
---|
798 | case SIGSEGV: |
---|
799 | case SIGTERM: |
---|
800 | case SIGIOT: |
---|
801 | _CPU_Fatal_error(0x100 + sig_num); |
---|
802 | } |
---|
803 | } |
---|
804 | |
---|
805 | /*PAGE |
---|
806 | * |
---|
807 | * _CPU_Fatal_error |
---|
808 | */ |
---|
809 | |
---|
810 | void _CPU_Fatal_error(unsigned32 error) |
---|
811 | { |
---|
812 | setitimer(ITIMER_REAL, 0, 0); |
---|
813 | |
---|
814 | if ( error ) { |
---|
815 | #ifdef RTEMS_DEBUG |
---|
816 | abort(); |
---|
817 | #endif |
---|
818 | if (getenv("RTEMS_DEBUG")) |
---|
819 | abort(); |
---|
820 | } |
---|
821 | |
---|
822 | _exit(error); |
---|
823 | } |
---|
824 | |
---|
825 | /* |
---|
826 | * Special Purpose Routines to hide the use of UNIX system calls. |
---|
827 | */ |
---|
828 | |
---|
829 | int _CPU_Set_sync_io_handler( |
---|
830 | int fd, |
---|
831 | boolean read, |
---|
832 | boolean write, |
---|
833 | boolean except, |
---|
834 | rtems_sync_io_handler handler |
---|
835 | ) |
---|
836 | { |
---|
837 | if ((fd < FD_SETSIZE) && (_CPU_Sync_io_handlers[fd] == NULL)) { |
---|
838 | if (read) |
---|
839 | FD_SET(fd, &sync_io_readfds); |
---|
840 | else |
---|
841 | FD_CLR(fd, &sync_io_readfds); |
---|
842 | if (write) |
---|
843 | FD_SET(fd, &sync_io_writefds); |
---|
844 | else |
---|
845 | FD_CLR(fd, &sync_io_writefds); |
---|
846 | if (except) |
---|
847 | FD_SET(fd, &sync_io_exceptfds); |
---|
848 | else |
---|
849 | FD_CLR(fd, &sync_io_exceptfds); |
---|
850 | _CPU_Sync_io_handlers[fd] = handler; |
---|
851 | if ((fd + 1) > sync_io_nfds) |
---|
852 | sync_io_nfds = fd + 1; |
---|
853 | return 0; |
---|
854 | } |
---|
855 | return -1; |
---|
856 | } |
---|
857 | |
---|
858 | int _CPU_Clear_sync_io_handler( |
---|
859 | int fd |
---|
860 | ) |
---|
861 | { |
---|
862 | if ((fd < FD_SETSIZE) && _CPU_Sync_io_handlers[fd]) { |
---|
863 | FD_CLR(fd, &sync_io_readfds); |
---|
864 | FD_CLR(fd, &sync_io_writefds); |
---|
865 | FD_CLR(fd, &sync_io_exceptfds); |
---|
866 | _CPU_Sync_io_handlers[fd] = NULL; |
---|
867 | sync_io_nfds = 0; |
---|
868 | for (fd = 0; fd < FD_SETSIZE; fd++) |
---|
869 | if (FD_ISSET(fd, &sync_io_readfds) || |
---|
870 | FD_ISSET(fd, &sync_io_writefds) || |
---|
871 | FD_ISSET(fd, &sync_io_exceptfds)) |
---|
872 | sync_io_nfds = fd; |
---|
873 | return 0; |
---|
874 | } |
---|
875 | return -1; |
---|
876 | } |
---|
877 | |
---|
878 | int _CPU_Get_clock_vector( void ) |
---|
879 | { |
---|
880 | return SIGALRM; |
---|
881 | } |
---|
882 | |
---|
883 | void _CPU_Start_clock( |
---|
884 | int microseconds |
---|
885 | ) |
---|
886 | { |
---|
887 | struct itimerval new; |
---|
888 | |
---|
889 | new.it_value.tv_sec = 0; |
---|
890 | new.it_value.tv_usec = microseconds; |
---|
891 | new.it_interval.tv_sec = 0; |
---|
892 | new.it_interval.tv_usec = microseconds; |
---|
893 | |
---|
894 | setitimer(ITIMER_REAL, &new, 0); |
---|
895 | } |
---|
896 | |
---|
897 | void _CPU_Stop_clock( void ) |
---|
898 | { |
---|
899 | struct itimerval new; |
---|
900 | struct sigaction act; |
---|
901 | |
---|
902 | /* |
---|
903 | * Set the SIGALRM signal to ignore any last |
---|
904 | * signals that might come in while we are |
---|
905 | * disarming the timer and removing the interrupt |
---|
906 | * vector. |
---|
907 | */ |
---|
908 | |
---|
909 | (void) memset(&act, 0, sizeof(act)); |
---|
910 | act.sa_handler = SIG_IGN; |
---|
911 | |
---|
912 | sigaction(SIGALRM, &act, 0); |
---|
913 | |
---|
914 | (void) memset(&new, 0, sizeof(new)); |
---|
915 | setitimer(ITIMER_REAL, &new, 0); |
---|
916 | } |
---|
917 | |
---|
918 | int _CPU_SHM_Semid; |
---|
919 | extern void fix_syscall_errno( void ); |
---|
920 | |
---|
921 | void _CPU_SHM_Init( |
---|
922 | unsigned32 maximum_nodes, |
---|
923 | boolean is_master_node, |
---|
924 | void **shm_address, |
---|
925 | unsigned32 *shm_length |
---|
926 | ) |
---|
927 | { |
---|
928 | int i; |
---|
929 | int shmid; |
---|
930 | char *shm_addr; |
---|
931 | key_t shm_key; |
---|
932 | key_t sem_key; |
---|
933 | int status = 0; /* to avoid unitialized warnings */ |
---|
934 | int shm_size; |
---|
935 | |
---|
936 | if (getenv("RTEMS_SHM_KEY")) |
---|
937 | shm_key = strtol(getenv("RTEMS_SHM_KEY"), 0, 0); |
---|
938 | else |
---|
939 | #ifdef RTEMS_SHM_KEY |
---|
940 | shm_key = RTEMS_SHM_KEY; |
---|
941 | #else |
---|
942 | shm_key = 0xa000; |
---|
943 | #endif |
---|
944 | |
---|
945 | if (getenv("RTEMS_SHM_SIZE")) |
---|
946 | shm_size = strtol(getenv("RTEMS_SHM_SIZE"), 0, 0); |
---|
947 | else |
---|
948 | #ifdef RTEMS_SHM_SIZE |
---|
949 | shm_size = RTEMS_SHM_SIZE; |
---|
950 | #else |
---|
951 | shm_size = 64 * 1024; |
---|
952 | #endif |
---|
953 | |
---|
954 | if (getenv("RTEMS_SHM_SEMAPHORE_KEY")) |
---|
955 | sem_key = strtol(getenv("RTEMS_SHM_SEMAPHORE_KEY"), 0, 0); |
---|
956 | else |
---|
957 | #ifdef RTEMS_SHM_SEMAPHORE_KEY |
---|
958 | sem_key = RTEMS_SHM_SEMAPHORE_KEY; |
---|
959 | #else |
---|
960 | sem_key = 0xa001; |
---|
961 | #endif |
---|
962 | |
---|
963 | shmid = shmget(shm_key, shm_size, IPC_CREAT | 0660); |
---|
964 | if ( shmid == -1 ) { |
---|
965 | fix_syscall_errno(); /* in case of newlib */ |
---|
966 | perror( "shmget" ); |
---|
967 | _CPU_Fatal_halt( 0xdead0001 ); |
---|
968 | } |
---|
969 | |
---|
970 | shm_addr = shmat(shmid, (char *)0, SHM_RND); |
---|
971 | if ( shm_addr == (void *)-1 ) { |
---|
972 | fix_syscall_errno(); /* in case of newlib */ |
---|
973 | perror( "shmat" ); |
---|
974 | _CPU_Fatal_halt( 0xdead0002 ); |
---|
975 | } |
---|
976 | |
---|
977 | _CPU_SHM_Semid = semget(sem_key, maximum_nodes + 1, IPC_CREAT | 0660); |
---|
978 | if ( _CPU_SHM_Semid == -1 ) { |
---|
979 | fix_syscall_errno(); /* in case of newlib */ |
---|
980 | perror( "semget" ); |
---|
981 | _CPU_Fatal_halt( 0xdead0003 ); |
---|
982 | } |
---|
983 | |
---|
984 | if ( is_master_node ) { |
---|
985 | for ( i=0 ; i <= maximum_nodes ; i++ ) { |
---|
986 | #if defined(solaris2) |
---|
987 | union semun { |
---|
988 | int val; |
---|
989 | struct semid_ds *buf; |
---|
990 | ushort *array; |
---|
991 | } help; |
---|
992 | |
---|
993 | help.val = 1; |
---|
994 | status = semctl( _CPU_SHM_Semid, i, SETVAL, help ); |
---|
995 | #elif defined(__linux__) || defined(__FreeBSD__) |
---|
996 | union semun help; |
---|
997 | |
---|
998 | help.val = 1; |
---|
999 | status = semctl( _CPU_SHM_Semid, i, SETVAL, help ); |
---|
1000 | #elif defined(hpux) |
---|
1001 | status = semctl( _CPU_SHM_Semid, i, SETVAL, 1 ); |
---|
1002 | #else |
---|
1003 | #error "Not a supported unix variant" |
---|
1004 | #endif |
---|
1005 | |
---|
1006 | fix_syscall_errno(); /* in case of newlib */ |
---|
1007 | if ( status == -1 ) { |
---|
1008 | _CPU_Fatal_halt( 0xdead0004 ); |
---|
1009 | } |
---|
1010 | } |
---|
1011 | } |
---|
1012 | |
---|
1013 | *shm_address = shm_addr; |
---|
1014 | *shm_length = shm_size; |
---|
1015 | |
---|
1016 | } |
---|
1017 | |
---|
1018 | int _CPU_Get_pid( void ) |
---|
1019 | { |
---|
1020 | return getpid(); |
---|
1021 | } |
---|
1022 | |
---|
1023 | /* |
---|
1024 | * Define this to use signals for MPCI shared memory driver. |
---|
1025 | * If undefined, the shared memory driver will poll from the |
---|
1026 | * clock interrupt. |
---|
1027 | * Ref: ../shmsupp/getcfg.c |
---|
1028 | * |
---|
1029 | * BEWARE:: many UN*X kernels and debuggers become severely confused when |
---|
1030 | * debugging programs which use signals. The problem is *much* |
---|
1031 | * worse when using multiple signals, since ptrace(2) tends to |
---|
1032 | * drop all signals except 1 in the case of multiples. |
---|
1033 | * On hpux9, this problem was so bad, we couldn't use interrupts |
---|
1034 | * with the shared memory driver if we ever hoped to debug |
---|
1035 | * RTEMS programs. |
---|
1036 | * Maybe systems that use /proc don't have this problem... |
---|
1037 | */ |
---|
1038 | |
---|
1039 | |
---|
1040 | int _CPU_SHM_Get_vector( void ) |
---|
1041 | { |
---|
1042 | #ifdef CPU_USE_SHM_INTERRUPTS |
---|
1043 | return SIGUSR1; |
---|
1044 | #else |
---|
1045 | return 0; |
---|
1046 | #endif |
---|
1047 | } |
---|
1048 | |
---|
1049 | void _CPU_SHM_Send_interrupt( |
---|
1050 | int pid, |
---|
1051 | int vector |
---|
1052 | ) |
---|
1053 | { |
---|
1054 | kill((pid_t) pid, vector); |
---|
1055 | } |
---|
1056 | |
---|
1057 | void _CPU_SHM_Lock( |
---|
1058 | int semaphore |
---|
1059 | ) |
---|
1060 | { |
---|
1061 | struct sembuf sb; |
---|
1062 | |
---|
1063 | sb.sem_num = semaphore; |
---|
1064 | sb.sem_op = -1; |
---|
1065 | sb.sem_flg = 0; |
---|
1066 | |
---|
1067 | while (1) { |
---|
1068 | int status = -1; |
---|
1069 | |
---|
1070 | status = semop(_CPU_SHM_Semid, &sb, 1); |
---|
1071 | if ( status >= 0 ) |
---|
1072 | break; |
---|
1073 | if ( status == -1 ) { |
---|
1074 | fix_syscall_errno(); /* in case of newlib */ |
---|
1075 | if (errno == EINTR) |
---|
1076 | continue; |
---|
1077 | perror("shm lock"); |
---|
1078 | _CPU_Fatal_halt( 0xdead0005 ); |
---|
1079 | } |
---|
1080 | } |
---|
1081 | |
---|
1082 | } |
---|
1083 | |
---|
1084 | void _CPU_SHM_Unlock( |
---|
1085 | int semaphore |
---|
1086 | ) |
---|
1087 | { |
---|
1088 | struct sembuf sb; |
---|
1089 | int status; |
---|
1090 | |
---|
1091 | sb.sem_num = semaphore; |
---|
1092 | sb.sem_op = 1; |
---|
1093 | sb.sem_flg = 0; |
---|
1094 | |
---|
1095 | while (1) { |
---|
1096 | status = semop(_CPU_SHM_Semid, &sb, 1); |
---|
1097 | if ( status >= 0 ) |
---|
1098 | break; |
---|
1099 | |
---|
1100 | if ( status == -1 ) { |
---|
1101 | fix_syscall_errno(); /* in case of newlib */ |
---|
1102 | if (errno == EINTR) |
---|
1103 | continue; |
---|
1104 | perror("shm unlock"); |
---|
1105 | _CPU_Fatal_halt( 0xdead0006 ); |
---|
1106 | } |
---|
1107 | } |
---|
1108 | |
---|
1109 | } |
---|