1 | /* |
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2 | * HP PA-RISC CPU Dependent Source |
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3 | * |
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4 | * |
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5 | * To anyone who acknowledges that this file is provided "AS IS" |
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6 | * without any express or implied warranty: |
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7 | * permission to use, copy, modify, and distribute this file |
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8 | * for any purpose is hereby granted without fee, provided that |
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9 | * the above copyright notice and this notice appears in all |
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10 | * copies, and that the name of Division Incorporated not be |
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11 | * used in advertising or publicity pertaining to distribution |
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12 | * of the software without specific, written prior permission. |
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13 | * Division Incorporated makes no representations about the |
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14 | * suitability of this software for any purpose. |
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15 | * |
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16 | * $Id$ |
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17 | */ |
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18 | |
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19 | #include <rtems/system.h> |
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20 | #include <rtems/fatal.h> |
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21 | #include <rtems/isr.h> |
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22 | #include <rtems/wkspace.h> |
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23 | /* |
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24 | * In order to get the types and prototypes used in this file under |
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25 | * Solaris 2.3, it is necessary to pull the following magic. |
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26 | */ |
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27 | |
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28 | #if defined(solaris) |
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29 | #warning "Ignore the undefining __STDC__ warning" |
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30 | #undef __STDC__ |
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31 | #define __STDC__ 0 |
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32 | #undef _POSIX_C_SOURCE |
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33 | #endif |
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34 | |
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35 | #include <stdio.h> |
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36 | #include <stdlib.h> |
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37 | #include <unistd.h> |
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38 | #include <signal.h> |
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39 | #include <time.h> |
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40 | |
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41 | extern void set_vector(proc_ptr, int, int); |
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42 | extern void _Thread_Dispatch(void); |
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43 | |
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44 | extern unsigned32 _Thread_Dispatch_disable_level; |
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45 | extern unsigned32 _SYSTEM_ID; |
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46 | extern boolean _Context_Switch_necessary; |
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47 | |
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48 | |
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49 | rtems_status_code signal_initialize(void); |
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50 | void Stray_signal(int); |
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51 | void signal_enable(unsigned32); |
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52 | void signal_disable(unsigned32); |
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53 | void interrupt_handler(); |
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54 | |
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55 | sigset_t UNIX_SIGNAL_MASK; |
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56 | jmp_buf default_context; |
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57 | |
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58 | /* |
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59 | * Which cpu are we? Used by libcpu and libbsp. |
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60 | */ |
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61 | |
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62 | int cpu_number; |
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63 | |
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64 | /* _CPU_Initialize |
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65 | * |
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66 | * This routine performs processor dependent initialization. |
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67 | * |
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68 | * INPUT PARAMETERS: |
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69 | * cpu_table - CPU table to initialize |
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70 | * thread_dispatch - address of disptaching routine |
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71 | */ |
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72 | |
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73 | |
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74 | void _CPU_Initialize( |
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75 | rtems_cpu_table *cpu_table, |
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76 | void (*thread_dispatch) /* ignored on this CPU */ |
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77 | ) |
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78 | { |
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79 | unsigned32 i; |
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80 | |
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81 | if ( cpu_table == NULL ) |
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82 | rtems_fatal_error_occurred( RTEMS_NOT_CONFIGURED ); |
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83 | |
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84 | /* |
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85 | * The thread_dispatch argument is the address of the entry point |
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86 | * for the routine called at the end of an ISR once it has been |
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87 | * decided a context switch is necessary. On some compilation |
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88 | * systems it is difficult to call a high-level language routine |
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89 | * from assembly. This allows us to trick these systems. |
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90 | * |
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91 | * If you encounter this problem save the entry point in a CPU |
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92 | * dependent variable. |
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93 | */ |
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94 | |
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95 | _CPU_Thread_dispatch_pointer = thread_dispatch; |
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96 | |
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97 | /* |
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98 | * XXX; If there is not an easy way to initialize the FP context |
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99 | * during Context_Initialize, then it is usually easier to |
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100 | * save an "uninitialized" FP context here and copy it to |
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101 | * the task's during Context_Initialize. |
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102 | */ |
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103 | |
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104 | /* XXX: FP context initialization support */ |
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105 | |
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106 | _CPU_Table = *cpu_table; |
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107 | |
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108 | #if defined(hppa1_1) && defined(RTEMS_UNIXLIB) |
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109 | /* |
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110 | * HACK - set the _SYSTEM_ID to 0x20c so that setjmp/longjmp |
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111 | * will handle the full 32 floating point registers. |
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112 | * |
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113 | * NOTE: Is this a bug in HPUX9? |
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114 | */ |
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115 | |
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116 | _SYSTEM_ID = 0x20c; |
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117 | #endif |
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118 | |
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119 | /* |
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120 | * get default values to use in _CPU_Context_Initialize() |
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121 | */ |
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122 | |
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123 | setjmp(default_context); |
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124 | |
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125 | /* |
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126 | * Block all the signals except SIGTRAP for the debugger |
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127 | * and SIGABRT for fatal errors. |
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128 | */ |
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129 | |
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130 | _CPU_ISR_Set_signal_level(1); |
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131 | |
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132 | sigfillset(&UNIX_SIGNAL_MASK); |
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133 | sigdelset(&UNIX_SIGNAL_MASK, SIGTRAP); |
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134 | sigdelset(&UNIX_SIGNAL_MASK, SIGABRT); |
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135 | sigdelset(&UNIX_SIGNAL_MASK, SIGIOT); |
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136 | sigdelset(&UNIX_SIGNAL_MASK, SIGCONT); |
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137 | |
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138 | sigprocmask(SIG_BLOCK, &UNIX_SIGNAL_MASK, 0); |
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139 | |
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140 | /* |
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141 | * Set the handler for all signals to be signal_handler |
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142 | * which will then vector out to the correct handler |
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143 | * for whichever signal actually happened. Initially |
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144 | * set the vectors to the stray signal handler. |
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145 | */ |
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146 | |
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147 | for (i = 0; i < 32; i++) |
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148 | (void)set_vector(Stray_signal, i, 1); |
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149 | |
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150 | signal_initialize(); |
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151 | } |
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152 | |
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153 | /* _CPU_ISR_install_vector |
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154 | * |
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155 | * This kernel routine installs the RTEMS handler for the |
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156 | * specified vector. |
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157 | * |
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158 | * Input parameters: |
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159 | * vector - interrupt vector number |
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160 | * old_handler - former ISR for this vector number |
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161 | * new_handler - replacement ISR for this vector number |
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162 | * |
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163 | * Output parameters: NONE |
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164 | * |
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165 | */ |
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166 | |
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167 | |
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168 | void _CPU_ISR_install_vector( |
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169 | unsigned32 vector, |
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170 | proc_ptr new_handler, |
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171 | proc_ptr *old_handler |
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172 | ) |
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173 | { |
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174 | *old_handler = _ISR_Vector_table[ vector ]; |
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175 | |
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176 | /* |
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177 | * If the interrupt vector table is a table of pointer to isr entry |
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178 | * points, then we need to install the appropriate RTEMS interrupt |
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179 | * handler for this vector number. |
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180 | */ |
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181 | |
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182 | /* |
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183 | * We put the actual user ISR address in '_ISR_vector_table'. This will |
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184 | * be used by the _ISR_Handler so the user gets control. |
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185 | */ |
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186 | |
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187 | _ISR_Vector_table[ vector ] = new_handler; |
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188 | } |
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189 | |
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190 | /*PAGE |
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191 | * |
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192 | * _CPU_Install_interrupt_stack |
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193 | */ |
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194 | |
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195 | void _CPU_Install_interrupt_stack( void ) |
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196 | { |
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197 | } |
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198 | |
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199 | /*PAGE |
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200 | * |
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201 | * _CPU_Internal_threads_Idle_thread_body |
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202 | * |
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203 | * NOTES: |
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204 | * |
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205 | * 1. This is the same as the regular CPU independent algorithm. |
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206 | * |
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207 | * 2. If you implement this using a "halt", "idle", or "shutdown" |
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208 | * instruction, then don't forget to put it in an infinite loop. |
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209 | * |
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210 | * 3. Be warned. Some processors with onboard DMA have been known |
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211 | * to stop the DMA if the CPU were put in IDLE mode. This might |
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212 | * also be a problem with other on-chip peripherals. So use this |
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213 | * hook with caution. |
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214 | */ |
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215 | |
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216 | void _CPU_Internal_threads_Idle_thread_body( void ) |
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217 | { |
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218 | while (1) |
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219 | pause(); |
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220 | } |
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221 | |
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222 | void _CPU_Context_Initialize( |
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223 | Context_Control *_the_context, |
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224 | unsigned32 *_stack_base, |
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225 | unsigned32 _size, |
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226 | unsigned32 _new_level, |
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227 | void *_entry_point |
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228 | ) |
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229 | { |
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230 | unsigned32 *addr; |
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231 | unsigned32 jmp_addr; |
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232 | unsigned32 _stack_low; /* lowest "stack aligned" address */ |
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233 | unsigned32 _stack_high; /* highest "stack aligned" address */ |
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234 | unsigned32 _the_size; |
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235 | |
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236 | jmp_addr = (unsigned32) _entry_point; |
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237 | |
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238 | /* |
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239 | * On CPUs with stacks which grow down, we build the stack |
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240 | * based on the _stack_high address. On CPUs with stacks which |
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241 | * grow up, we build the stack based on the _stack_low address. |
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242 | */ |
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243 | |
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244 | _stack_low = ((unsigned32)(_stack_base) + CPU_STACK_ALIGNMENT); |
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245 | _stack_low &= ~(CPU_STACK_ALIGNMENT - 1); |
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246 | |
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247 | _stack_high = ((unsigned32)(_stack_base) + _size); |
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248 | _stack_high &= ~(CPU_STACK_ALIGNMENT - 1); |
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249 | |
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250 | _the_size = _size & ~(CPU_STACK_ALIGNMENT - 1); |
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251 | |
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252 | /* |
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253 | * Slam our jmp_buf template into the context we are creating |
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254 | */ |
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255 | |
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256 | memcpy(_the_context, default_context, sizeof(jmp_buf)); |
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257 | |
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258 | addr = (unsigned32 *)_the_context; |
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259 | |
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260 | #if defined(hppa1_1) |
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261 | *(addr + RP_OFF) = jmp_addr; |
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262 | *(addr + SP_OFF) = (unsigned32)(_stack_low + CPU_FRAME_SIZE); |
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263 | |
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264 | /* |
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265 | * See if we are using shared libraries by checking |
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266 | * bit 30 in 24 off of newp. If bit 30 is set then |
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267 | * we are using shared libraries and the jump address |
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268 | * is at what 24 off of newp points to so shove that |
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269 | * into 24 off of newp instead. |
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270 | */ |
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271 | |
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272 | if (jmp_addr & 0x40000000) { |
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273 | jmp_addr &= 0xfffffffc; |
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274 | *(addr + RP_OFF) = (unsigned32)*(unsigned32 *)jmp_addr; |
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275 | } |
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276 | #elif defined(sparc) |
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277 | |
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278 | /* |
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279 | * See /usr/include/sys/stack.h in Solaris 2.3 for a nice |
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280 | * diagram of the stack. |
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281 | */ |
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282 | |
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283 | asm ("ta 0x03"); /* flush registers */ |
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284 | |
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285 | *(addr + RP_OFF) = jmp_addr + ADDR_ADJ_OFFSET; |
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286 | *(addr + SP_OFF) = (unsigned32)(_stack_high - CPU_FRAME_SIZE); |
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287 | *(addr + FP_OFF) = (unsigned32)(_stack_high); |
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288 | #else |
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289 | #error "UNKNOWN CPU!!!" |
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290 | #endif |
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291 | |
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292 | if (_new_level) |
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293 | _CPU_ISR_Set_signal_level(1); |
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294 | else |
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295 | _CPU_ISR_Set_signal_level(0); |
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296 | |
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297 | } |
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298 | |
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299 | void _CPU_Context_restore( |
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300 | Context_Control *next |
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301 | ) |
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302 | { |
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303 | longjmp(next->regs, 0); |
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304 | } |
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305 | |
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306 | void _CPU_Context_switch( |
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307 | Context_Control *current, |
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308 | Context_Control *next |
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309 | ) |
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310 | { |
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311 | /* |
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312 | * Save the current context |
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313 | */ |
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314 | |
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315 | if (setjmp(current->regs) == 0) { |
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316 | |
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317 | /* |
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318 | * Switch to the new context |
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319 | */ |
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320 | |
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321 | longjmp(next->regs, 0); |
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322 | } |
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323 | } |
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324 | |
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325 | void _CPU_Save_float_context( |
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326 | Context_Control_fp *fp_context |
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327 | ) |
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328 | { |
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329 | } |
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330 | |
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331 | void _CPU_Restore_float_context( |
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332 | Context_Control_fp *fp_context |
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333 | ) |
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334 | { |
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335 | } |
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336 | |
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337 | void _CPU_ISR_Set_signal_level(unsigned32 level) |
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338 | { |
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339 | if (level) |
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340 | _CPU_Disable_signal(); |
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341 | else |
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342 | _CPU_Enable_signal(0); |
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343 | } |
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344 | |
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345 | |
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346 | unsigned32 _CPU_Disable_signal(void) |
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347 | { |
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348 | sigset_t old_mask; |
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349 | sigset_t empty_mask; |
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350 | |
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351 | sigemptyset(&empty_mask); |
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352 | sigemptyset(&old_mask); |
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353 | sigprocmask(SIG_BLOCK, &UNIX_SIGNAL_MASK, &old_mask); |
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354 | |
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355 | if (memcmp((char *)&empty_mask, (char *)&old_mask, sizeof(sigset_t)) != 0) |
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356 | return 1; |
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357 | |
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358 | return 0; |
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359 | } |
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360 | |
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361 | |
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362 | void _CPU_Enable_signal(unsigned32 level) |
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363 | { |
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364 | if (level == 0) |
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365 | sigprocmask(SIG_UNBLOCK, &UNIX_SIGNAL_MASK, 0); |
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366 | } |
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367 | |
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368 | |
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369 | /* |
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370 | * Support for external and spurious interrupts on HPPA |
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371 | * |
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372 | * TODO: |
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373 | * delete interrupt.c etc. |
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374 | * Count interrupts |
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375 | * make sure interrupts disabled properly |
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376 | * should handler check again for more interrupts before exit? |
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377 | * How to enable interrupts from an interrupt handler? |
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378 | * Make sure there is an entry for everything in ISR_Vector_Table |
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379 | */ |
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380 | |
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381 | /* |
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382 | * Init the external interrupt scheme |
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383 | * called by bsp_start() |
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384 | */ |
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385 | |
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386 | rtems_status_code |
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387 | signal_initialize(void) |
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388 | { |
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389 | struct sigaction act; |
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390 | sigset_t mask; |
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391 | |
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392 | /* mark them all active except for TraceTrap and Abort */ |
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393 | |
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394 | sigfillset(&mask); |
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395 | sigdelset(&mask, SIGTRAP); |
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396 | sigdelset(&mask, SIGABRT); |
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397 | sigdelset(&mask, SIGIOT); |
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398 | sigdelset(&mask, SIGCONT); |
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399 | sigprocmask(SIG_UNBLOCK, &mask, 0); |
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400 | |
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401 | act.sa_handler = interrupt_handler; |
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402 | act.sa_mask = mask; |
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403 | #if defined(solaris) |
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404 | act.sa_flags = SA_RESTART; |
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405 | #else |
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406 | act.sa_flags = 0; |
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407 | #endif |
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408 | |
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409 | sigaction(SIGHUP, &act, 0); |
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410 | sigaction(SIGINT, &act, 0); |
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411 | sigaction(SIGQUIT, &act, 0); |
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412 | sigaction(SIGILL, &act, 0); |
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413 | sigaction(SIGEMT, &act, 0); |
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414 | sigaction(SIGFPE, &act, 0); |
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415 | sigaction(SIGKILL, &act, 0); |
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416 | sigaction(SIGBUS, &act, 0); |
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417 | sigaction(SIGSEGV, &act, 0); |
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418 | sigaction(SIGSYS, &act, 0); |
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419 | sigaction(SIGPIPE, &act, 0); |
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420 | sigaction(SIGALRM, &act, 0); |
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421 | sigaction(SIGTERM, &act, 0); |
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422 | sigaction(SIGUSR1, &act, 0); |
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423 | sigaction(SIGUSR2, &act, 0); |
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424 | sigaction(SIGCHLD, &act, 0); |
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425 | sigaction(SIGCLD, &act, 0); |
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426 | sigaction(SIGPWR, &act, 0); |
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427 | sigaction(SIGVTALRM, &act, 0); |
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428 | sigaction(SIGPROF, &act, 0); |
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429 | sigaction(SIGIO, &act, 0); |
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430 | sigaction(SIGWINCH, &act, 0); |
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431 | sigaction(SIGSTOP, &act, 0); |
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432 | sigaction(SIGTTIN, &act, 0); |
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433 | sigaction(SIGTTOU, &act, 0); |
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434 | sigaction(SIGURG, &act, 0); |
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435 | /* |
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436 | * XXX: Really should be on HPUX. |
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437 | */ |
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438 | |
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439 | #if defined(hppa1_1) |
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440 | sigaction(SIGLOST, &act, 0); |
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441 | #endif |
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442 | |
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443 | return RTEMS_SUCCESSFUL; |
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444 | } |
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445 | |
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446 | |
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447 | /* |
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448 | * External interrupt handler. |
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449 | * This is installed as cpu interrupt handler. |
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450 | * It vectors out to specific external interrupt handlers. |
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451 | */ |
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452 | |
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453 | void |
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454 | interrupt_handler(int vector) |
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455 | { |
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456 | if (_ISR_Nest_level++ == 0) { |
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457 | /* switch to interrupt stack */ |
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458 | } |
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459 | |
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460 | _Thread_Dispatch_disable_level++; |
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461 | |
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462 | if (_ISR_Vector_table[vector]) { |
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463 | _ISR_Vector_table[vector](vector); |
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464 | } |
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465 | else { |
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466 | Stray_signal(vector); |
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467 | } |
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468 | |
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469 | if (_ISR_Nest_level-- == 0) { |
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470 | /* switch back to original stack */ |
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471 | } |
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472 | |
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473 | _Thread_Dispatch_disable_level--; |
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474 | |
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475 | if (_Thread_Dispatch_disable_level == 0 && |
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476 | (_Context_Switch_necessary || _ISR_Signals_to_thread_executing)) { |
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477 | _CPU_Enable_signal(0); |
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478 | _Thread_Dispatch(); |
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479 | } |
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480 | } |
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481 | |
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482 | |
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483 | void |
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484 | Stray_signal(int sig_num) |
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485 | { |
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486 | char buffer[ 80 ]; |
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487 | |
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488 | /* |
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489 | * We avoid using the stdio section of the library. |
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490 | * The following is generally safe. |
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491 | */ |
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492 | |
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493 | write( |
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494 | 2, |
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495 | buffer, |
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496 | sprintf( buffer, "Stray signal %d\n", sig_num ) |
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497 | ); |
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498 | |
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499 | /* |
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500 | * If it was a "fatal" signal, then exit here |
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501 | * If app code has installed a hander for one of these, then |
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502 | * we won't call Stray_signal, so this is ok. |
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503 | */ |
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504 | |
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505 | switch (sig_num) |
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506 | { |
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507 | case SIGINT: |
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508 | case SIGHUP: |
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509 | case SIGQUIT: |
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510 | case SIGILL: |
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511 | case SIGEMT: |
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512 | case SIGKILL: |
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513 | case SIGBUS: |
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514 | case SIGSEGV: |
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515 | case SIGTERM: |
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516 | _CPU_Fatal_error(0x100 + sig_num); |
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517 | } |
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518 | } |
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519 | |
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520 | |
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521 | void |
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522 | _CPU_Fatal_error(unsigned32 error) |
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523 | { |
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524 | setitimer(ITIMER_REAL, 0, 0); |
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525 | |
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526 | _exit(error); |
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527 | } |
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528 | |
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529 | int |
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530 | _CPU_ffs(unsigned32 value) |
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531 | { |
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532 | int output; |
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533 | |
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534 | output = ffs(value); |
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535 | output = output - 1; |
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536 | |
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537 | return(output); |
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538 | } |
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