source: rtems/cpukit/score/cpu/unix/cpu.c @ 3ec7bfc

4.104.114.84.95
Last change on this file since 3ec7bfc was 3ec7bfc, checked in by Joel Sherrill <joel.sherrill@…>, on Mar 24, 1998 at 4:24:39 PM

Rename hppa1_1 to hppa1.1 and switched to using XXX macros for
the CPU family name constants.

  • Property mode set to 100644
File size: 22.9 KB
Line 
1/*
2 *  UNIX Simulator Dependent Source
3 *
4 *  COPYRIGHT (c) 1994,95 by Division Incorporated
5 *
6 *  The license and distribution terms for this file may be
7 *  found in the file LICENSE in this distribution or at
8 *  http://www.OARcorp.com/rtems/license.html.
9 *
10 *  $Id$
11 */
12
13#include <rtems/system.h>
14#include <rtems/score/isr.h>
15#include <rtems/score/interr.h>
16
17#if defined(__linux__)
18#define MALLOC_0_RETURNS_NULL
19#endif
20
21#include <sys/types.h>
22#include <sys/times.h>
23#include <stdio.h>
24#include <stdlib.h>
25#include <setjmp.h>
26#include <signal.h>
27#include <time.h>
28#include <sys/time.h>
29#include <errno.h>
30#include <unistd.h>
31#include <sys/ipc.h>
32#include <sys/shm.h>
33#include <sys/sem.h>
34#include <string.h>   /* memset */
35
36#ifndef SA_RESTART
37#define SA_RESTART 0
38#endif
39
40typedef struct {
41  jmp_buf   regs;
42  unsigned32  isr_level;
43} Context_Control_overlay;
44
45void  _CPU_Signal_initialize(void);
46void  _CPU_Stray_signal(int);
47void  _CPU_ISR_Handler(int);
48
49static sigset_t         _CPU_Signal_mask;
50static Context_Control_overlay
51          _CPU_Context_Default_with_ISRs_enabled CPU_STRUCTURE_ALIGNMENT;
52static Context_Control_overlay
53          _CPU_Context_Default_with_ISRs_disabled CPU_STRUCTURE_ALIGNMENT;
54
55/*
56 * Sync IO support, an entry for each fd that can be set
57 */
58
59void  _CPU_Sync_io_Init();
60
61static rtems_sync_io_handler _CPU_Sync_io_handlers[FD_SETSIZE];
62static int sync_io_nfds;
63static fd_set sync_io_readfds;
64static fd_set sync_io_writefds;
65static fd_set sync_io_exceptfds;
66
67/*
68 * Which cpu are we? Used by libcpu and libbsp.
69 */
70
71int cpu_number;
72
73/*PAGE
74 *
75 *  _CPU_ISR_From_CPU_Init
76 */
77
78sigset_t  posix_empty_mask;
79
80void _CPU_ISR_From_CPU_Init()
81{
82  unsigned32        i;
83  proc_ptr          old_handler;
84
85  /*
86   * Generate an empty mask to be used by disable_support
87   */
88
89  sigemptyset(&posix_empty_mask);
90
91  /*
92   * Block all the signals except SIGTRAP for the debugger
93   * and fatal error signals.
94   */
95
96  (void) sigfillset(&_CPU_Signal_mask);
97  (void) sigdelset(&_CPU_Signal_mask, SIGTRAP);
98  (void) sigdelset(&_CPU_Signal_mask, SIGABRT);
99  (void) sigdelset(&_CPU_Signal_mask, SIGIOT);
100  (void) sigdelset(&_CPU_Signal_mask, SIGCONT);
101  (void) sigdelset(&_CPU_Signal_mask, SIGSEGV);
102  (void) sigdelset(&_CPU_Signal_mask, SIGBUS);
103  (void) sigdelset(&_CPU_Signal_mask, SIGFPE);
104
105  _CPU_ISR_Enable(1);
106
107  /*
108   * Set the handler for all signals to be signal_handler
109   * which will then vector out to the correct handler
110   * for whichever signal actually happened. Initially
111   * set the vectors to the stray signal handler.
112   */
113
114  for (i = 0; i < CPU_INTERRUPT_NUMBER_OF_VECTORS; i++)
115      (void)_CPU_ISR_install_vector(i, _CPU_Stray_signal, &old_handler);
116
117  _CPU_Signal_initialize();
118}
119
120void _CPU_Signal_initialize( void )
121{
122  struct sigaction  act;
123  sigset_t          mask;
124
125  /* mark them all active except for TraceTrap  and Abort */
126
127  mask = _CPU_Signal_mask;
128  sigprocmask(SIG_UNBLOCK, &mask, 0);
129
130  act.sa_handler = _CPU_ISR_Handler;
131  act.sa_mask = mask;
132  act.sa_flags = SA_RESTART;
133
134  sigaction(SIGHUP, &act, 0);
135  sigaction(SIGINT, &act, 0);
136  sigaction(SIGQUIT, &act, 0);
137  sigaction(SIGILL, &act, 0);
138#ifdef SIGEMT
139  sigaction(SIGEMT, &act, 0);
140#endif
141  sigaction(SIGFPE, &act, 0);
142  sigaction(SIGKILL, &act, 0);
143  sigaction(SIGBUS, &act, 0);
144  sigaction(SIGSEGV, &act, 0);
145#ifdef SIGSYS
146  sigaction(SIGSYS, &act, 0);
147#endif
148  sigaction(SIGPIPE, &act, 0);
149  sigaction(SIGALRM, &act, 0);
150  sigaction(SIGTERM, &act, 0);
151  sigaction(SIGUSR1, &act, 0);
152  sigaction(SIGUSR2, &act, 0);
153  sigaction(SIGCHLD, &act, 0);
154  sigaction(SIGCLD, &act, 0);
155  sigaction(SIGPWR, &act, 0);
156  sigaction(SIGVTALRM, &act, 0);
157  sigaction(SIGPROF, &act, 0);
158  sigaction(SIGIO, &act, 0);
159  sigaction(SIGWINCH, &act, 0);
160  sigaction(SIGSTOP, &act, 0);
161  sigaction(SIGTTIN, &act, 0);
162  sigaction(SIGTTOU, &act, 0);
163  sigaction(SIGURG, &act, 0);
164#ifdef SIGLOST
165    sigaction(SIGLOST, &act, 0);
166#endif
167}
168
169/*PAGE
170 *
171 *  _CPU_Context_From_CPU_Init
172 */
173
174void _CPU_Context_From_CPU_Init()
175{
176
177#if defined(__hppa__) && defined(RTEMS_UNIXLIB_SETJMP)
178    /*
179     * HACK - set the _SYSTEM_ID to 0x20c so that setjmp/longjmp
180     * will handle the full 32 floating point registers.
181     */
182
183    {
184      extern unsigned32 _SYSTEM_ID;
185
186      _SYSTEM_ID = 0x20c;
187    }
188#endif
189
190  /*
191   *  get default values to use in _CPU_Context_Initialize()
192   */
193
194
195  (void) memset(
196    &_CPU_Context_Default_with_ISRs_enabled,
197    0,
198    sizeof(Context_Control)
199  );
200  (void) memset(
201    &_CPU_Context_Default_with_ISRs_disabled,
202    0,
203    sizeof(Context_Control)
204  );
205
206  _CPU_ISR_Set_level( 0 );
207  _CPU_Context_switch(
208    (Context_Control *) &_CPU_Context_Default_with_ISRs_enabled,
209    (Context_Control *) &_CPU_Context_Default_with_ISRs_enabled
210  );
211
212  _CPU_ISR_Set_level( 1 );
213  _CPU_Context_switch(
214    (Context_Control *) &_CPU_Context_Default_with_ISRs_disabled,
215    (Context_Control *) &_CPU_Context_Default_with_ISRs_disabled
216  );
217}
218
219/*PAGE
220 *
221 *  _CPU_Sync_io_Init
222 */
223
224void _CPU_Sync_io_Init()
225{
226  int fd;
227
228  for (fd = 0; fd < FD_SETSIZE; fd++)
229    _CPU_Sync_io_handlers[fd] = NULL;
230
231  sync_io_nfds = 0;
232  FD_ZERO(&sync_io_readfds);
233  FD_ZERO(&sync_io_writefds);
234  FD_ZERO(&sync_io_exceptfds);
235}
236
237/*PAGE
238 *
239 *  _CPU_ISR_Get_level
240 */
241
242unsigned32 _CPU_ISR_Get_level( void )
243{
244  sigset_t old_mask;
245
246  sigprocmask(SIG_BLOCK, 0, &old_mask);
247
248  if (memcmp((void *)&posix_empty_mask, (void *)&old_mask, sizeof(sigset_t)))
249      return 1;
250
251  return 0;
252}
253
254/*  _CPU_Initialize
255 *
256 *  This routine performs processor dependent initialization.
257 *
258 *  INPUT PARAMETERS:
259 *    cpu_table       - CPU table to initialize
260 *    thread_dispatch - address of disptaching routine
261 */
262
263
264void _CPU_Initialize(
265  rtems_cpu_table  *cpu_table,
266  void            (*thread_dispatch)      /* ignored on this CPU */
267)
268{
269  /*
270   *  The thread_dispatch argument is the address of the entry point
271   *  for the routine called at the end of an ISR once it has been
272   *  decided a context switch is necessary.  On some compilation
273   *  systems it is difficult to call a high-level language routine
274   *  from assembly.  This allows us to trick these systems.
275   *
276   *  If you encounter this problem save the entry point in a CPU
277   *  dependent variable.
278   */
279
280  _CPU_Thread_dispatch_pointer = thread_dispatch;
281
282  /*
283   * XXX; If there is not an easy way to initialize the FP context
284   *      during Context_Initialize, then it is usually easier to
285   *      save an "uninitialized" FP context here and copy it to
286   *      the task's during Context_Initialize.
287   */
288
289  /* XXX: FP context initialization support */
290
291  _CPU_Table = *cpu_table;
292
293  _CPU_ISR_From_CPU_Init();
294
295  _CPU_Sync_io_Init();
296
297  _CPU_Context_From_CPU_Init();
298
299}
300
301/*PAGE
302 *
303 *  _CPU_ISR_install_raw_handler
304 */
305
306void _CPU_ISR_install_raw_handler(
307  unsigned32  vector,
308  proc_ptr    new_handler,
309  proc_ptr   *old_handler
310)
311{
312  _CPU_Fatal_halt( 0xdeaddead );
313}
314
315/*PAGE
316 *
317 *  _CPU_ISR_install_vector
318 *
319 *  This kernel routine installs the RTEMS handler for the
320 *  specified vector.
321 *
322 *  Input parameters:
323 *    vector      - interrupt vector number
324 *    old_handler - former ISR for this vector number
325 *    new_handler - replacement ISR for this vector number
326 *
327 *  Output parameters:  NONE
328 *
329 */
330
331
332void _CPU_ISR_install_vector(
333  unsigned32  vector,
334  proc_ptr    new_handler,
335  proc_ptr   *old_handler
336)
337{
338   *old_handler = _ISR_Vector_table[ vector ];
339
340   /*
341    *  If the interrupt vector table is a table of pointer to isr entry
342    *  points, then we need to install the appropriate RTEMS interrupt
343    *  handler for this vector number.
344    */
345
346   /*
347    *  We put the actual user ISR address in '_ISR_vector_table'.  This will
348    *  be used by the _CPU_ISR_Handler so the user gets control.
349    */
350
351    _ISR_Vector_table[ vector ] = new_handler;
352}
353
354/*PAGE
355 *
356 *  _CPU_Install_interrupt_stack
357 */
358
359void _CPU_Install_interrupt_stack( void )
360{
361}
362
363/*PAGE
364 *
365 *  _CPU_Thread_Idle_body
366 *
367 *  Stop until we get a signal which is the logically the same thing
368 *  entering low-power or sleep mode on a real processor and waiting for
369 *  an interrupt.  This significantly reduces the consumption of host
370 *  CPU cycles which is again similar to low power mode.
371 */
372
373void _CPU_Thread_Idle_body( void )
374{
375#if CPU_SYNC_IO
376  extern void _Thread_Dispatch(void);
377  int fd;
378#endif
379
380  while (1) {
381#ifdef RTEMS_DEBUG
382    /* interrupts had better be enabled at this point! */
383    if (_CPU_ISR_Get_level() != 0)
384       abort();
385#endif
386
387    /*
388     *  Block on a select statement, the CPU interface added allow the
389     *  user to add new descriptors which are to be blocked on
390     */
391
392#if CPU_SYNC_IO
393    if (sync_io_nfds) {
394      int result;
395
396      result = select(sync_io_nfds,
397                 &sync_io_readfds,
398                 &sync_io_writefds,
399                 &sync_io_exceptfds,
400                 NULL);
401
402      if ((result < 0) && (errno != EINTR))
403        _CPU_Fatal_error(0x200);       /* FIXME : what number should go here !! */
404
405      for (fd = 0; fd < sync_io_nfds; fd++) {
406        boolean read = FD_ISSET(fd, &sync_io_readfds);
407        boolean write = FD_ISSET(fd, &sync_io_writefds);
408        boolean except = FD_ISSET(fd, &sync_io_exceptfds);
409
410        if (_CPU_Sync_io_handlers[fd] && (read || write || except))
411          _CPU_Sync_io_handlers[fd](fd, read, write, except);
412
413        _Thread_Dispatch();
414      }
415    } else
416      pause();
417#else
418    pause();
419#endif
420
421  }
422
423}
424
425/*PAGE
426 *
427 *  _CPU_Context_Initialize
428 */
429
430void _CPU_Context_Initialize(
431  Context_Control  *_the_context,
432  unsigned32       *_stack_base,
433  unsigned32        _size,
434  unsigned32        _new_level,
435  void             *_entry_point,
436  boolean           _is_fp
437)
438{
439  unsigned32  *addr;
440  unsigned32   jmp_addr;
441  unsigned32   _stack_low;   /* lowest "stack aligned" address */
442  unsigned32   _stack_high;  /* highest "stack aligned" address */
443  unsigned32   _the_size;
444
445  jmp_addr = (unsigned32) _entry_point;
446
447  /*
448   *  On CPUs with stacks which grow down, we build the stack
449   *  based on the _stack_high address.  On CPUs with stacks which
450   *  grow up, we build the stack based on the _stack_low address.
451   */
452
453  _stack_low = (unsigned32)(_stack_base) + CPU_STACK_ALIGNMENT - 1;
454  _stack_low &= ~(CPU_STACK_ALIGNMENT - 1);
455
456  _stack_high = (unsigned32)(_stack_base) + _size;
457  _stack_high &= ~(CPU_STACK_ALIGNMENT - 1);
458
459  if (_stack_high > _stack_low)
460    _the_size = _stack_high - _stack_low;
461  else
462    _the_size = _stack_low - _stack_high;
463
464  /*
465   * Slam our jmp_buf template into the context we are creating
466   */
467
468  if ( _new_level == 0 )
469      *_the_context = *(Context_Control *)
470                         &_CPU_Context_Default_with_ISRs_enabled;
471  else
472      *_the_context = *(Context_Control *)
473                         &_CPU_Context_Default_with_ISRs_disabled;
474
475  addr = (unsigned32 *)_the_context;
476
477#if defined(__hppa__)
478  *(addr + RP_OFF) = jmp_addr;
479  *(addr + SP_OFF) = (unsigned32)(_stack_low + CPU_FRAME_SIZE);
480
481  /*
482   * See if we are using shared libraries by checking
483   * bit 30 in 24 off of newp. If bit 30 is set then
484   * we are using shared libraries and the jump address
485   * points to the pointer, so we put that into rp instead.
486   */
487
488  if (jmp_addr & 0x40000000) {
489    jmp_addr &= 0xfffffffc;
490     *(addr + RP_OFF) = *(unsigned32 *)jmp_addr;
491  }
492#elif defined(__sparc__)
493
494  /*
495   *  See /usr/include/sys/stack.h in Solaris 2.3 for a nice
496   *  diagram of the stack.
497   */
498
499  asm ("ta  0x03");            /* flush registers */
500
501  *(addr + RP_OFF) = jmp_addr + ADDR_ADJ_OFFSET;
502  *(addr + SP_OFF) = (unsigned32)(_stack_high - CPU_FRAME_SIZE);
503  *(addr + FP_OFF) = (unsigned32)(_stack_high);
504
505#elif defined(__i386__)
506
507    /*
508     *  This information was gathered by disassembling setjmp().
509     */
510
511    {
512      unsigned32 stack_ptr;
513
514      stack_ptr = _stack_high - CPU_FRAME_SIZE;
515
516      *(addr + EBX_OFF) = 0xFEEDFEED;
517      *(addr + ESI_OFF) = 0xDEADDEAD;
518      *(addr + EDI_OFF) = 0xDEAFDEAF;
519      *(addr + EBP_OFF) = stack_ptr;
520      *(addr + ESP_OFF) = stack_ptr;
521      *(addr + RET_OFF) = jmp_addr;
522
523      addr = (unsigned32 *) stack_ptr;
524
525      addr[ 0 ] = jmp_addr;
526      addr[ 1 ] = (unsigned32) stack_ptr;
527      addr[ 2 ] = (unsigned32) stack_ptr;
528    }
529
530#else
531#error "UNKNOWN CPU!!!"
532#endif
533
534}
535
536/*PAGE
537 *
538 *  _CPU_Context_restore
539 */
540
541void _CPU_Context_restore(
542  Context_Control  *next
543)
544{
545  Context_Control_overlay *nextp = (Context_Control_overlay *)next;
546
547  _CPU_ISR_Enable(nextp->isr_level);
548  longjmp( nextp->regs, 0 );
549}
550
551/*PAGE
552 *
553 *  _CPU_Context_switch
554 */
555
556static void do_jump(
557  Context_Control_overlay *currentp,
558  Context_Control_overlay *nextp
559);
560
561void _CPU_Context_switch(
562  Context_Control  *current,
563  Context_Control  *next
564)
565{
566  Context_Control_overlay *currentp = (Context_Control_overlay *)current;
567  Context_Control_overlay *nextp = (Context_Control_overlay *)next;
568#if 0
569  int status;
570#endif
571
572  currentp->isr_level = _CPU_ISR_Disable_support();
573
574  do_jump( currentp, nextp );
575
576#if 0
577  if (sigsetjmp(currentp->regs, 1) == 0) {    /* Save the current context */
578     siglongjmp(nextp->regs, 0);           /* Switch to the new context */
579     _Internal_error_Occurred(
580         INTERNAL_ERROR_CORE,
581         TRUE,
582         status
583       );
584  }
585#endif
586
587#ifdef RTEMS_DEBUG
588    if (_CPU_ISR_Get_level() == 0)
589       abort();
590#endif
591
592  _CPU_ISR_Enable(currentp->isr_level);
593}
594
595static void do_jump(
596  Context_Control_overlay *currentp,
597  Context_Control_overlay *nextp
598)
599{
600  int status;
601
602  if (setjmp(currentp->regs) == 0) {    /* Save the current context */
603     longjmp(nextp->regs, 0);           /* Switch to the new context */
604     _Internal_error_Occurred(
605         INTERNAL_ERROR_CORE,
606         TRUE,
607         status
608       );
609  }
610}
611
612/*PAGE
613 *
614 *  _CPU_Save_float_context
615 */
616
617void _CPU_Save_float_context(
618  Context_Control_fp *fp_context
619)
620{
621}
622
623/*PAGE
624 *
625 *  _CPU_Restore_float_context
626 */
627
628void _CPU_Restore_float_context(
629  Context_Control_fp *fp_context
630)
631{
632}
633
634/*PAGE
635 *
636 *  _CPU_ISR_Disable_support
637 */
638
639unsigned32 _CPU_ISR_Disable_support(void)
640{
641  int status;
642  sigset_t  old_mask;
643
644  status = sigprocmask(SIG_BLOCK, &_CPU_Signal_mask, &old_mask);
645  if ( status )
646    _Internal_error_Occurred(
647      INTERNAL_ERROR_CORE,
648      TRUE,
649      status
650    );
651
652  if (memcmp((void *)&posix_empty_mask, (void *)&old_mask, sizeof(sigset_t)))
653    return 1;
654
655  return 0;
656}
657
658/*PAGE
659 *
660 *  _CPU_ISR_Enable
661 */
662
663void _CPU_ISR_Enable(
664  unsigned32 level
665)
666{
667  int status;
668
669  if (level == 0)
670    status = sigprocmask(SIG_UNBLOCK, &_CPU_Signal_mask, 0);
671  else
672    status = sigprocmask(SIG_BLOCK, &_CPU_Signal_mask, 0);
673
674  if ( status )
675    _Internal_error_Occurred(
676      INTERNAL_ERROR_CORE,
677      TRUE,
678      status
679    );
680}
681
682/*PAGE
683 *
684 *  _CPU_ISR_Handler
685 *
686 *  External interrupt handler.
687 *  This is installed as a UNIX signal handler.
688 *  It vectors out to specific user interrupt handlers.
689 */
690
691void _CPU_ISR_Handler(int vector)
692{
693  extern void        _Thread_Dispatch(void);
694  extern unsigned32  _Thread_Dispatch_disable_level;
695  extern boolean     _Context_Switch_necessary;
696
697  if (_ISR_Nest_level++ == 0) {
698      /* switch to interrupt stack */
699  }
700
701  _Thread_Dispatch_disable_level++;
702
703  if (_ISR_Vector_table[vector]) {
704     _ISR_Vector_table[vector](vector);
705  } else {
706     _CPU_Stray_signal(vector);
707  }
708
709  if (_ISR_Nest_level-- == 0) {
710      /* switch back to original stack */
711  }
712
713  _Thread_Dispatch_disable_level--;
714
715  if (_Thread_Dispatch_disable_level == 0 &&
716      (_Context_Switch_necessary || _ISR_Signals_to_thread_executing)) {
717      _ISR_Signals_to_thread_executing = FALSE;
718      _CPU_ISR_Enable(0);
719      _Thread_Dispatch();
720  }
721}
722
723/*PAGE
724 *
725 *  _CPU_Stray_signal
726 */
727
728void _CPU_Stray_signal(int sig_num)
729{
730  char buffer[ 4 ];
731
732  /*
733   * print "stray" msg about ones which that might mean something
734   * Avoid using the stdio section of the library.
735   * The following is generally safe.
736   */
737
738  switch (sig_num)
739  {
740      case SIGCLD:
741          break;
742
743      default:
744      {
745        /*
746         *  We avoid using the stdio section of the library.
747         *  The following is generally safe
748         */
749
750        int digit;
751        int number = sig_num;
752        int len = 0;
753
754        digit = number / 100;
755        number %= 100;
756        if (digit) buffer[len++] = '0' + digit;
757
758        digit = number / 10;
759        number %= 10;
760        if (digit || len) buffer[len++] = '0' + digit;
761
762        digit = number;
763        buffer[len++] = '0' + digit;
764
765        buffer[ len++ ] = '\n';
766
767        write( 2, "Stray signal ", 13 );
768        write( 2, buffer, len );
769
770      }
771  }
772
773  /*
774   * If it was a "fatal" signal, then exit here
775   * If app code has installed a hander for one of these, then
776   * we won't call _CPU_Stray_signal, so this is ok.
777   */
778
779  switch (sig_num) {
780      case SIGINT:
781      case SIGHUP:
782      case SIGQUIT:
783      case SIGILL:
784#ifdef SIGEMT
785      case SIGEMT:
786#endif
787      case SIGKILL:
788      case SIGBUS:
789      case SIGSEGV:
790      case SIGTERM:
791      case SIGIOT:
792        _CPU_Fatal_error(0x100 + sig_num);
793  }
794}
795
796/*PAGE
797 *
798 *  _CPU_Fatal_error
799 */
800
801void _CPU_Fatal_error(unsigned32 error)
802{
803  setitimer(ITIMER_REAL, 0, 0);
804
805  if ( error ) {
806#ifdef RTEMS_DEBUG
807    abort();
808#endif
809    if (getenv("RTEMS_DEBUG"))
810      abort();
811  }
812
813  _exit(error);
814}
815
816/*
817 *  Special Purpose Routines to hide the use of UNIX system calls.
818 */
819
820int _CPU_Set_sync_io_handler(
821  int fd,
822  boolean read,
823  boolean write,
824  boolean except,
825  rtems_sync_io_handler handler
826)
827{
828  if ((fd < FD_SETSIZE) && (_CPU_Sync_io_handlers[fd] == NULL)) {
829    if (read)
830      FD_SET(fd, &sync_io_readfds);
831    else
832      FD_CLR(fd, &sync_io_readfds);
833    if (write)
834      FD_SET(fd, &sync_io_writefds);
835    else
836      FD_CLR(fd, &sync_io_writefds);
837    if (except)
838      FD_SET(fd, &sync_io_exceptfds);
839    else
840      FD_CLR(fd, &sync_io_exceptfds);
841    _CPU_Sync_io_handlers[fd] = handler;
842    if ((fd + 1) > sync_io_nfds)
843      sync_io_nfds = fd + 1;
844    return 0;
845  }
846  return -1;
847}
848
849int _CPU_Clear_sync_io_handler(
850  int fd
851)
852{
853  if ((fd < FD_SETSIZE) && _CPU_Sync_io_handlers[fd]) {
854    FD_CLR(fd, &sync_io_readfds);
855    FD_CLR(fd, &sync_io_writefds);
856    FD_CLR(fd, &sync_io_exceptfds);
857    _CPU_Sync_io_handlers[fd] = NULL;
858    sync_io_nfds = 0;
859    for (fd = 0; fd < FD_SETSIZE; fd++)
860      if (FD_ISSET(fd, &sync_io_readfds) ||
861          FD_ISSET(fd, &sync_io_writefds) ||
862          FD_ISSET(fd, &sync_io_exceptfds))
863        sync_io_nfds = fd;
864    return 0;
865  }
866  return -1;
867}
868
869int _CPU_Get_clock_vector( void )
870{
871  return SIGALRM;
872}
873
874void _CPU_Start_clock(
875  int microseconds
876)
877{
878  struct itimerval  new;
879
880  new.it_value.tv_sec = 0;
881  new.it_value.tv_usec = microseconds;
882  new.it_interval.tv_sec = 0;
883  new.it_interval.tv_usec = microseconds;
884
885  setitimer(ITIMER_REAL, &new, 0);
886}
887
888void _CPU_Stop_clock( void )
889{
890  struct itimerval  new;
891  struct sigaction  act;
892
893  /*
894   * Set the SIGALRM signal to ignore any last
895   * signals that might come in while we are
896   * disarming the timer and removing the interrupt
897   * vector.
898   */
899
900  (void) memset(&act, 0, sizeof(act));
901  act.sa_handler = SIG_IGN;
902
903  sigaction(SIGALRM, &act, 0);
904
905  (void) memset(&new, 0, sizeof(new));
906  setitimer(ITIMER_REAL, &new, 0);
907}
908
909int  _CPU_SHM_Semid;
910extern       void fix_syscall_errno( void );
911
912void _CPU_SHM_Init(
913  unsigned32   maximum_nodes,
914  boolean      is_master_node,
915  void       **shm_address,
916  unsigned32  *shm_length
917)
918{
919  int          i;
920  int          shmid;
921  char        *shm_addr;
922  key_t        shm_key;
923  key_t        sem_key;
924  int          status = 0;  /* to avoid unitialized warnings */
925  int          shm_size;
926
927  if (getenv("RTEMS_SHM_KEY"))
928    shm_key = strtol(getenv("RTEMS_SHM_KEY"), 0, 0);
929  else
930#ifdef RTEMS_SHM_KEY
931    shm_key = RTEMS_SHM_KEY;
932#else
933    shm_key = 0xa000;
934#endif
935
936    if (getenv("RTEMS_SHM_SIZE"))
937      shm_size = strtol(getenv("RTEMS_SHM_SIZE"), 0, 0);
938    else
939#ifdef RTEMS_SHM_SIZE
940      shm_size = RTEMS_SHM_SIZE;
941#else
942      shm_size = 64 * 1024;
943#endif
944
945    if (getenv("RTEMS_SHM_SEMAPHORE_KEY"))
946      sem_key = strtol(getenv("RTEMS_SHM_SEMAPHORE_KEY"), 0, 0);
947    else
948#ifdef RTEMS_SHM_SEMAPHORE_KEY
949      sem_key = RTEMS_SHM_SEMAPHORE_KEY;
950#else
951      sem_key = 0xa001;
952#endif
953
954    shmid = shmget(shm_key, shm_size, IPC_CREAT | 0660);
955    if ( shmid == -1 ) {
956      fix_syscall_errno(); /* in case of newlib */
957      perror( "shmget" );
958      _CPU_Fatal_halt( 0xdead0001 );
959    }
960
961    shm_addr = shmat(shmid, (char *)0, SHM_RND);
962    if ( shm_addr == (void *)-1 ) {
963      fix_syscall_errno(); /* in case of newlib */
964      perror( "shmat" );
965      _CPU_Fatal_halt( 0xdead0002 );
966    }
967
968    _CPU_SHM_Semid = semget(sem_key, maximum_nodes + 1, IPC_CREAT | 0660);
969    if ( _CPU_SHM_Semid == -1 ) {
970      fix_syscall_errno(); /* in case of newlib */
971      perror( "semget" );
972      _CPU_Fatal_halt( 0xdead0003 );
973    }
974
975    if ( is_master_node ) {
976      for ( i=0 ; i <= maximum_nodes ; i++ ) {
977#if defined(solaris2)
978        union semun {
979          int val;
980          struct semid_ds *buf;
981          ushort *array;
982        } help;
983
984        help.val = 1;
985        status = semctl( _CPU_SHM_Semid, i, SETVAL, help );
986#elif defined(__linux__)
987        union semun help;
988
989        help.val = 1;
990        status = semctl( _CPU_SHM_Semid, i, SETVAL, help );
991#elif defined(hpux)
992        status = semctl( _CPU_SHM_Semid, i, SETVAL, 1 );
993#else
994#error "Not a supported unix variant"
995#endif
996
997        fix_syscall_errno(); /* in case of newlib */
998        if ( status == -1 ) {
999          _CPU_Fatal_halt( 0xdead0004 );
1000        }
1001      }
1002    }
1003
1004  *shm_address = shm_addr;
1005  *shm_length = shm_size;
1006
1007}
1008
1009int _CPU_Get_pid( void )
1010{
1011  return getpid();
1012}
1013
1014/*
1015 * Define this to use signals for MPCI shared memory driver.
1016 * If undefined, the shared memory driver will poll from the
1017 * clock interrupt.
1018 * Ref: ../shmsupp/getcfg.c
1019 *
1020 * BEWARE:: many UN*X kernels and debuggers become severely confused when
1021 *          debugging programs which use signals.  The problem is *much*
1022 *          worse when using multiple signals, since ptrace(2) tends to
1023 *          drop all signals except 1 in the case of multiples.
1024 *          On hpux9, this problem was so bad, we couldn't use interrupts
1025 *          with the shared memory driver if we ever hoped to debug
1026 *          RTEMS programs.
1027 *          Maybe systems that use /proc don't have this problem...
1028 */
1029
1030
1031int _CPU_SHM_Get_vector( void )
1032{
1033#ifdef CPU_USE_SHM_INTERRUPTS
1034  return SIGUSR1;
1035#else
1036  return 0;
1037#endif
1038}
1039
1040void _CPU_SHM_Send_interrupt(
1041  int pid,
1042  int vector
1043)
1044{
1045  kill((pid_t) pid, vector);
1046}
1047
1048void _CPU_SHM_Lock(
1049  int semaphore
1050)
1051{
1052  struct sembuf sb;
1053
1054  sb.sem_num = semaphore;
1055  sb.sem_op  = -1;
1056  sb.sem_flg = 0;
1057
1058  while (1) {
1059    int status = -1;
1060
1061    status = semop(_CPU_SHM_Semid, &sb, 1);
1062    if ( status >= 0 )
1063      break;
1064    if ( status == -1 ) {
1065       fix_syscall_errno();    /* in case of newlib */
1066        if (errno == EINTR)
1067            continue;
1068        perror("shm lock");
1069        _CPU_Fatal_halt( 0xdead0005 );
1070    }
1071  }
1072
1073}
1074
1075void _CPU_SHM_Unlock(
1076  int semaphore
1077)
1078{
1079  struct sembuf  sb;
1080  int            status;
1081
1082  sb.sem_num = semaphore;
1083  sb.sem_op  = 1;
1084  sb.sem_flg = 0;
1085
1086  while (1) {
1087    status = semop(_CPU_SHM_Semid, &sb, 1);
1088    if ( status >= 0 )
1089      break;
1090
1091    if ( status == -1 ) {
1092      fix_syscall_errno();    /* in case of newlib */
1093      if (errno == EINTR)
1094          continue;
1095      perror("shm unlock");
1096      _CPU_Fatal_halt( 0xdead0006 );
1097    }
1098  }
1099
1100}
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