source: rtems/cpukit/score/cpu/unix/cpu.c @ 1c964ffa

4.104.114.84.9
Last change on this file since 1c964ffa was 1c964ffa, checked in by Joel Sherrill <joel.sherrill@…>, on May 8, 1996 at 9:53:50 PM

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1/*
2 *  UNIX Simulator Dependent Source
3 *
4 *
5 *  To anyone who acknowledges that this file is provided "AS IS"
6 *  without any express or implied warranty:
7 *      permission to use, copy, modify, and distribute this file
8 *      for any purpose is hereby granted without fee, provided that
9 *      the above copyright notice and this notice appears in all
10 *      copies, and that the name of Division Incorporated not be
11 *      used in advertising or publicity pertaining to distribution
12 *      of the software without specific, written prior permission.
13 *      Division Incorporated makes no representations about the
14 *      suitability of this software for any purpose.
15 *
16 *  $Id$
17 */
18
19#include <rtems/system.h>
20#include <rtems/score/isr.h>
21#include <rtems/score/interr.h>
22
23#if defined(solaris2)
24/*
25#undef  _POSIX_C_SOURCE
26#define _POSIX_C_SOURCE 3
27#undef  __STRICT_ANSI__
28#define __STRICT_ANSI__
29*/
30#define __EXTENSIONS__
31#endif
32 
33#if defined(linux)
34#define MALLOC_0_RETURNS_NULL
35#endif
36 
37#include <sys/types.h>
38#include <sys/times.h>
39#include <stdio.h>
40#include <stdlib.h>
41#include <setjmp.h>
42#include <signal.h>
43#include <time.h>
44#include <sys/time.h>
45#include <errno.h>
46#include <unistd.h>
47#include <sys/ipc.h>
48#include <sys/shm.h>
49#include <sys/sem.h>
50#include <string.h>   /* memset */
51
52#ifndef SA_RESTART
53#define SA_RESTART 0
54#endif
55
56typedef struct {
57  jmp_buf   regs;
58  sigset_t  isr_level;
59} Context_Control_overlay;
60
61void  _CPU_Signal_initialize(void);
62void  _CPU_Stray_signal(int);
63void  _CPU_ISR_Handler(int);
64
65sigset_t         _CPU_Signal_mask;
66Context_Control  _CPU_Context_Default_with_ISRs_enabled;
67Context_Control  _CPU_Context_Default_with_ISRs_disabled;
68
69/*
70 * Which cpu are we? Used by libcpu and libbsp.
71 */
72
73int cpu_number;
74
75/*PAGE
76 *
77 *  _CPU_ISR_From_CPU_Init
78 */
79
80sigset_t  posix_empty_mask;
81
82void _CPU_ISR_From_CPU_Init()
83{
84  unsigned32        i;
85  proc_ptr          old_handler;
86
87  /*
88   * Generate an empty mask to be used by disable_support
89   */
90
91  sigemptyset(&posix_empty_mask);
92
93  /*
94   * Block all the signals except SIGTRAP for the debugger
95   * and SIGABRT for fatal errors.
96   */
97
98  (void) sigfillset(&_CPU_Signal_mask);
99  (void) sigdelset(&_CPU_Signal_mask, SIGTRAP);
100  (void) sigdelset(&_CPU_Signal_mask, SIGABRT);
101  (void) sigdelset(&_CPU_Signal_mask, SIGIOT);
102  (void) sigdelset(&_CPU_Signal_mask, SIGCONT);
103
104  _CPU_ISR_Enable(1);
105
106  /*
107   * Set the handler for all signals to be signal_handler
108   * which will then vector out to the correct handler
109   * for whichever signal actually happened. Initially
110   * set the vectors to the stray signal handler.
111   */
112
113  for (i = 0; i < CPU_INTERRUPT_NUMBER_OF_VECTORS; i++)
114      (void)_CPU_ISR_install_vector(i, _CPU_Stray_signal, &old_handler);
115
116  _CPU_Signal_initialize();
117}
118
119void _CPU_Signal_initialize( void )
120{
121  struct sigaction  act;
122  sigset_t          mask;
123
124  /* mark them all active except for TraceTrap  and Abort */
125
126  sigfillset(&mask);
127  sigdelset(&mask, SIGTRAP);
128  sigdelset(&mask, SIGABRT);
129  sigdelset(&mask, SIGIOT);
130  sigdelset(&mask, SIGCONT);
131  sigprocmask(SIG_UNBLOCK, &mask, 0);
132
133  act.sa_handler = _CPU_ISR_Handler;
134  act.sa_mask = mask;
135  act.sa_flags = SA_RESTART;
136
137  sigaction(SIGHUP, &act, 0);
138  sigaction(SIGINT, &act, 0);
139  sigaction(SIGQUIT, &act, 0);
140  sigaction(SIGILL, &act, 0);
141#ifdef SIGEMT
142  sigaction(SIGEMT, &act, 0);
143#endif
144  sigaction(SIGFPE, &act, 0);
145  sigaction(SIGKILL, &act, 0);
146  sigaction(SIGBUS, &act, 0);
147  sigaction(SIGSEGV, &act, 0);
148#ifdef SIGSYS
149  sigaction(SIGSYS, &act, 0);
150#endif
151  sigaction(SIGPIPE, &act, 0);
152  sigaction(SIGALRM, &act, 0);
153  sigaction(SIGTERM, &act, 0);
154  sigaction(SIGUSR1, &act, 0);
155  sigaction(SIGUSR2, &act, 0);
156  sigaction(SIGCHLD, &act, 0);
157  sigaction(SIGCLD, &act, 0);
158  sigaction(SIGPWR, &act, 0);
159  sigaction(SIGVTALRM, &act, 0);
160  sigaction(SIGPROF, &act, 0);
161  sigaction(SIGIO, &act, 0);
162  sigaction(SIGWINCH, &act, 0);
163  sigaction(SIGSTOP, &act, 0);
164  sigaction(SIGTTIN, &act, 0);
165  sigaction(SIGTTOU, &act, 0);
166  sigaction(SIGURG, &act, 0);
167#ifdef SIGLOST
168    sigaction(SIGLOST, &act, 0);
169#endif
170
171}
172
173/*PAGE
174 *
175 *  _CPU_Context_From_CPU_Init
176 */
177
178void _CPU_Context_From_CPU_Init()
179{
180
181#if defined(hppa1_1) && defined(RTEMS_UNIXLIB_SETJMP)
182    /*
183     * HACK - set the _SYSTEM_ID to 0x20c so that setjmp/longjmp
184     * will handle the full 32 floating point registers.
185     */
186
187    {
188      extern unsigned32 _SYSTEM_ID;
189
190      _SYSTEM_ID = 0x20c;
191    }
192#endif
193
194  /*
195   *  get default values to use in _CPU_Context_Initialize()
196   */
197
198 
199  (void) memset(
200    &_CPU_Context_Default_with_ISRs_enabled,
201    0,
202    sizeof(Context_Control)
203  );
204  (void) memset(
205    &_CPU_Context_Default_with_ISRs_disabled,
206    0,
207    sizeof(Context_Control)
208  );
209
210  _CPU_ISR_Set_level( 0 );
211  _CPU_Context_switch(
212    &_CPU_Context_Default_with_ISRs_enabled,
213    &_CPU_Context_Default_with_ISRs_enabled
214  );
215
216  _CPU_ISR_Set_level( 1 );
217  _CPU_Context_switch(
218    &_CPU_Context_Default_with_ISRs_disabled,
219    &_CPU_Context_Default_with_ISRs_disabled
220  );
221}
222
223/*PAGE
224 *
225 *  _CPU_ISR_Get_level
226 */
227
228sigset_t GET_old_mask;
229
230unsigned32 _CPU_ISR_Get_level( void )
231{
232/*  sigset_t  old_mask; */
233   unsigned32 old_level;
234 
235  sigprocmask(0, 0, &GET_old_mask);
236 
237  if (memcmp((void *)&posix_empty_mask, (void *)&GET_old_mask, sizeof(sigset_t)))
238    old_level = 1;
239  else 
240    old_level = 0;
241
242  return old_level;
243}
244
245/*  _CPU_Initialize
246 *
247 *  This routine performs processor dependent initialization.
248 *
249 *  INPUT PARAMETERS:
250 *    cpu_table       - CPU table to initialize
251 *    thread_dispatch - address of disptaching routine
252 */
253
254
255void _CPU_Initialize(
256  rtems_cpu_table  *cpu_table,
257  void            (*thread_dispatch)      /* ignored on this CPU */
258)
259{
260  /*
261   *  The thread_dispatch argument is the address of the entry point
262   *  for the routine called at the end of an ISR once it has been
263   *  decided a context switch is necessary.  On some compilation
264   *  systems it is difficult to call a high-level language routine
265   *  from assembly.  This allows us to trick these systems.
266   *
267   *  If you encounter this problem save the entry point in a CPU
268   *  dependent variable.
269   */
270
271  _CPU_Thread_dispatch_pointer = thread_dispatch;
272
273  /*
274   * XXX; If there is not an easy way to initialize the FP context
275   *      during Context_Initialize, then it is usually easier to
276   *      save an "uninitialized" FP context here and copy it to
277   *      the task's during Context_Initialize.
278   */
279
280  /* XXX: FP context initialization support */
281
282  _CPU_Table = *cpu_table;
283
284  _CPU_ISR_From_CPU_Init();
285
286  _CPU_Context_From_CPU_Init();
287
288}
289
290/*PAGE
291 *
292 *  _CPU_ISR_install_raw_handler
293 */
294
295void _CPU_ISR_install_raw_handler(
296  unsigned32  vector,
297  proc_ptr    new_handler,
298  proc_ptr   *old_handler
299)
300{
301  _CPU_Fatal_halt( 0xdeaddead );
302}
303
304/*PAGE
305 *
306 *  _CPU_ISR_install_vector
307 *
308 *  This kernel routine installs the RTEMS handler for the
309 *  specified vector.
310 *
311 *  Input parameters:
312 *    vector      - interrupt vector number
313 *    old_handler - former ISR for this vector number
314 *    new_handler - replacement ISR for this vector number
315 *
316 *  Output parameters:  NONE
317 *
318 */
319
320
321void _CPU_ISR_install_vector(
322  unsigned32  vector,
323  proc_ptr    new_handler,
324  proc_ptr   *old_handler
325)
326{
327   *old_handler = _ISR_Vector_table[ vector ];
328
329   /*
330    *  If the interrupt vector table is a table of pointer to isr entry
331    *  points, then we need to install the appropriate RTEMS interrupt
332    *  handler for this vector number.
333    */
334
335   /*
336    *  We put the actual user ISR address in '_ISR_vector_table'.  This will
337    *  be used by the _CPU_ISR_Handler so the user gets control.
338    */
339
340    _ISR_Vector_table[ vector ] = new_handler;
341}
342
343/*PAGE
344 *
345 *  _CPU_Install_interrupt_stack
346 */
347
348void _CPU_Install_interrupt_stack( void )
349{
350}
351
352/*PAGE
353 *
354 *  _CPU_Thread_Idle_body
355 *
356 *  Stop until we get a signal which is the logically the same thing
357 *  entering low-power or sleep mode on a real processor and waiting for
358 *  an interrupt.  This significantly reduces the consumption of host
359 *  CPU cycles which is again similar to low power mode.
360 */
361
362void _CPU_Thread_Idle_body( void )
363{
364  while (1)
365    pause();
366}
367
368/*PAGE
369 *
370 *  _CPU_Context_Initialize
371 */
372
373void _CPU_Context_Initialize(
374  Context_Control  *_the_context,
375  unsigned32       *_stack_base,
376  unsigned32        _size,
377  unsigned32        _new_level,
378  void             *_entry_point,
379  boolean           _is_fp
380)
381{
382  void        *source;
383  unsigned32  *addr;
384  unsigned32   jmp_addr;
385  unsigned32   _stack_low;   /* lowest "stack aligned" address */
386  unsigned32   _stack_high;  /* highest "stack aligned" address */
387  unsigned32   _the_size;
388
389  jmp_addr = (unsigned32) _entry_point;
390
391  /*
392   *  On CPUs with stacks which grow down, we build the stack
393   *  based on the _stack_high address.  On CPUs with stacks which
394   *  grow up, we build the stack based on the _stack_low address. 
395   */
396
397  _stack_low = (unsigned32)(_stack_base) + CPU_STACK_ALIGNMENT - 1;
398  _stack_low &= ~(CPU_STACK_ALIGNMENT - 1);
399
400  _stack_high = (unsigned32)(_stack_base) + _size;
401  _stack_high &= ~(CPU_STACK_ALIGNMENT - 1);
402
403  if (_stack_high > _stack_low)
404    _the_size = _stack_high - _stack_low;
405  else
406    _the_size = _stack_low - _stack_high;
407
408  /*
409   * Slam our jmp_buf template into the context we are creating
410   */
411
412  if ( _new_level == 0 )
413    source = &_CPU_Context_Default_with_ISRs_enabled;
414  else
415    source = &_CPU_Context_Default_with_ISRs_disabled;
416     
417  memcpy(
418    _the_context,
419    source, 
420    sizeof(Context_Control)                /* sizeof(jmp_buf)); */
421  );
422
423  addr = (unsigned32 *)_the_context;
424
425#if defined(hppa1_1)
426  *(addr + RP_OFF) = jmp_addr;
427  *(addr + SP_OFF) = (unsigned32)(_stack_low + CPU_FRAME_SIZE);
428
429  /*
430   * See if we are using shared libraries by checking
431   * bit 30 in 24 off of newp. If bit 30 is set then
432   * we are using shared libraries and the jump address
433   * points to the pointer, so we put that into rp instead.
434   */
435
436  if (jmp_addr & 0x40000000) {
437    jmp_addr &= 0xfffffffc;
438     *(addr + RP_OFF) = *(unsigned32 *)jmp_addr;
439  }
440#elif defined(sparc)
441
442  /*
443   *  See /usr/include/sys/stack.h in Solaris 2.3 for a nice
444   *  diagram of the stack.
445   */
446
447  asm ("ta  0x03");            /* flush registers */
448
449  *(addr + RP_OFF) = jmp_addr + ADDR_ADJ_OFFSET;
450  *(addr + SP_OFF) = (unsigned32)(_stack_high - CPU_FRAME_SIZE);
451  *(addr + FP_OFF) = (unsigned32)(_stack_high);
452
453#elif defined(i386)
454 
455    /*
456     *  This information was gathered by disassembling setjmp().
457     */
458
459    {
460      unsigned32 stack_ptr;
461
462      stack_ptr = _stack_high - CPU_FRAME_SIZE;
463
464      *(addr + EBX_OFF) = 0xFEEDFEED;
465      *(addr + ESI_OFF) = 0xDEADDEAD;
466      *(addr + EDI_OFF) = 0xDEAFDEAF;
467      *(addr + EBP_OFF) = stack_ptr;
468      *(addr + ESP_OFF) = stack_ptr;
469      *(addr + RET_OFF) = jmp_addr;
470 
471      addr = (unsigned32 *) stack_ptr;
472 
473      addr[ 0 ] = jmp_addr;
474      addr[ 1 ] = (unsigned32) stack_ptr;
475      addr[ 2 ] = (unsigned32) stack_ptr;
476    }
477
478#else
479#error "UNKNOWN CPU!!!"
480#endif
481
482}
483
484/*PAGE
485 *
486 *  _CPU_Context_restore
487 */
488
489void _CPU_Context_restore(
490  Context_Control  *next
491)
492{
493  Context_Control_overlay *nextp = (Context_Control_overlay *)next;
494
495  sigprocmask( SIG_SETMASK, &nextp->isr_level, 0 );
496  longjmp( nextp->regs, 0 );
497}
498
499/*PAGE
500 *
501 *  _CPU_Context_switch
502 */
503
504void _CPU_Context_switch(
505  Context_Control  *current,
506  Context_Control  *next
507)
508{
509  Context_Control_overlay *currentp = (Context_Control_overlay *)current;
510  Context_Control_overlay *nextp = (Context_Control_overlay *)next;
511
512  int status;
513
514  /*
515   *  Switch levels in one operation
516   */
517
518  status = sigprocmask( SIG_SETMASK, &nextp->isr_level, &currentp->isr_level );
519  if ( status )
520    _Internal_error_Occurred(
521      INTERNAL_ERROR_CORE,
522      TRUE,
523      status
524    );
525
526  if (setjmp(currentp->regs) == 0) {    /* Save the current context */
527     longjmp(nextp->regs, 0);           /* Switch to the new context */
528     if ( status )
529       _Internal_error_Occurred(
530         INTERNAL_ERROR_CORE,
531         TRUE,
532         status
533       );
534  }
535
536}
537 
538/*PAGE
539 *
540 *  _CPU_Save_float_context
541 */
542
543void _CPU_Save_float_context(
544  Context_Control_fp *fp_context
545)
546{
547}
548
549/*PAGE
550 *
551 *  _CPU_Restore_float_context
552 */
553
554void _CPU_Restore_float_context(
555  Context_Control_fp *fp_context
556)
557{
558}
559
560/*PAGE
561 *
562 *  _CPU_ISR_Disable_support
563 */
564
565unsigned32 _CPU_ISR_Disable_support(void)
566{
567  int status;
568  sigset_t  old_mask;
569
570  status = sigprocmask(SIG_BLOCK, &_CPU_Signal_mask, &old_mask);
571  if ( status )
572    _Internal_error_Occurred(
573      INTERNAL_ERROR_CORE,
574      TRUE,
575      status
576    );
577
578  if (memcmp((void *)&posix_empty_mask, (void *)&old_mask, sizeof(sigset_t)))
579    return 1;
580
581  return 0;
582}
583
584/*PAGE
585 *
586 *  _CPU_ISR_Enable
587 */
588
589void _CPU_ISR_Enable(
590  unsigned32 level
591)
592{
593  int status;
594
595  if (level == 0)
596    status = sigprocmask(SIG_UNBLOCK, &_CPU_Signal_mask, 0);
597  else
598    status = sigprocmask(SIG_BLOCK, &_CPU_Signal_mask, 0);
599
600  if ( status )
601    _Internal_error_Occurred(
602      INTERNAL_ERROR_CORE,
603      TRUE,
604      status
605    );
606}
607
608/*PAGE
609 *
610 *  _CPU_ISR_Handler
611 *
612 *  External interrupt handler.
613 *  This is installed as a UNIX signal handler.
614 *  It vectors out to specific user interrupt handlers.
615 */
616
617void _CPU_ISR_Handler(int vector)
618{
619  extern void        _Thread_Dispatch(void);
620  extern unsigned32  _Thread_Dispatch_disable_level;
621  extern boolean     _Context_Switch_necessary;
622
623  if (_ISR_Nest_level++ == 0) {
624      /* switch to interrupt stack */
625  }
626
627  _Thread_Dispatch_disable_level++;
628
629  if (_ISR_Vector_table[vector]) {
630     _ISR_Vector_table[vector](vector);
631  } else {
632     _CPU_Stray_signal(vector);
633  }
634
635  if (_ISR_Nest_level-- == 0) {
636      /* switch back to original stack */
637  }
638
639  _Thread_Dispatch_disable_level--;
640
641  if (_Thread_Dispatch_disable_level == 0 &&
642      (_Context_Switch_necessary || _ISR_Signals_to_thread_executing)) {
643      _ISR_Signals_to_thread_executing = FALSE;
644      _CPU_ISR_Enable(0);
645      _Thread_Dispatch();
646  }
647}
648
649/*PAGE
650 *
651 *  _CPU_Stray_signal
652 */
653
654void _CPU_Stray_signal(int sig_num)
655{
656  char buffer[ 4 ];
657 
658  /*
659   * print "stray" msg about ones which that might mean something
660   * Avoid using the stdio section of the library.
661   * The following is generally safe.
662   */
663 
664  switch (sig_num)
665  {
666      case SIGCLD:
667          break;
668 
669      default:
670      {
671        /*
672         *  We avoid using the stdio section of the library.
673         *  The following is generally safe
674         */
675 
676        int digit;
677        int number = sig_num;
678        int len = 0;
679
680        digit = number / 100;
681        number %= 100;
682        if (digit) buffer[len++] = '0' + digit;
683
684        digit = number / 10;
685        number %= 10;
686        if (digit || len) buffer[len++] = '0' + digit;
687
688        digit = number;
689        buffer[len++] = '0' + digit;
690 
691        buffer[ len++ ] = '\n';
692 
693        write( 2, "Stray signal ", 13 );
694        write( 2, buffer, len );
695
696      }
697  }
698 
699  /*
700   * If it was a "fatal" signal, then exit here
701   * If app code has installed a hander for one of these, then
702   * we won't call _CPU_Stray_signal, so this is ok.
703   */
704 
705  switch (sig_num) {
706      case SIGINT:
707      case SIGHUP:
708      case SIGQUIT:
709      case SIGILL:
710#ifdef SIGEMT
711      case SIGEMT:
712#endif
713      case SIGKILL:
714      case SIGBUS:
715      case SIGSEGV:
716      case SIGTERM:
717        _CPU_Fatal_error(0x100 + sig_num);
718  }
719}
720
721/*PAGE
722 *
723 *  _CPU_Fatal_error
724 */
725
726void _CPU_Fatal_error(unsigned32 error)
727{
728  setitimer(ITIMER_REAL, 0, 0);
729
730  if ( error ) {
731#ifdef RTEMS_DEBUG
732    abort();
733#endif
734    if (getenv("RTEMS_DEBUG"))
735      abort();
736  }
737
738  _exit(error);
739}
740
741/*
742 *  Special Purpose Routines to hide the use of UNIX system calls.
743 */
744
745int _CPU_Get_clock_vector( void )
746{
747  return SIGALRM;
748}
749
750void _CPU_Start_clock( 
751  int microseconds
752)
753{
754  struct itimerval  new;
755
756  new.it_value.tv_sec = 0;
757  new.it_value.tv_usec = microseconds;
758  new.it_interval.tv_sec = 0;
759  new.it_interval.tv_usec = microseconds;
760
761  setitimer(ITIMER_REAL, &new, 0);
762}
763
764void _CPU_Stop_clock( void )
765{
766  struct itimerval  new;
767  struct sigaction  act;
768 
769  /*
770   * Set the SIGALRM signal to ignore any last
771   * signals that might come in while we are
772   * disarming the timer and removing the interrupt
773   * vector.
774   */
775 
776  (void) memset(&act, 0, sizeof(act));
777  act.sa_handler = SIG_IGN;
778 
779  sigaction(SIGALRM, &act, 0);
780 
781  (void) memset(&new, 0, sizeof(new));
782  setitimer(ITIMER_REAL, &new, 0);
783}
784
785int  _CPU_SHM_Semid;
786extern       void fix_syscall_errno( void );
787
788void _CPU_SHM_Init( 
789  unsigned32   maximum_nodes,
790  boolean      is_master_node,
791  void       **shm_address,
792  unsigned32  *shm_length
793)
794{
795  int          i;
796  int          shmid;
797  char        *shm_addr;
798  key_t        shm_key;
799  key_t        sem_key;
800  int          status;
801  int          shm_size;
802 
803  if (getenv("RTEMS_SHM_KEY"))
804    shm_key = strtol(getenv("RTEMS_SHM_KEY"), 0, 0);
805  else
806#ifdef RTEMS_SHM_KEY
807    shm_key = RTEMS_SHM_KEY;
808#else
809    shm_key = 0xa000;
810#endif
811 
812    if (getenv("RTEMS_SHM_SIZE"))
813      shm_size = strtol(getenv("RTEMS_SHM_SIZE"), 0, 0);
814    else
815#ifdef RTEMS_SHM_SIZE
816      shm_size = RTEMS_SHM_SIZE;
817#else
818      shm_size = 64 * 1024;
819#endif
820 
821    if (getenv("RTEMS_SHM_SEMAPHORE_KEY"))
822      sem_key = strtol(getenv("RTEMS_SHM_SEMAPHORE_KEY"), 0, 0);
823    else
824#ifdef RTEMS_SHM_SEMAPHORE_KEY
825      sem_key = RTEMS_SHM_SEMAPHORE_KEY;
826#else
827      sem_key = 0xa001;
828#endif
829 
830    shmid = shmget(shm_key, shm_size, IPC_CREAT | 0660);
831    if ( shmid == -1 ) {
832      fix_syscall_errno(); /* in case of newlib */
833      perror( "shmget" );
834      _CPU_Fatal_halt( 0xdead0001 );
835    }
836 
837    shm_addr = shmat(shmid, (char *)0, SHM_RND);
838    if ( shm_addr == (void *)-1 ) {
839      fix_syscall_errno(); /* in case of newlib */
840      perror( "shmat" );
841      _CPU_Fatal_halt( 0xdead0002 );
842    }
843 
844    _CPU_SHM_Semid = semget(sem_key, maximum_nodes + 1, IPC_CREAT | 0660);
845    if ( _CPU_SHM_Semid == -1 ) {
846      fix_syscall_errno(); /* in case of newlib */
847      perror( "semget" );
848      _CPU_Fatal_halt( 0xdead0003 );
849    }
850 
851    if ( is_master_node ) {
852      for ( i=0 ; i <= maximum_nodes ; i++ ) {
853#if defined(solaris2)
854        union semun {
855          int val;
856          struct semid_ds *buf;
857          ushort *array;
858        } help;
859 
860        help.val = 1;
861        status = semctl( _CPU_SHM_Semid, i, SETVAL, help );
862#endif
863#if defined(hpux)
864        status = semctl( _CPU_SHM_Semid, i, SETVAL, 1 );
865#endif
866 
867        fix_syscall_errno(); /* in case of newlib */
868        if ( status == -1 ) {
869          _CPU_Fatal_halt( 0xdead0004 );
870        }
871      }
872    }
873 
874  *shm_address = shm_addr;
875  *shm_length = shm_size;
876
877}
878
879int _CPU_Get_pid( void )
880{
881  return getpid();
882}
883
884/*
885 * Define this to use signals for MPCI shared memory driver.
886 * If undefined, the shared memory driver will poll from the
887 * clock interrupt.
888 * Ref: ../shmsupp/getcfg.c
889 *
890 * BEWARE:: many UN*X kernels and debuggers become severely confused when
891 *          debugging programs which use signals.  The problem is *much*
892 *          worse when using multiple signals, since ptrace(2) tends to
893 *          drop all signals except 1 in the case of multiples.
894 *          On hpux9, this problem was so bad, we couldn't use interrupts
895 *          with the shared memory driver if we ever hoped to debug
896 *          RTEMS programs.
897 *          Maybe systems that use /proc don't have this problem...
898 */
899 
900 
901int _CPU_SHM_Get_vector( void )
902{
903#ifdef CPU_USE_SHM_INTERRUPTS
904  return SIGUSR1;
905#else
906  return 0;
907#endif
908}
909
910void _CPU_SHM_Send_interrupt(
911  int pid,
912  int vector
913)
914{
915  kill((pid_t) pid, vector);
916}
917
918void _CPU_SHM_Lock( 
919  int semaphore
920)
921{
922  struct sembuf      sb;
923  int                status;
924 
925  sb.sem_num = semaphore;
926  sb.sem_op  = -1;
927  sb.sem_flg = 0;
928 
929  while (1) {
930    status = semop(_CPU_SHM_Semid, &sb, 1);
931    if ( status >= 0 )
932      break;
933    if ( status == -1 ) {
934       fix_syscall_errno();    /* in case of newlib */
935        if (errno == EINTR)
936            continue;
937        perror("shm lock");
938        _CPU_Fatal_halt( 0xdead0005 );
939    }
940  }
941
942}
943
944void _CPU_SHM_Unlock(
945  int semaphore
946)
947{
948  struct sembuf  sb;
949  int            status;
950 
951  sb.sem_num = semaphore;
952  sb.sem_op  = 1;
953  sb.sem_flg = 0;
954 
955  while (1) {
956    status = semop(_CPU_SHM_Semid, &sb, 1);
957    if ( status >= 0 )
958      break;
959 
960    if ( status == -1 ) {
961      fix_syscall_errno();    /* in case of newlib */
962      if (errno == EINTR)
963          continue;
964      perror("shm unlock");
965      _CPU_Fatal_halt( 0xdead0006 );
966    }
967  }
968
969}
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