[ac7d5ef0] | 1 | /* |
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[3652ad35] | 2 | * UNIX Simulator Dependent Source |
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[ac7d5ef0] | 3 | * |
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[e71ce071] | 4 | * COPYRIGHT (c) 1994,95 by Division Incorporated |
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[ac7d5ef0] | 5 | * |
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[98e4ebf5] | 6 | * The license and distribution terms for this file may be |
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| 7 | * found in the file LICENSE in this distribution or at |
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[0b5e8c7] | 8 | * http://www.rtems.com/license/LICENSE. |
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[ac7d5ef0] | 9 | * |
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| 10 | * $Id$ |
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| 11 | */ |
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| 12 | |
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| 13 | #include <rtems/system.h> |
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[5e9b32b] | 14 | #include <rtems/score/isr.h> |
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| 15 | #include <rtems/score/interr.h> |
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[ac7d5ef0] | 16 | |
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[f2545552] | 17 | #if defined(__linux__) |
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[ddf142d] | 18 | #define _XOPEN_SOURCE |
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[37f4c2d] | 19 | #define MALLOC_0_RETURNS_NULL |
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| 20 | #endif |
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[d1193c7] | 21 | |
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[1c964ffa] | 22 | #include <sys/types.h> |
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| 23 | #include <sys/times.h> |
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[ac7d5ef0] | 24 | #include <stdio.h> |
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| 25 | #include <stdlib.h> |
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[37f4c2d] | 26 | #include <setjmp.h> |
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[ac7d5ef0] | 27 | #include <signal.h> |
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| 28 | #include <time.h> |
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[10aed1e3] | 29 | #include <sys/time.h> |
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[37f4c2d] | 30 | #include <errno.h> |
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| 31 | #include <unistd.h> |
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[c094542] | 32 | #if defined(RTEMS_MULTIPROCESSING) |
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[37f4c2d] | 33 | #include <sys/ipc.h> |
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| 34 | #include <sys/shm.h> |
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| 35 | #include <sys/sem.h> |
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[c094542] | 36 | #endif |
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[cc4c1fe4] | 37 | #include <string.h> /* memset */ |
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[ac7d5ef0] | 38 | |
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[637df35] | 39 | #ifndef SA_RESTART |
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| 40 | #define SA_RESTART 0 |
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| 41 | #endif |
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[ac7d5ef0] | 42 | |
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[37f4c2d] | 43 | typedef struct { |
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| 44 | jmp_buf regs; |
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[df49c60] | 45 | int isr_level; |
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[37f4c2d] | 46 | } Context_Control_overlay; |
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| 47 | |
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[637df35] | 48 | void _CPU_Signal_initialize(void); |
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| 49 | void _CPU_Stray_signal(int); |
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| 50 | void _CPU_ISR_Handler(int); |
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[ac7d5ef0] | 51 | |
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[d83c39dc] | 52 | static sigset_t _CPU_Signal_mask; |
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[ce5b291f] | 53 | static Context_Control_overlay _CPU_Context_Default_with_ISRs_enabled; |
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| 54 | static Context_Control_overlay _CPU_Context_Default_with_ISRs_disabled; |
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[ac7d5ef0] | 55 | |
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[0a6fb22] | 56 | /* |
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| 57 | * Sync IO support, an entry for each fd that can be set |
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| 58 | */ |
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| 59 | |
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| 60 | void _CPU_Sync_io_Init(); |
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| 61 | |
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| 62 | static rtems_sync_io_handler _CPU_Sync_io_handlers[FD_SETSIZE]; |
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| 63 | static int sync_io_nfds; |
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| 64 | static fd_set sync_io_readfds; |
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| 65 | static fd_set sync_io_writefds; |
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| 66 | static fd_set sync_io_exceptfds; |
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| 67 | |
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[ac7d5ef0] | 68 | /* |
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| 69 | * Which cpu are we? Used by libcpu and libbsp. |
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| 70 | */ |
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| 71 | |
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| 72 | int cpu_number; |
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| 73 | |
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[637df35] | 74 | /*PAGE |
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| 75 | * |
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[c54152a2] | 76 | * _CPU_Initialize_vectors() |
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| 77 | * |
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| 78 | * Support routine to initialize the RTEMS vector table after it is allocated. |
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| 79 | * |
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| 80 | * UNIX Specific Information: |
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| 81 | * |
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| 82 | * Complete initialization since the table is now allocated. |
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[637df35] | 83 | */ |
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[c54152a2] | 84 | |
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[e7e016f] | 85 | sigset_t posix_empty_mask; |
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| 86 | |
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[c54152a2] | 87 | void _CPU_Initialize_vectors(void) |
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[637df35] | 88 | { |
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[c346f33d] | 89 | uint32_t i; |
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[637df35] | 90 | proc_ptr old_handler; |
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| 91 | |
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[e7e016f] | 92 | /* |
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| 93 | * Generate an empty mask to be used by disable_support |
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| 94 | */ |
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[637df35] | 95 | |
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[e7e016f] | 96 | sigemptyset(&posix_empty_mask); |
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[c64e4ed4] | 97 | |
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[637df35] | 98 | /* |
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| 99 | * Block all the signals except SIGTRAP for the debugger |
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[d196e48] | 100 | * and fatal error signals. |
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[637df35] | 101 | */ |
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| 102 | |
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| 103 | (void) sigfillset(&_CPU_Signal_mask); |
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| 104 | (void) sigdelset(&_CPU_Signal_mask, SIGTRAP); |
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| 105 | (void) sigdelset(&_CPU_Signal_mask, SIGABRT); |
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[df49c60] | 106 | #if !defined(__CYGWIN__) |
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[637df35] | 107 | (void) sigdelset(&_CPU_Signal_mask, SIGIOT); |
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[df49c60] | 108 | #endif |
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[637df35] | 109 | (void) sigdelset(&_CPU_Signal_mask, SIGCONT); |
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[d196e48] | 110 | (void) sigdelset(&_CPU_Signal_mask, SIGSEGV); |
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| 111 | (void) sigdelset(&_CPU_Signal_mask, SIGBUS); |
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| 112 | (void) sigdelset(&_CPU_Signal_mask, SIGFPE); |
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[637df35] | 113 | |
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[e7e016f] | 114 | _CPU_ISR_Enable(1); |
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[637df35] | 115 | |
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| 116 | /* |
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| 117 | * Set the handler for all signals to be signal_handler |
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| 118 | * which will then vector out to the correct handler |
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| 119 | * for whichever signal actually happened. Initially |
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| 120 | * set the vectors to the stray signal handler. |
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| 121 | */ |
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| 122 | |
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| 123 | for (i = 0; i < CPU_INTERRUPT_NUMBER_OF_VECTORS; i++) |
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| 124 | (void)_CPU_ISR_install_vector(i, _CPU_Stray_signal, &old_handler); |
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| 125 | |
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| 126 | _CPU_Signal_initialize(); |
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| 127 | } |
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| 128 | |
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| 129 | void _CPU_Signal_initialize( void ) |
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| 130 | { |
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| 131 | struct sigaction act; |
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| 132 | sigset_t mask; |
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[d1193c7] | 133 | |
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[637df35] | 134 | /* mark them all active except for TraceTrap and Abort */ |
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[d1193c7] | 135 | |
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[d196e48] | 136 | mask = _CPU_Signal_mask; |
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[637df35] | 137 | sigprocmask(SIG_UNBLOCK, &mask, 0); |
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[d1193c7] | 138 | |
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[637df35] | 139 | act.sa_handler = _CPU_ISR_Handler; |
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| 140 | act.sa_mask = mask; |
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| 141 | act.sa_flags = SA_RESTART; |
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[d1193c7] | 142 | |
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[637df35] | 143 | sigaction(SIGHUP, &act, 0); |
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| 144 | sigaction(SIGINT, &act, 0); |
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| 145 | sigaction(SIGQUIT, &act, 0); |
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| 146 | sigaction(SIGILL, &act, 0); |
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[10aed1e3] | 147 | #ifdef SIGEMT |
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[637df35] | 148 | sigaction(SIGEMT, &act, 0); |
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[10aed1e3] | 149 | #endif |
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[637df35] | 150 | sigaction(SIGFPE, &act, 0); |
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| 151 | sigaction(SIGKILL, &act, 0); |
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| 152 | sigaction(SIGBUS, &act, 0); |
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| 153 | sigaction(SIGSEGV, &act, 0); |
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[10aed1e3] | 154 | #ifdef SIGSYS |
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[637df35] | 155 | sigaction(SIGSYS, &act, 0); |
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[10aed1e3] | 156 | #endif |
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[637df35] | 157 | sigaction(SIGPIPE, &act, 0); |
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| 158 | sigaction(SIGALRM, &act, 0); |
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| 159 | sigaction(SIGTERM, &act, 0); |
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| 160 | sigaction(SIGUSR1, &act, 0); |
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| 161 | sigaction(SIGUSR2, &act, 0); |
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| 162 | sigaction(SIGCHLD, &act, 0); |
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[9a6994b4] | 163 | #ifdef SIGCLD |
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[637df35] | 164 | sigaction(SIGCLD, &act, 0); |
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[9a6994b4] | 165 | #endif |
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| 166 | #ifdef SIGPWR |
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[637df35] | 167 | sigaction(SIGPWR, &act, 0); |
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[9a6994b4] | 168 | #endif |
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[637df35] | 169 | sigaction(SIGVTALRM, &act, 0); |
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| 170 | sigaction(SIGPROF, &act, 0); |
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| 171 | sigaction(SIGIO, &act, 0); |
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| 172 | sigaction(SIGWINCH, &act, 0); |
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| 173 | sigaction(SIGSTOP, &act, 0); |
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| 174 | sigaction(SIGTTIN, &act, 0); |
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| 175 | sigaction(SIGTTOU, &act, 0); |
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| 176 | sigaction(SIGURG, &act, 0); |
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[e7e016f] | 177 | #ifdef SIGLOST |
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[637df35] | 178 | sigaction(SIGLOST, &act, 0); |
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| 179 | #endif |
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| 180 | } |
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| 181 | |
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| 182 | /*PAGE |
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| 183 | * |
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| 184 | * _CPU_Context_From_CPU_Init |
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| 185 | */ |
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| 186 | |
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| 187 | void _CPU_Context_From_CPU_Init() |
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| 188 | { |
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| 189 | |
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[3ec7bfc] | 190 | #if defined(__hppa__) && defined(RTEMS_UNIXLIB_SETJMP) |
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[637df35] | 191 | /* |
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| 192 | * HACK - set the _SYSTEM_ID to 0x20c so that setjmp/longjmp |
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| 193 | * will handle the full 32 floating point registers. |
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| 194 | */ |
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| 195 | |
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| 196 | { |
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[c346f33d] | 197 | extern uint32_t _SYSTEM_ID; |
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[637df35] | 198 | |
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| 199 | _SYSTEM_ID = 0x20c; |
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| 200 | } |
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| 201 | #endif |
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| 202 | |
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| 203 | /* |
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| 204 | * get default values to use in _CPU_Context_Initialize() |
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| 205 | */ |
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| 206 | |
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[ce5b291f] | 207 | if ( sizeof(Context_Control_overlay) > sizeof(Context_Control) ) |
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| 208 | _CPU_Fatal_halt( 0xdeadf00d ); |
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[df49c60] | 209 | |
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[cc4c1fe4] | 210 | (void) memset( |
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| 211 | &_CPU_Context_Default_with_ISRs_enabled, |
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| 212 | 0, |
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[ce5b291f] | 213 | sizeof(Context_Control_overlay) |
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[cc4c1fe4] | 214 | ); |
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| 215 | (void) memset( |
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| 216 | &_CPU_Context_Default_with_ISRs_disabled, |
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| 217 | 0, |
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[ce5b291f] | 218 | sizeof(Context_Control_overlay) |
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[cc4c1fe4] | 219 | ); |
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| 220 | |
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[637df35] | 221 | _CPU_ISR_Set_level( 0 ); |
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[3652ad35] | 222 | _CPU_Context_switch( |
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[d196e48] | 223 | (Context_Control *) &_CPU_Context_Default_with_ISRs_enabled, |
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| 224 | (Context_Control *) &_CPU_Context_Default_with_ISRs_enabled |
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[637df35] | 225 | ); |
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[d1193c7] | 226 | |
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[637df35] | 227 | _CPU_ISR_Set_level( 1 ); |
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[3652ad35] | 228 | _CPU_Context_switch( |
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[d196e48] | 229 | (Context_Control *) &_CPU_Context_Default_with_ISRs_disabled, |
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| 230 | (Context_Control *) &_CPU_Context_Default_with_ISRs_disabled |
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[637df35] | 231 | ); |
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| 232 | } |
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| 233 | |
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[0a6fb22] | 234 | /*PAGE |
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| 235 | * |
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| 236 | * _CPU_Sync_io_Init |
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| 237 | */ |
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| 238 | |
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| 239 | void _CPU_Sync_io_Init() |
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| 240 | { |
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| 241 | int fd; |
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| 242 | |
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| 243 | for (fd = 0; fd < FD_SETSIZE; fd++) |
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| 244 | _CPU_Sync_io_handlers[fd] = NULL; |
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| 245 | |
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| 246 | sync_io_nfds = 0; |
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| 247 | FD_ZERO(&sync_io_readfds); |
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| 248 | FD_ZERO(&sync_io_writefds); |
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| 249 | FD_ZERO(&sync_io_exceptfds); |
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| 250 | } |
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| 251 | |
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[3a4ae6c] | 252 | /*PAGE |
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| 253 | * |
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| 254 | * _CPU_ISR_Get_level |
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| 255 | */ |
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| 256 | |
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[c346f33d] | 257 | uint32_t _CPU_ISR_Get_level( void ) |
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[3a4ae6c] | 258 | { |
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[d196e48] | 259 | sigset_t old_mask; |
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[d1193c7] | 260 | |
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[5e34bf4] | 261 | sigemptyset( &old_mask ); |
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[d196e48] | 262 | sigprocmask(SIG_BLOCK, 0, &old_mask); |
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[d1193c7] | 263 | |
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[d196e48] | 264 | if (memcmp((void *)&posix_empty_mask, (void *)&old_mask, sizeof(sigset_t))) |
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| 265 | return 1; |
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[d1193c7] | 266 | |
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[d196e48] | 267 | return 0; |
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[3a4ae6c] | 268 | } |
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| 269 | |
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[ac7d5ef0] | 270 | /* _CPU_Initialize |
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| 271 | * |
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| 272 | * This routine performs processor dependent initialization. |
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| 273 | * |
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| 274 | * INPUT PARAMETERS: |
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| 275 | * cpu_table - CPU table to initialize |
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| 276 | * thread_dispatch - address of disptaching routine |
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| 277 | */ |
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| 278 | |
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| 279 | |
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| 280 | void _CPU_Initialize( |
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| 281 | rtems_cpu_table *cpu_table, |
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[3a4ae6c] | 282 | void (*thread_dispatch) /* ignored on this CPU */ |
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[ac7d5ef0] | 283 | ) |
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| 284 | { |
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[df49c60] | 285 | /* |
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| 286 | * If something happened where the public Context_Control is not |
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| 287 | * at least as large as the private Context_Control_overlay, then |
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| 288 | * we are in trouble. |
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| 289 | */ |
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| 290 | |
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| 291 | if ( sizeof(Context_Control_overlay) > sizeof(Context_Control) ) |
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| 292 | _CPU_Fatal_error(0x100 + 1); |
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| 293 | |
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[ac7d5ef0] | 294 | /* |
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| 295 | * The thread_dispatch argument is the address of the entry point |
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| 296 | * for the routine called at the end of an ISR once it has been |
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| 297 | * decided a context switch is necessary. On some compilation |
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| 298 | * systems it is difficult to call a high-level language routine |
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| 299 | * from assembly. This allows us to trick these systems. |
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| 300 | * |
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| 301 | * If you encounter this problem save the entry point in a CPU |
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| 302 | * dependent variable. |
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| 303 | */ |
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| 304 | |
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| 305 | _CPU_Thread_dispatch_pointer = thread_dispatch; |
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| 306 | |
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| 307 | /* |
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| 308 | * XXX; If there is not an easy way to initialize the FP context |
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| 309 | * during Context_Initialize, then it is usually easier to |
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| 310 | * save an "uninitialized" FP context here and copy it to |
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| 311 | * the task's during Context_Initialize. |
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| 312 | */ |
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| 313 | |
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| 314 | /* XXX: FP context initialization support */ |
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| 315 | |
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| 316 | _CPU_Table = *cpu_table; |
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| 317 | |
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[0a6fb22] | 318 | _CPU_Sync_io_Init(); |
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| 319 | |
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[637df35] | 320 | _CPU_Context_From_CPU_Init(); |
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[ac7d5ef0] | 321 | |
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[637df35] | 322 | } |
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[ac7d5ef0] | 323 | |
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[637df35] | 324 | /*PAGE |
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| 325 | * |
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| 326 | * _CPU_ISR_install_raw_handler |
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| 327 | */ |
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[ac7d5ef0] | 328 | |
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[637df35] | 329 | void _CPU_ISR_install_raw_handler( |
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[c346f33d] | 330 | uint32_t vector, |
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[637df35] | 331 | proc_ptr new_handler, |
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| 332 | proc_ptr *old_handler |
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| 333 | ) |
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| 334 | { |
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| 335 | _CPU_Fatal_halt( 0xdeaddead ); |
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[ac7d5ef0] | 336 | } |
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| 337 | |
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[637df35] | 338 | /*PAGE |
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| 339 | * |
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| 340 | * _CPU_ISR_install_vector |
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[ac7d5ef0] | 341 | * |
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| 342 | * This kernel routine installs the RTEMS handler for the |
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| 343 | * specified vector. |
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| 344 | * |
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| 345 | * Input parameters: |
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| 346 | * vector - interrupt vector number |
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| 347 | * old_handler - former ISR for this vector number |
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| 348 | * new_handler - replacement ISR for this vector number |
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| 349 | * |
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| 350 | * Output parameters: NONE |
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| 351 | * |
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| 352 | */ |
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| 353 | |
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| 354 | |
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| 355 | void _CPU_ISR_install_vector( |
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[c346f33d] | 356 | uint32_t vector, |
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[ac7d5ef0] | 357 | proc_ptr new_handler, |
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| 358 | proc_ptr *old_handler |
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| 359 | ) |
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| 360 | { |
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| 361 | *old_handler = _ISR_Vector_table[ vector ]; |
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| 362 | |
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| 363 | /* |
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| 364 | * If the interrupt vector table is a table of pointer to isr entry |
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| 365 | * points, then we need to install the appropriate RTEMS interrupt |
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| 366 | * handler for this vector number. |
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| 367 | */ |
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| 368 | |
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| 369 | /* |
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| 370 | * We put the actual user ISR address in '_ISR_vector_table'. This will |
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[637df35] | 371 | * be used by the _CPU_ISR_Handler so the user gets control. |
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[ac7d5ef0] | 372 | */ |
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| 373 | |
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| 374 | _ISR_Vector_table[ vector ] = new_handler; |
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| 375 | } |
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| 376 | |
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| 377 | /*PAGE |
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| 378 | * |
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| 379 | * _CPU_Install_interrupt_stack |
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| 380 | */ |
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| 381 | |
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| 382 | void _CPU_Install_interrupt_stack( void ) |
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| 383 | { |
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| 384 | } |
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| 385 | |
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| 386 | /*PAGE |
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| 387 | * |
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[75f09e5] | 388 | * _CPU_Thread_Idle_body |
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[ac7d5ef0] | 389 | * |
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[d1193c7] | 390 | * Stop until we get a signal which is the logically the same thing |
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[9700578] | 391 | * entering low-power or sleep mode on a real processor and waiting for |
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| 392 | * an interrupt. This significantly reduces the consumption of host |
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| 393 | * CPU cycles which is again similar to low power mode. |
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[ac7d5ef0] | 394 | */ |
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| 395 | |
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[75f09e5] | 396 | void _CPU_Thread_Idle_body( void ) |
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[ac7d5ef0] | 397 | { |
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[0a6fb22] | 398 | #if CPU_SYNC_IO |
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| 399 | extern void _Thread_Dispatch(void); |
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| 400 | int fd; |
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| 401 | #endif |
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| 402 | |
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[d196e48] | 403 | while (1) { |
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| 404 | #ifdef RTEMS_DEBUG |
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| 405 | /* interrupts had better be enabled at this point! */ |
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| 406 | if (_CPU_ISR_Get_level() != 0) |
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| 407 | abort(); |
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| 408 | #endif |
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[0a6fb22] | 409 | |
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| 410 | /* |
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| 411 | * Block on a select statement, the CPU interface added allow the |
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| 412 | * user to add new descriptors which are to be blocked on |
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| 413 | */ |
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| 414 | |
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| 415 | #if CPU_SYNC_IO |
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| 416 | if (sync_io_nfds) { |
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| 417 | int result; |
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[b4e3b2b] | 418 | fd_set readfds, writefds, exceptfds; |
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[0a6fb22] | 419 | |
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[b4e3b2b] | 420 | readfds = sync_io_readfds; |
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| 421 | writefds = sync_io_writefds; |
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| 422 | exceptfds = sync_io_exceptfds; |
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[0a6fb22] | 423 | result = select(sync_io_nfds, |
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[b4e3b2b] | 424 | &readfds, |
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| 425 | &writefds, |
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| 426 | &exceptfds, |
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[0a6fb22] | 427 | NULL); |
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| 428 | |
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[b4e3b2b] | 429 | if (result < 0) { |
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| 430 | if (errno != EINTR) |
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| 431 | _CPU_Fatal_error(0x200); /* FIXME : what number should go here !! */ |
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| 432 | _Thread_Dispatch(); |
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| 433 | continue; |
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| 434 | } |
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[0a6fb22] | 435 | |
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| 436 | for (fd = 0; fd < sync_io_nfds; fd++) { |
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[b4e3b2b] | 437 | boolean read = FD_ISSET(fd, &readfds); |
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| 438 | boolean write = FD_ISSET(fd, &writefds); |
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| 439 | boolean except = FD_ISSET(fd, &exceptfds); |
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[0a6fb22] | 440 | |
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| 441 | if (_CPU_Sync_io_handlers[fd] && (read || write || except)) |
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| 442 | _CPU_Sync_io_handlers[fd](fd, read, write, except); |
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| 443 | } |
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[b4e3b2b] | 444 | |
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| 445 | _Thread_Dispatch(); |
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[0a6fb22] | 446 | } else |
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| 447 | pause(); |
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| 448 | #else |
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[637df35] | 449 | pause(); |
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[0a6fb22] | 450 | #endif |
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| 451 | |
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[d196e48] | 452 | } |
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| 453 | |
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[ac7d5ef0] | 454 | } |
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| 455 | |
---|
[637df35] | 456 | /*PAGE |
---|
[d1193c7] | 457 | * |
---|
[637df35] | 458 | * _CPU_Context_Initialize |
---|
| 459 | */ |
---|
| 460 | |
---|
[ac7d5ef0] | 461 | void _CPU_Context_Initialize( |
---|
| 462 | Context_Control *_the_context, |
---|
[c346f33d] | 463 | uint32_t *_stack_base, |
---|
| 464 | uint32_t _size, |
---|
| 465 | uint32_t _new_level, |
---|
[9700578] | 466 | void *_entry_point, |
---|
| 467 | boolean _is_fp |
---|
[ac7d5ef0] | 468 | ) |
---|
| 469 | { |
---|
[c346f33d] | 470 | uint32_t *addr; |
---|
| 471 | uint32_t jmp_addr; |
---|
| 472 | uint32_t _stack_low; /* lowest "stack aligned" address */ |
---|
| 473 | uint32_t _stack_high; /* highest "stack aligned" address */ |
---|
| 474 | uint32_t _the_size; |
---|
[ac7d5ef0] | 475 | |
---|
[c346f33d] | 476 | jmp_addr = (uint32_t ) _entry_point; |
---|
[ac7d5ef0] | 477 | |
---|
[637df35] | 478 | /* |
---|
| 479 | * On CPUs with stacks which grow down, we build the stack |
---|
[d1193c7] | 480 | * based on the _stack_high address. On CPUs with stacks which |
---|
| 481 | * grow up, we build the stack based on the _stack_low address. |
---|
[637df35] | 482 | */ |
---|
[88d594a] | 483 | |
---|
[c346f33d] | 484 | _stack_low = (uint32_t )(_stack_base) + CPU_STACK_ALIGNMENT - 1; |
---|
[637df35] | 485 | _stack_low &= ~(CPU_STACK_ALIGNMENT - 1); |
---|
[88d594a] | 486 | |
---|
[c346f33d] | 487 | _stack_high = (uint32_t )(_stack_base) + _size; |
---|
[637df35] | 488 | _stack_high &= ~(CPU_STACK_ALIGNMENT - 1); |
---|
[ac7d5ef0] | 489 | |
---|
[cc4c1fe4] | 490 | if (_stack_high > _stack_low) |
---|
| 491 | _the_size = _stack_high - _stack_low; |
---|
| 492 | else |
---|
| 493 | _the_size = _stack_low - _stack_high; |
---|
[ac7d5ef0] | 494 | |
---|
[637df35] | 495 | /* |
---|
| 496 | * Slam our jmp_buf template into the context we are creating |
---|
| 497 | */ |
---|
[ac7d5ef0] | 498 | |
---|
[637df35] | 499 | if ( _new_level == 0 ) |
---|
[df49c60] | 500 | *(Context_Control_overlay *)_the_context = |
---|
| 501 | _CPU_Context_Default_with_ISRs_enabled; |
---|
[637df35] | 502 | else |
---|
[df49c60] | 503 | *(Context_Control_overlay *)_the_context = |
---|
| 504 | _CPU_Context_Default_with_ISRs_disabled; |
---|
[d1193c7] | 505 | |
---|
[c346f33d] | 506 | addr = (uint32_t *)_the_context; |
---|
[ac7d5ef0] | 507 | |
---|
[3ec7bfc] | 508 | #if defined(__hppa__) |
---|
[637df35] | 509 | *(addr + RP_OFF) = jmp_addr; |
---|
[c346f33d] | 510 | *(addr + SP_OFF) = (uint32_t )(_stack_low + CPU_FRAME_SIZE); |
---|
[ac7d5ef0] | 511 | |
---|
[637df35] | 512 | /* |
---|
| 513 | * See if we are using shared libraries by checking |
---|
| 514 | * bit 30 in 24 off of newp. If bit 30 is set then |
---|
| 515 | * we are using shared libraries and the jump address |
---|
[cc4c1fe4] | 516 | * points to the pointer, so we put that into rp instead. |
---|
[637df35] | 517 | */ |
---|
[ac7d5ef0] | 518 | |
---|
[637df35] | 519 | if (jmp_addr & 0x40000000) { |
---|
| 520 | jmp_addr &= 0xfffffffc; |
---|
[c346f33d] | 521 | *(addr + RP_OFF) = *(uint32_t *)jmp_addr; |
---|
[637df35] | 522 | } |
---|
[3ec7bfc] | 523 | #elif defined(__sparc__) |
---|
[ac7d5ef0] | 524 | |
---|
[637df35] | 525 | /* |
---|
| 526 | * See /usr/include/sys/stack.h in Solaris 2.3 for a nice |
---|
| 527 | * diagram of the stack. |
---|
| 528 | */ |
---|
[ac7d5ef0] | 529 | |
---|
[637df35] | 530 | asm ("ta 0x03"); /* flush registers */ |
---|
[ac7d5ef0] | 531 | |
---|
[637df35] | 532 | *(addr + RP_OFF) = jmp_addr + ADDR_ADJ_OFFSET; |
---|
[c346f33d] | 533 | *(addr + SP_OFF) = (uint32_t )(_stack_high - CPU_FRAME_SIZE); |
---|
| 534 | *(addr + FP_OFF) = (uint32_t )(_stack_high); |
---|
[8044533] | 535 | |
---|
[3ec7bfc] | 536 | #elif defined(__i386__) |
---|
[d1193c7] | 537 | |
---|
[8044533] | 538 | /* |
---|
| 539 | * This information was gathered by disassembling setjmp(). |
---|
| 540 | */ |
---|
[10aed1e3] | 541 | |
---|
| 542 | { |
---|
[c346f33d] | 543 | uint32_t stack_ptr; |
---|
[10aed1e3] | 544 | |
---|
| 545 | stack_ptr = _stack_high - CPU_FRAME_SIZE; |
---|
| 546 | |
---|
| 547 | *(addr + EBX_OFF) = 0xFEEDFEED; |
---|
| 548 | *(addr + ESI_OFF) = 0xDEADDEAD; |
---|
| 549 | *(addr + EDI_OFF) = 0xDEAFDEAF; |
---|
| 550 | *(addr + EBP_OFF) = stack_ptr; |
---|
| 551 | *(addr + ESP_OFF) = stack_ptr; |
---|
| 552 | *(addr + RET_OFF) = jmp_addr; |
---|
[d1193c7] | 553 | |
---|
[c346f33d] | 554 | addr = (uint32_t *) stack_ptr; |
---|
[d1193c7] | 555 | |
---|
[10aed1e3] | 556 | addr[ 0 ] = jmp_addr; |
---|
[c346f33d] | 557 | addr[ 1 ] = (uint32_t ) stack_ptr; |
---|
| 558 | addr[ 2 ] = (uint32_t ) stack_ptr; |
---|
[10aed1e3] | 559 | } |
---|
[8044533] | 560 | |
---|
[ac7d5ef0] | 561 | #else |
---|
| 562 | #error "UNKNOWN CPU!!!" |
---|
| 563 | #endif |
---|
| 564 | |
---|
| 565 | } |
---|
| 566 | |
---|
[637df35] | 567 | /*PAGE |
---|
| 568 | * |
---|
| 569 | * _CPU_Context_restore |
---|
| 570 | */ |
---|
| 571 | |
---|
[ac7d5ef0] | 572 | void _CPU_Context_restore( |
---|
| 573 | Context_Control *next |
---|
| 574 | ) |
---|
| 575 | { |
---|
[37f4c2d] | 576 | Context_Control_overlay *nextp = (Context_Control_overlay *)next; |
---|
| 577 | |
---|
[d196e48] | 578 | _CPU_ISR_Enable(nextp->isr_level); |
---|
[37f4c2d] | 579 | longjmp( nextp->regs, 0 ); |
---|
[ac7d5ef0] | 580 | } |
---|
| 581 | |
---|
[637df35] | 582 | /*PAGE |
---|
| 583 | * |
---|
| 584 | * _CPU_Context_switch |
---|
| 585 | */ |
---|
| 586 | |
---|
[d196e48] | 587 | static void do_jump( |
---|
| 588 | Context_Control_overlay *currentp, |
---|
| 589 | Context_Control_overlay *nextp |
---|
| 590 | ); |
---|
| 591 | |
---|
[ac7d5ef0] | 592 | void _CPU_Context_switch( |
---|
| 593 | Context_Control *current, |
---|
| 594 | Context_Control *next |
---|
| 595 | ) |
---|
| 596 | { |
---|
[37f4c2d] | 597 | Context_Control_overlay *currentp = (Context_Control_overlay *)current; |
---|
| 598 | Context_Control_overlay *nextp = (Context_Control_overlay *)next; |
---|
[d196e48] | 599 | #if 0 |
---|
[3652ad35] | 600 | int status; |
---|
[d196e48] | 601 | #endif |
---|
[d1193c7] | 602 | |
---|
[d196e48] | 603 | currentp->isr_level = _CPU_ISR_Disable_support(); |
---|
[d1193c7] | 604 | |
---|
[d196e48] | 605 | do_jump( currentp, nextp ); |
---|
[3652ad35] | 606 | |
---|
[d196e48] | 607 | #if 0 |
---|
| 608 | if (sigsetjmp(currentp->regs, 1) == 0) { /* Save the current context */ |
---|
| 609 | siglongjmp(nextp->regs, 0); /* Switch to the new context */ |
---|
| 610 | _Internal_error_Occurred( |
---|
| 611 | INTERNAL_ERROR_CORE, |
---|
| 612 | TRUE, |
---|
| 613 | status |
---|
| 614 | ); |
---|
| 615 | } |
---|
| 616 | #endif |
---|
[d1193c7] | 617 | |
---|
[d196e48] | 618 | #ifdef RTEMS_DEBUG |
---|
| 619 | if (_CPU_ISR_Get_level() == 0) |
---|
| 620 | abort(); |
---|
| 621 | #endif |
---|
[d1193c7] | 622 | |
---|
[d196e48] | 623 | _CPU_ISR_Enable(currentp->isr_level); |
---|
| 624 | } |
---|
[d1193c7] | 625 | |
---|
| 626 | static void do_jump( |
---|
[d196e48] | 627 | Context_Control_overlay *currentp, |
---|
[d1193c7] | 628 | Context_Control_overlay *nextp |
---|
[d196e48] | 629 | ) |
---|
| 630 | { |
---|
| 631 | int status; |
---|
[ac7d5ef0] | 632 | |
---|
[37f4c2d] | 633 | if (setjmp(currentp->regs) == 0) { /* Save the current context */ |
---|
| 634 | longjmp(nextp->regs, 0); /* Switch to the new context */ |
---|
[d196e48] | 635 | _Internal_error_Occurred( |
---|
[3652ad35] | 636 | INTERNAL_ERROR_CORE, |
---|
| 637 | TRUE, |
---|
| 638 | status |
---|
| 639 | ); |
---|
[637df35] | 640 | } |
---|
[ac7d5ef0] | 641 | } |
---|
[d196e48] | 642 | |
---|
[637df35] | 643 | /*PAGE |
---|
| 644 | * |
---|
| 645 | * _CPU_Save_float_context |
---|
| 646 | */ |
---|
[ac7d5ef0] | 647 | |
---|
| 648 | void _CPU_Save_float_context( |
---|
| 649 | Context_Control_fp *fp_context |
---|
| 650 | ) |
---|
| 651 | { |
---|
| 652 | } |
---|
| 653 | |
---|
[637df35] | 654 | /*PAGE |
---|
| 655 | * |
---|
| 656 | * _CPU_Restore_float_context |
---|
| 657 | */ |
---|
| 658 | |
---|
[ac7d5ef0] | 659 | void _CPU_Restore_float_context( |
---|
| 660 | Context_Control_fp *fp_context |
---|
| 661 | ) |
---|
| 662 | { |
---|
| 663 | } |
---|
| 664 | |
---|
[637df35] | 665 | /*PAGE |
---|
| 666 | * |
---|
| 667 | * _CPU_ISR_Disable_support |
---|
| 668 | */ |
---|
[ac7d5ef0] | 669 | |
---|
[c346f33d] | 670 | uint32_t _CPU_ISR_Disable_support(void) |
---|
[ac7d5ef0] | 671 | { |
---|
[3652ad35] | 672 | int status; |
---|
[637df35] | 673 | sigset_t old_mask; |
---|
[ac7d5ef0] | 674 | |
---|
[d83c39dc] | 675 | sigemptyset( &old_mask ); |
---|
[3652ad35] | 676 | status = sigprocmask(SIG_BLOCK, &_CPU_Signal_mask, &old_mask); |
---|
| 677 | if ( status ) |
---|
| 678 | _Internal_error_Occurred( |
---|
| 679 | INTERNAL_ERROR_CORE, |
---|
| 680 | TRUE, |
---|
| 681 | status |
---|
| 682 | ); |
---|
[ac7d5ef0] | 683 | |
---|
[3652ad35] | 684 | if (memcmp((void *)&posix_empty_mask, (void *)&old_mask, sizeof(sigset_t))) |
---|
[637df35] | 685 | return 1; |
---|
[ac7d5ef0] | 686 | |
---|
[637df35] | 687 | return 0; |
---|
[ac7d5ef0] | 688 | } |
---|
| 689 | |
---|
[637df35] | 690 | /*PAGE |
---|
| 691 | * |
---|
| 692 | * _CPU_ISR_Enable |
---|
| 693 | */ |
---|
[ac7d5ef0] | 694 | |
---|
[637df35] | 695 | void _CPU_ISR_Enable( |
---|
[c346f33d] | 696 | uint32_t level |
---|
[637df35] | 697 | ) |
---|
[ac7d5ef0] | 698 | { |
---|
[3652ad35] | 699 | int status; |
---|
| 700 | |
---|
[637df35] | 701 | if (level == 0) |
---|
[3652ad35] | 702 | status = sigprocmask(SIG_UNBLOCK, &_CPU_Signal_mask, 0); |
---|
[637df35] | 703 | else |
---|
[3652ad35] | 704 | status = sigprocmask(SIG_BLOCK, &_CPU_Signal_mask, 0); |
---|
| 705 | |
---|
| 706 | if ( status ) |
---|
| 707 | _Internal_error_Occurred( |
---|
| 708 | INTERNAL_ERROR_CORE, |
---|
| 709 | TRUE, |
---|
| 710 | status |
---|
| 711 | ); |
---|
[ac7d5ef0] | 712 | } |
---|
| 713 | |
---|
[637df35] | 714 | /*PAGE |
---|
[ac7d5ef0] | 715 | * |
---|
[637df35] | 716 | * _CPU_ISR_Handler |
---|
| 717 | * |
---|
| 718 | * External interrupt handler. |
---|
| 719 | * This is installed as a UNIX signal handler. |
---|
| 720 | * It vectors out to specific user interrupt handlers. |
---|
[ac7d5ef0] | 721 | */ |
---|
| 722 | |
---|
[637df35] | 723 | void _CPU_ISR_Handler(int vector) |
---|
[ac7d5ef0] | 724 | { |
---|
[637df35] | 725 | extern void _Thread_Dispatch(void); |
---|
[c346f33d] | 726 | extern uint32_t _Thread_Dispatch_disable_level; |
---|
[637df35] | 727 | extern boolean _Context_Switch_necessary; |
---|
[ac7d5ef0] | 728 | |
---|
[637df35] | 729 | if (_ISR_Nest_level++ == 0) { |
---|
| 730 | /* switch to interrupt stack */ |
---|
| 731 | } |
---|
[ac7d5ef0] | 732 | |
---|
[637df35] | 733 | _Thread_Dispatch_disable_level++; |
---|
[ac7d5ef0] | 734 | |
---|
[637df35] | 735 | if (_ISR_Vector_table[vector]) { |
---|
| 736 | _ISR_Vector_table[vector](vector); |
---|
| 737 | } else { |
---|
| 738 | _CPU_Stray_signal(vector); |
---|
| 739 | } |
---|
[ac7d5ef0] | 740 | |
---|
[637df35] | 741 | if (_ISR_Nest_level-- == 0) { |
---|
| 742 | /* switch back to original stack */ |
---|
| 743 | } |
---|
[ac7d5ef0] | 744 | |
---|
[637df35] | 745 | _Thread_Dispatch_disable_level--; |
---|
[ac7d5ef0] | 746 | |
---|
[637df35] | 747 | if (_Thread_Dispatch_disable_level == 0 && |
---|
| 748 | (_Context_Switch_necessary || _ISR_Signals_to_thread_executing)) { |
---|
[8a38f3b] | 749 | _ISR_Signals_to_thread_executing = FALSE; |
---|
[637df35] | 750 | _CPU_ISR_Enable(0); |
---|
| 751 | _Thread_Dispatch(); |
---|
| 752 | } |
---|
[ac7d5ef0] | 753 | } |
---|
| 754 | |
---|
[637df35] | 755 | /*PAGE |
---|
| 756 | * |
---|
| 757 | * _CPU_Stray_signal |
---|
| 758 | */ |
---|
[ac7d5ef0] | 759 | |
---|
[637df35] | 760 | void _CPU_Stray_signal(int sig_num) |
---|
[ac7d5ef0] | 761 | { |
---|
[c64e4ed4] | 762 | char buffer[ 4 ]; |
---|
[d1193c7] | 763 | |
---|
[c64e4ed4] | 764 | /* |
---|
| 765 | * print "stray" msg about ones which that might mean something |
---|
| 766 | * Avoid using the stdio section of the library. |
---|
| 767 | * The following is generally safe. |
---|
[637df35] | 768 | */ |
---|
[d1193c7] | 769 | |
---|
[c64e4ed4] | 770 | switch (sig_num) |
---|
| 771 | { |
---|
[9a6994b4] | 772 | #ifdef SIGCLD |
---|
[c64e4ed4] | 773 | case SIGCLD: |
---|
| 774 | break; |
---|
[9a6994b4] | 775 | #endif |
---|
[c64e4ed4] | 776 | default: |
---|
| 777 | { |
---|
[cc4c1fe4] | 778 | /* |
---|
| 779 | * We avoid using the stdio section of the library. |
---|
| 780 | * The following is generally safe |
---|
| 781 | */ |
---|
[d1193c7] | 782 | |
---|
[cc4c1fe4] | 783 | int digit; |
---|
| 784 | int number = sig_num; |
---|
| 785 | int len = 0; |
---|
| 786 | |
---|
| 787 | digit = number / 100; |
---|
| 788 | number %= 100; |
---|
| 789 | if (digit) buffer[len++] = '0' + digit; |
---|
| 790 | |
---|
| 791 | digit = number / 10; |
---|
| 792 | number %= 10; |
---|
| 793 | if (digit || len) buffer[len++] = '0' + digit; |
---|
| 794 | |
---|
| 795 | digit = number; |
---|
| 796 | buffer[len++] = '0' + digit; |
---|
[d1193c7] | 797 | |
---|
[cc4c1fe4] | 798 | buffer[ len++ ] = '\n'; |
---|
[d1193c7] | 799 | |
---|
[cc4c1fe4] | 800 | write( 2, "Stray signal ", 13 ); |
---|
| 801 | write( 2, buffer, len ); |
---|
| 802 | |
---|
[c64e4ed4] | 803 | } |
---|
| 804 | } |
---|
[d1193c7] | 805 | |
---|
[637df35] | 806 | /* |
---|
| 807 | * If it was a "fatal" signal, then exit here |
---|
| 808 | * If app code has installed a hander for one of these, then |
---|
| 809 | * we won't call _CPU_Stray_signal, so this is ok. |
---|
| 810 | */ |
---|
[d1193c7] | 811 | |
---|
[637df35] | 812 | switch (sig_num) { |
---|
| 813 | case SIGINT: |
---|
| 814 | case SIGHUP: |
---|
| 815 | case SIGQUIT: |
---|
| 816 | case SIGILL: |
---|
[10aed1e3] | 817 | #ifdef SIGEMT |
---|
[637df35] | 818 | case SIGEMT: |
---|
[10aed1e3] | 819 | #endif |
---|
[637df35] | 820 | case SIGKILL: |
---|
| 821 | case SIGBUS: |
---|
| 822 | case SIGSEGV: |
---|
| 823 | case SIGTERM: |
---|
[df49c60] | 824 | #if !defined(__CYGWIN__) |
---|
[d196e48] | 825 | case SIGIOT: |
---|
[df49c60] | 826 | #endif |
---|
[cc4c1fe4] | 827 | _CPU_Fatal_error(0x100 + sig_num); |
---|
[637df35] | 828 | } |
---|
[ac7d5ef0] | 829 | } |
---|
| 830 | |
---|
[637df35] | 831 | /*PAGE |
---|
| 832 | * |
---|
| 833 | * _CPU_Fatal_error |
---|
| 834 | */ |
---|
[ac7d5ef0] | 835 | |
---|
[c346f33d] | 836 | void _CPU_Fatal_error(uint32_t error) |
---|
[ac7d5ef0] | 837 | { |
---|
[637df35] | 838 | setitimer(ITIMER_REAL, 0, 0); |
---|
[ac7d5ef0] | 839 | |
---|
[e7e016f] | 840 | if ( error ) { |
---|
| 841 | #ifdef RTEMS_DEBUG |
---|
| 842 | abort(); |
---|
| 843 | #endif |
---|
| 844 | if (getenv("RTEMS_DEBUG")) |
---|
| 845 | abort(); |
---|
| 846 | } |
---|
| 847 | |
---|
[637df35] | 848 | _exit(error); |
---|
[ac7d5ef0] | 849 | } |
---|
| 850 | |
---|
[37f4c2d] | 851 | /* |
---|
| 852 | * Special Purpose Routines to hide the use of UNIX system calls. |
---|
| 853 | */ |
---|
| 854 | |
---|
[0a6fb22] | 855 | int _CPU_Set_sync_io_handler( |
---|
| 856 | int fd, |
---|
| 857 | boolean read, |
---|
| 858 | boolean write, |
---|
| 859 | boolean except, |
---|
| 860 | rtems_sync_io_handler handler |
---|
| 861 | ) |
---|
| 862 | { |
---|
| 863 | if ((fd < FD_SETSIZE) && (_CPU_Sync_io_handlers[fd] == NULL)) { |
---|
| 864 | if (read) |
---|
| 865 | FD_SET(fd, &sync_io_readfds); |
---|
| 866 | else |
---|
| 867 | FD_CLR(fd, &sync_io_readfds); |
---|
| 868 | if (write) |
---|
| 869 | FD_SET(fd, &sync_io_writefds); |
---|
| 870 | else |
---|
| 871 | FD_CLR(fd, &sync_io_writefds); |
---|
| 872 | if (except) |
---|
| 873 | FD_SET(fd, &sync_io_exceptfds); |
---|
| 874 | else |
---|
| 875 | FD_CLR(fd, &sync_io_exceptfds); |
---|
| 876 | _CPU_Sync_io_handlers[fd] = handler; |
---|
| 877 | if ((fd + 1) > sync_io_nfds) |
---|
| 878 | sync_io_nfds = fd + 1; |
---|
| 879 | return 0; |
---|
| 880 | } |
---|
| 881 | return -1; |
---|
| 882 | } |
---|
| 883 | |
---|
| 884 | int _CPU_Clear_sync_io_handler( |
---|
| 885 | int fd |
---|
| 886 | ) |
---|
| 887 | { |
---|
| 888 | if ((fd < FD_SETSIZE) && _CPU_Sync_io_handlers[fd]) { |
---|
| 889 | FD_CLR(fd, &sync_io_readfds); |
---|
| 890 | FD_CLR(fd, &sync_io_writefds); |
---|
| 891 | FD_CLR(fd, &sync_io_exceptfds); |
---|
| 892 | _CPU_Sync_io_handlers[fd] = NULL; |
---|
| 893 | sync_io_nfds = 0; |
---|
| 894 | for (fd = 0; fd < FD_SETSIZE; fd++) |
---|
| 895 | if (FD_ISSET(fd, &sync_io_readfds) || |
---|
| 896 | FD_ISSET(fd, &sync_io_writefds) || |
---|
| 897 | FD_ISSET(fd, &sync_io_exceptfds)) |
---|
[b4e3b2b] | 898 | sync_io_nfds = fd + 1; |
---|
[0a6fb22] | 899 | return 0; |
---|
| 900 | } |
---|
| 901 | return -1; |
---|
| 902 | } |
---|
| 903 | |
---|
[37f4c2d] | 904 | int _CPU_Get_clock_vector( void ) |
---|
| 905 | { |
---|
| 906 | return SIGALRM; |
---|
| 907 | } |
---|
| 908 | |
---|
[d1193c7] | 909 | void _CPU_Start_clock( |
---|
[37f4c2d] | 910 | int microseconds |
---|
| 911 | ) |
---|
| 912 | { |
---|
| 913 | struct itimerval new; |
---|
| 914 | |
---|
| 915 | new.it_value.tv_sec = 0; |
---|
| 916 | new.it_value.tv_usec = microseconds; |
---|
| 917 | new.it_interval.tv_sec = 0; |
---|
| 918 | new.it_interval.tv_usec = microseconds; |
---|
| 919 | |
---|
| 920 | setitimer(ITIMER_REAL, &new, 0); |
---|
| 921 | } |
---|
| 922 | |
---|
| 923 | void _CPU_Stop_clock( void ) |
---|
| 924 | { |
---|
| 925 | struct itimerval new; |
---|
| 926 | struct sigaction act; |
---|
[d1193c7] | 927 | |
---|
[37f4c2d] | 928 | /* |
---|
| 929 | * Set the SIGALRM signal to ignore any last |
---|
| 930 | * signals that might come in while we are |
---|
| 931 | * disarming the timer and removing the interrupt |
---|
| 932 | * vector. |
---|
| 933 | */ |
---|
[d1193c7] | 934 | |
---|
[cc4c1fe4] | 935 | (void) memset(&act, 0, sizeof(act)); |
---|
[37f4c2d] | 936 | act.sa_handler = SIG_IGN; |
---|
[d1193c7] | 937 | |
---|
[cc4c1fe4] | 938 | sigaction(SIGALRM, &act, 0); |
---|
[d1193c7] | 939 | |
---|
[cc4c1fe4] | 940 | (void) memset(&new, 0, sizeof(new)); |
---|
[37f4c2d] | 941 | setitimer(ITIMER_REAL, &new, 0); |
---|
| 942 | } |
---|
| 943 | |
---|
[652aa30] | 944 | #if 0 |
---|
[c094542] | 945 | extern void fix_syscall_errno( void ); |
---|
[652aa30] | 946 | #endif |
---|
| 947 | #define fix_syscall_errno() |
---|
[c094542] | 948 | |
---|
| 949 | #if defined(RTEMS_MULTIPROCESSING) |
---|
[37f4c2d] | 950 | int _CPU_SHM_Semid; |
---|
| 951 | |
---|
[d1193c7] | 952 | void _CPU_SHM_Init( |
---|
[c346f33d] | 953 | uint32_t maximum_nodes, |
---|
[37f4c2d] | 954 | boolean is_master_node, |
---|
| 955 | void **shm_address, |
---|
[c346f33d] | 956 | uint32_t *shm_length |
---|
[37f4c2d] | 957 | ) |
---|
| 958 | { |
---|
| 959 | int i; |
---|
| 960 | int shmid; |
---|
| 961 | char *shm_addr; |
---|
| 962 | key_t shm_key; |
---|
| 963 | key_t sem_key; |
---|
[d6ba279] | 964 | int status = 0; /* to avoid unitialized warnings */ |
---|
[37f4c2d] | 965 | int shm_size; |
---|
[d1193c7] | 966 | |
---|
[37f4c2d] | 967 | if (getenv("RTEMS_SHM_KEY")) |
---|
| 968 | shm_key = strtol(getenv("RTEMS_SHM_KEY"), 0, 0); |
---|
| 969 | else |
---|
| 970 | #ifdef RTEMS_SHM_KEY |
---|
| 971 | shm_key = RTEMS_SHM_KEY; |
---|
| 972 | #else |
---|
| 973 | shm_key = 0xa000; |
---|
| 974 | #endif |
---|
[d1193c7] | 975 | |
---|
[37f4c2d] | 976 | if (getenv("RTEMS_SHM_SIZE")) |
---|
| 977 | shm_size = strtol(getenv("RTEMS_SHM_SIZE"), 0, 0); |
---|
| 978 | else |
---|
| 979 | #ifdef RTEMS_SHM_SIZE |
---|
| 980 | shm_size = RTEMS_SHM_SIZE; |
---|
| 981 | #else |
---|
| 982 | shm_size = 64 * 1024; |
---|
| 983 | #endif |
---|
[d1193c7] | 984 | |
---|
[37f4c2d] | 985 | if (getenv("RTEMS_SHM_SEMAPHORE_KEY")) |
---|
| 986 | sem_key = strtol(getenv("RTEMS_SHM_SEMAPHORE_KEY"), 0, 0); |
---|
| 987 | else |
---|
| 988 | #ifdef RTEMS_SHM_SEMAPHORE_KEY |
---|
| 989 | sem_key = RTEMS_SHM_SEMAPHORE_KEY; |
---|
| 990 | #else |
---|
| 991 | sem_key = 0xa001; |
---|
| 992 | #endif |
---|
[d1193c7] | 993 | |
---|
[37f4c2d] | 994 | shmid = shmget(shm_key, shm_size, IPC_CREAT | 0660); |
---|
| 995 | if ( shmid == -1 ) { |
---|
| 996 | fix_syscall_errno(); /* in case of newlib */ |
---|
| 997 | perror( "shmget" ); |
---|
| 998 | _CPU_Fatal_halt( 0xdead0001 ); |
---|
| 999 | } |
---|
[d1193c7] | 1000 | |
---|
[37f4c2d] | 1001 | shm_addr = shmat(shmid, (char *)0, SHM_RND); |
---|
| 1002 | if ( shm_addr == (void *)-1 ) { |
---|
| 1003 | fix_syscall_errno(); /* in case of newlib */ |
---|
| 1004 | perror( "shmat" ); |
---|
| 1005 | _CPU_Fatal_halt( 0xdead0002 ); |
---|
| 1006 | } |
---|
[d1193c7] | 1007 | |
---|
[37f4c2d] | 1008 | _CPU_SHM_Semid = semget(sem_key, maximum_nodes + 1, IPC_CREAT | 0660); |
---|
| 1009 | if ( _CPU_SHM_Semid == -1 ) { |
---|
| 1010 | fix_syscall_errno(); /* in case of newlib */ |
---|
| 1011 | perror( "semget" ); |
---|
| 1012 | _CPU_Fatal_halt( 0xdead0003 ); |
---|
| 1013 | } |
---|
[d1193c7] | 1014 | |
---|
[37f4c2d] | 1015 | if ( is_master_node ) { |
---|
| 1016 | for ( i=0 ; i <= maximum_nodes ; i++ ) { |
---|
[ea562ee9] | 1017 | #if !HAS_UNION_SEMUN |
---|
[37f4c2d] | 1018 | union semun { |
---|
| 1019 | int val; |
---|
| 1020 | struct semid_ds *buf; |
---|
[ea562ee9] | 1021 | unsigned short int *array; |
---|
| 1022 | #if defined(__linux__) |
---|
| 1023 | struct seminfo *__buf; |
---|
| 1024 | #endif |
---|
| 1025 | } ; |
---|
| 1026 | #endif |
---|
| 1027 | union semun help ; |
---|
[3a85d03d] | 1028 | help.val = 1; |
---|
| 1029 | status = semctl( _CPU_SHM_Semid, i, SETVAL, help ); |
---|
[d1193c7] | 1030 | |
---|
[37f4c2d] | 1031 | fix_syscall_errno(); /* in case of newlib */ |
---|
| 1032 | if ( status == -1 ) { |
---|
| 1033 | _CPU_Fatal_halt( 0xdead0004 ); |
---|
| 1034 | } |
---|
| 1035 | } |
---|
| 1036 | } |
---|
[d1193c7] | 1037 | |
---|
[37f4c2d] | 1038 | *shm_address = shm_addr; |
---|
| 1039 | *shm_length = shm_size; |
---|
| 1040 | |
---|
| 1041 | } |
---|
[c094542] | 1042 | #endif |
---|
[37f4c2d] | 1043 | |
---|
| 1044 | int _CPU_Get_pid( void ) |
---|
| 1045 | { |
---|
| 1046 | return getpid(); |
---|
| 1047 | } |
---|
| 1048 | |
---|
[c094542] | 1049 | #if defined(RTEMS_MULTIPROCESSING) |
---|
[37f4c2d] | 1050 | /* |
---|
| 1051 | * Define this to use signals for MPCI shared memory driver. |
---|
| 1052 | * If undefined, the shared memory driver will poll from the |
---|
| 1053 | * clock interrupt. |
---|
| 1054 | * Ref: ../shmsupp/getcfg.c |
---|
| 1055 | * |
---|
| 1056 | * BEWARE:: many UN*X kernels and debuggers become severely confused when |
---|
| 1057 | * debugging programs which use signals. The problem is *much* |
---|
| 1058 | * worse when using multiple signals, since ptrace(2) tends to |
---|
| 1059 | * drop all signals except 1 in the case of multiples. |
---|
| 1060 | * On hpux9, this problem was so bad, we couldn't use interrupts |
---|
| 1061 | * with the shared memory driver if we ever hoped to debug |
---|
| 1062 | * RTEMS programs. |
---|
| 1063 | * Maybe systems that use /proc don't have this problem... |
---|
| 1064 | */ |
---|
[d1193c7] | 1065 | |
---|
| 1066 | |
---|
[37f4c2d] | 1067 | int _CPU_SHM_Get_vector( void ) |
---|
| 1068 | { |
---|
| 1069 | #ifdef CPU_USE_SHM_INTERRUPTS |
---|
| 1070 | return SIGUSR1; |
---|
| 1071 | #else |
---|
| 1072 | return 0; |
---|
| 1073 | #endif |
---|
| 1074 | } |
---|
| 1075 | |
---|
| 1076 | void _CPU_SHM_Send_interrupt( |
---|
| 1077 | int pid, |
---|
| 1078 | int vector |
---|
| 1079 | ) |
---|
| 1080 | { |
---|
| 1081 | kill((pid_t) pid, vector); |
---|
| 1082 | } |
---|
| 1083 | |
---|
[d1193c7] | 1084 | void _CPU_SHM_Lock( |
---|
[37f4c2d] | 1085 | int semaphore |
---|
| 1086 | ) |
---|
| 1087 | { |
---|
[0a6fb22] | 1088 | struct sembuf sb; |
---|
[d1193c7] | 1089 | |
---|
[37f4c2d] | 1090 | sb.sem_num = semaphore; |
---|
| 1091 | sb.sem_op = -1; |
---|
| 1092 | sb.sem_flg = 0; |
---|
[d1193c7] | 1093 | |
---|
[37f4c2d] | 1094 | while (1) { |
---|
[0a6fb22] | 1095 | int status = -1; |
---|
| 1096 | |
---|
[37f4c2d] | 1097 | status = semop(_CPU_SHM_Semid, &sb, 1); |
---|
| 1098 | if ( status >= 0 ) |
---|
| 1099 | break; |
---|
| 1100 | if ( status == -1 ) { |
---|
| 1101 | fix_syscall_errno(); /* in case of newlib */ |
---|
| 1102 | if (errno == EINTR) |
---|
| 1103 | continue; |
---|
| 1104 | perror("shm lock"); |
---|
| 1105 | _CPU_Fatal_halt( 0xdead0005 ); |
---|
| 1106 | } |
---|
| 1107 | } |
---|
| 1108 | |
---|
| 1109 | } |
---|
| 1110 | |
---|
| 1111 | void _CPU_SHM_Unlock( |
---|
| 1112 | int semaphore |
---|
| 1113 | ) |
---|
| 1114 | { |
---|
| 1115 | struct sembuf sb; |
---|
| 1116 | int status; |
---|
[d1193c7] | 1117 | |
---|
[37f4c2d] | 1118 | sb.sem_num = semaphore; |
---|
| 1119 | sb.sem_op = 1; |
---|
| 1120 | sb.sem_flg = 0; |
---|
[d1193c7] | 1121 | |
---|
[37f4c2d] | 1122 | while (1) { |
---|
| 1123 | status = semop(_CPU_SHM_Semid, &sb, 1); |
---|
| 1124 | if ( status >= 0 ) |
---|
| 1125 | break; |
---|
[d1193c7] | 1126 | |
---|
[37f4c2d] | 1127 | if ( status == -1 ) { |
---|
| 1128 | fix_syscall_errno(); /* in case of newlib */ |
---|
| 1129 | if (errno == EINTR) |
---|
| 1130 | continue; |
---|
| 1131 | perror("shm unlock"); |
---|
| 1132 | _CPU_Fatal_halt( 0xdead0006 ); |
---|
| 1133 | } |
---|
| 1134 | } |
---|
| 1135 | |
---|
| 1136 | } |
---|
[c094542] | 1137 | #endif |
---|