[ac7d5ef0] | 1 | /* |
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[3652ad35] | 2 | * UNIX Simulator Dependent Source |
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[ac7d5ef0] | 3 | * |
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| 4 | * |
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| 5 | * To anyone who acknowledges that this file is provided "AS IS" |
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| 6 | * without any express or implied warranty: |
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| 7 | * permission to use, copy, modify, and distribute this file |
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| 8 | * for any purpose is hereby granted without fee, provided that |
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| 9 | * the above copyright notice and this notice appears in all |
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| 10 | * copies, and that the name of Division Incorporated not be |
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| 11 | * used in advertising or publicity pertaining to distribution |
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| 12 | * of the software without specific, written prior permission. |
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| 13 | * Division Incorporated makes no representations about the |
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| 14 | * suitability of this software for any purpose. |
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| 15 | * |
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| 16 | * $Id$ |
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| 17 | */ |
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| 18 | |
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| 19 | #include <rtems/system.h> |
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[5e9b32b] | 20 | #include <rtems/score/isr.h> |
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| 21 | #include <rtems/score/interr.h> |
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[ac7d5ef0] | 22 | |
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[37f4c2d] | 23 | #if defined(solaris2) |
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[1ceface] | 24 | /* |
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[37f4c2d] | 25 | #undef _POSIX_C_SOURCE |
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| 26 | #define _POSIX_C_SOURCE 3 |
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| 27 | #undef __STRICT_ANSI__ |
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| 28 | #define __STRICT_ANSI__ |
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[1ceface] | 29 | */ |
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| 30 | #define __EXTENSIONS__ |
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[37f4c2d] | 31 | #endif |
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[d1193c7] | 32 | |
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[37f4c2d] | 33 | #if defined(linux) |
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| 34 | #define MALLOC_0_RETURNS_NULL |
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| 35 | #endif |
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[d1193c7] | 36 | |
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[1c964ffa] | 37 | #include <sys/types.h> |
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| 38 | #include <sys/times.h> |
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[ac7d5ef0] | 39 | #include <stdio.h> |
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| 40 | #include <stdlib.h> |
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[37f4c2d] | 41 | #include <setjmp.h> |
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[ac7d5ef0] | 42 | #include <signal.h> |
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| 43 | #include <time.h> |
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[10aed1e3] | 44 | #include <sys/time.h> |
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[37f4c2d] | 45 | #include <errno.h> |
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| 46 | #include <unistd.h> |
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| 47 | #include <sys/ipc.h> |
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| 48 | #include <sys/shm.h> |
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| 49 | #include <sys/sem.h> |
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[cc4c1fe4] | 50 | #include <string.h> /* memset */ |
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[ac7d5ef0] | 51 | |
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[637df35] | 52 | #ifndef SA_RESTART |
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| 53 | #define SA_RESTART 0 |
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| 54 | #endif |
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[ac7d5ef0] | 55 | |
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[37f4c2d] | 56 | typedef struct { |
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| 57 | jmp_buf regs; |
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[d196e48] | 58 | unsigned32 isr_level; |
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[37f4c2d] | 59 | } Context_Control_overlay; |
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| 60 | |
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[637df35] | 61 | void _CPU_Signal_initialize(void); |
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| 62 | void _CPU_Stray_signal(int); |
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| 63 | void _CPU_ISR_Handler(int); |
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[ac7d5ef0] | 64 | |
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[d196e48] | 65 | static sigset_t _CPU_Signal_mask; |
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[d1193c7] | 66 | static Context_Control_overlay |
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[855edec] | 67 | _CPU_Context_Default_with_ISRs_enabled CPU_STRUCTURE_ALIGNMENT; |
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[d1193c7] | 68 | static Context_Control_overlay |
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[855edec] | 69 | _CPU_Context_Default_with_ISRs_disabled CPU_STRUCTURE_ALIGNMENT; |
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[ac7d5ef0] | 70 | |
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| 71 | /* |
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| 72 | * Which cpu are we? Used by libcpu and libbsp. |
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| 73 | */ |
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| 74 | |
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| 75 | int cpu_number; |
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| 76 | |
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[637df35] | 77 | /*PAGE |
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| 78 | * |
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| 79 | * _CPU_ISR_From_CPU_Init |
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| 80 | */ |
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| 81 | |
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[e7e016f] | 82 | sigset_t posix_empty_mask; |
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| 83 | |
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[637df35] | 84 | void _CPU_ISR_From_CPU_Init() |
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| 85 | { |
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| 86 | unsigned32 i; |
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| 87 | proc_ptr old_handler; |
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| 88 | |
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[e7e016f] | 89 | /* |
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| 90 | * Generate an empty mask to be used by disable_support |
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| 91 | */ |
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[637df35] | 92 | |
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[e7e016f] | 93 | sigemptyset(&posix_empty_mask); |
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[c64e4ed4] | 94 | |
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[637df35] | 95 | /* |
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| 96 | * Block all the signals except SIGTRAP for the debugger |
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[d196e48] | 97 | * and fatal error signals. |
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[637df35] | 98 | */ |
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| 99 | |
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| 100 | (void) sigfillset(&_CPU_Signal_mask); |
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| 101 | (void) sigdelset(&_CPU_Signal_mask, SIGTRAP); |
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| 102 | (void) sigdelset(&_CPU_Signal_mask, SIGABRT); |
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| 103 | (void) sigdelset(&_CPU_Signal_mask, SIGIOT); |
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| 104 | (void) sigdelset(&_CPU_Signal_mask, SIGCONT); |
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[d196e48] | 105 | (void) sigdelset(&_CPU_Signal_mask, SIGSEGV); |
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| 106 | (void) sigdelset(&_CPU_Signal_mask, SIGBUS); |
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| 107 | (void) sigdelset(&_CPU_Signal_mask, SIGFPE); |
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[637df35] | 108 | |
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[e7e016f] | 109 | _CPU_ISR_Enable(1); |
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[637df35] | 110 | |
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| 111 | /* |
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| 112 | * Set the handler for all signals to be signal_handler |
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| 113 | * which will then vector out to the correct handler |
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| 114 | * for whichever signal actually happened. Initially |
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| 115 | * set the vectors to the stray signal handler. |
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| 116 | */ |
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| 117 | |
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| 118 | for (i = 0; i < CPU_INTERRUPT_NUMBER_OF_VECTORS; i++) |
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| 119 | (void)_CPU_ISR_install_vector(i, _CPU_Stray_signal, &old_handler); |
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| 120 | |
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| 121 | _CPU_Signal_initialize(); |
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| 122 | } |
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| 123 | |
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| 124 | void _CPU_Signal_initialize( void ) |
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| 125 | { |
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| 126 | struct sigaction act; |
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| 127 | sigset_t mask; |
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[d1193c7] | 128 | |
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[637df35] | 129 | /* mark them all active except for TraceTrap and Abort */ |
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[d1193c7] | 130 | |
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[d196e48] | 131 | mask = _CPU_Signal_mask; |
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[637df35] | 132 | sigprocmask(SIG_UNBLOCK, &mask, 0); |
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[d1193c7] | 133 | |
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[637df35] | 134 | act.sa_handler = _CPU_ISR_Handler; |
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| 135 | act.sa_mask = mask; |
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| 136 | act.sa_flags = SA_RESTART; |
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[d1193c7] | 137 | |
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[637df35] | 138 | sigaction(SIGHUP, &act, 0); |
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| 139 | sigaction(SIGINT, &act, 0); |
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| 140 | sigaction(SIGQUIT, &act, 0); |
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| 141 | sigaction(SIGILL, &act, 0); |
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[10aed1e3] | 142 | #ifdef SIGEMT |
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[637df35] | 143 | sigaction(SIGEMT, &act, 0); |
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[10aed1e3] | 144 | #endif |
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[637df35] | 145 | sigaction(SIGFPE, &act, 0); |
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| 146 | sigaction(SIGKILL, &act, 0); |
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| 147 | sigaction(SIGBUS, &act, 0); |
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| 148 | sigaction(SIGSEGV, &act, 0); |
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[10aed1e3] | 149 | #ifdef SIGSYS |
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[637df35] | 150 | sigaction(SIGSYS, &act, 0); |
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[10aed1e3] | 151 | #endif |
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[637df35] | 152 | sigaction(SIGPIPE, &act, 0); |
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| 153 | sigaction(SIGALRM, &act, 0); |
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| 154 | sigaction(SIGTERM, &act, 0); |
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| 155 | sigaction(SIGUSR1, &act, 0); |
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| 156 | sigaction(SIGUSR2, &act, 0); |
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| 157 | sigaction(SIGCHLD, &act, 0); |
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| 158 | sigaction(SIGCLD, &act, 0); |
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| 159 | sigaction(SIGPWR, &act, 0); |
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| 160 | sigaction(SIGVTALRM, &act, 0); |
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| 161 | sigaction(SIGPROF, &act, 0); |
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| 162 | sigaction(SIGIO, &act, 0); |
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| 163 | sigaction(SIGWINCH, &act, 0); |
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| 164 | sigaction(SIGSTOP, &act, 0); |
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| 165 | sigaction(SIGTTIN, &act, 0); |
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| 166 | sigaction(SIGTTOU, &act, 0); |
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| 167 | sigaction(SIGURG, &act, 0); |
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[e7e016f] | 168 | #ifdef SIGLOST |
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[637df35] | 169 | sigaction(SIGLOST, &act, 0); |
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| 170 | #endif |
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| 171 | } |
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| 172 | |
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| 173 | /*PAGE |
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| 174 | * |
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| 175 | * _CPU_Context_From_CPU_Init |
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| 176 | */ |
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| 177 | |
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| 178 | void _CPU_Context_From_CPU_Init() |
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| 179 | { |
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| 180 | |
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[11290355] | 181 | #if defined(hppa1_1) && defined(RTEMS_UNIXLIB_SETJMP) |
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[637df35] | 182 | /* |
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| 183 | * HACK - set the _SYSTEM_ID to 0x20c so that setjmp/longjmp |
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| 184 | * will handle the full 32 floating point registers. |
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| 185 | */ |
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| 186 | |
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| 187 | { |
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| 188 | extern unsigned32 _SYSTEM_ID; |
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| 189 | |
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| 190 | _SYSTEM_ID = 0x20c; |
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| 191 | } |
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| 192 | #endif |
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| 193 | |
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| 194 | /* |
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| 195 | * get default values to use in _CPU_Context_Initialize() |
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| 196 | */ |
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| 197 | |
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[d1193c7] | 198 | |
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[cc4c1fe4] | 199 | (void) memset( |
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| 200 | &_CPU_Context_Default_with_ISRs_enabled, |
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| 201 | 0, |
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| 202 | sizeof(Context_Control) |
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| 203 | ); |
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| 204 | (void) memset( |
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| 205 | &_CPU_Context_Default_with_ISRs_disabled, |
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| 206 | 0, |
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| 207 | sizeof(Context_Control) |
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| 208 | ); |
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| 209 | |
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[637df35] | 210 | _CPU_ISR_Set_level( 0 ); |
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[3652ad35] | 211 | _CPU_Context_switch( |
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[d196e48] | 212 | (Context_Control *) &_CPU_Context_Default_with_ISRs_enabled, |
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| 213 | (Context_Control *) &_CPU_Context_Default_with_ISRs_enabled |
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[637df35] | 214 | ); |
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[d1193c7] | 215 | |
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[637df35] | 216 | _CPU_ISR_Set_level( 1 ); |
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[3652ad35] | 217 | _CPU_Context_switch( |
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[d196e48] | 218 | (Context_Control *) &_CPU_Context_Default_with_ISRs_disabled, |
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| 219 | (Context_Control *) &_CPU_Context_Default_with_ISRs_disabled |
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[637df35] | 220 | ); |
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| 221 | } |
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| 222 | |
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[3a4ae6c] | 223 | /*PAGE |
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| 224 | * |
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| 225 | * _CPU_ISR_Get_level |
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| 226 | */ |
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| 227 | |
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| 228 | unsigned32 _CPU_ISR_Get_level( void ) |
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| 229 | { |
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[d196e48] | 230 | sigset_t old_mask; |
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[d1193c7] | 231 | |
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[d196e48] | 232 | sigprocmask(SIG_BLOCK, 0, &old_mask); |
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[d1193c7] | 233 | |
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[d196e48] | 234 | if (memcmp((void *)&posix_empty_mask, (void *)&old_mask, sizeof(sigset_t))) |
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| 235 | return 1; |
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[d1193c7] | 236 | |
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[d196e48] | 237 | return 0; |
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[3a4ae6c] | 238 | } |
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| 239 | |
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[ac7d5ef0] | 240 | /* _CPU_Initialize |
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| 241 | * |
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| 242 | * This routine performs processor dependent initialization. |
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| 243 | * |
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| 244 | * INPUT PARAMETERS: |
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| 245 | * cpu_table - CPU table to initialize |
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| 246 | * thread_dispatch - address of disptaching routine |
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| 247 | */ |
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| 248 | |
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| 249 | |
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| 250 | void _CPU_Initialize( |
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| 251 | rtems_cpu_table *cpu_table, |
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[3a4ae6c] | 252 | void (*thread_dispatch) /* ignored on this CPU */ |
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[ac7d5ef0] | 253 | ) |
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| 254 | { |
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| 255 | /* |
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| 256 | * The thread_dispatch argument is the address of the entry point |
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| 257 | * for the routine called at the end of an ISR once it has been |
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| 258 | * decided a context switch is necessary. On some compilation |
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| 259 | * systems it is difficult to call a high-level language routine |
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| 260 | * from assembly. This allows us to trick these systems. |
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| 261 | * |
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| 262 | * If you encounter this problem save the entry point in a CPU |
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| 263 | * dependent variable. |
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| 264 | */ |
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| 265 | |
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| 266 | _CPU_Thread_dispatch_pointer = thread_dispatch; |
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| 267 | |
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| 268 | /* |
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| 269 | * XXX; If there is not an easy way to initialize the FP context |
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| 270 | * during Context_Initialize, then it is usually easier to |
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| 271 | * save an "uninitialized" FP context here and copy it to |
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| 272 | * the task's during Context_Initialize. |
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| 273 | */ |
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| 274 | |
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| 275 | /* XXX: FP context initialization support */ |
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| 276 | |
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| 277 | _CPU_Table = *cpu_table; |
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| 278 | |
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[637df35] | 279 | _CPU_ISR_From_CPU_Init(); |
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[ac7d5ef0] | 280 | |
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[637df35] | 281 | _CPU_Context_From_CPU_Init(); |
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[ac7d5ef0] | 282 | |
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[637df35] | 283 | } |
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[ac7d5ef0] | 284 | |
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[637df35] | 285 | /*PAGE |
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| 286 | * |
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| 287 | * _CPU_ISR_install_raw_handler |
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| 288 | */ |
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[ac7d5ef0] | 289 | |
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[637df35] | 290 | void _CPU_ISR_install_raw_handler( |
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| 291 | unsigned32 vector, |
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| 292 | proc_ptr new_handler, |
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| 293 | proc_ptr *old_handler |
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| 294 | ) |
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| 295 | { |
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| 296 | _CPU_Fatal_halt( 0xdeaddead ); |
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[ac7d5ef0] | 297 | } |
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| 298 | |
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[637df35] | 299 | /*PAGE |
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| 300 | * |
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| 301 | * _CPU_ISR_install_vector |
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[ac7d5ef0] | 302 | * |
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| 303 | * This kernel routine installs the RTEMS handler for the |
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| 304 | * specified vector. |
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| 305 | * |
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| 306 | * Input parameters: |
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| 307 | * vector - interrupt vector number |
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| 308 | * old_handler - former ISR for this vector number |
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| 309 | * new_handler - replacement ISR for this vector number |
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| 310 | * |
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| 311 | * Output parameters: NONE |
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| 312 | * |
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| 313 | */ |
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| 314 | |
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| 315 | |
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| 316 | void _CPU_ISR_install_vector( |
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| 317 | unsigned32 vector, |
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| 318 | proc_ptr new_handler, |
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| 319 | proc_ptr *old_handler |
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| 320 | ) |
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| 321 | { |
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| 322 | *old_handler = _ISR_Vector_table[ vector ]; |
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| 323 | |
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| 324 | /* |
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| 325 | * If the interrupt vector table is a table of pointer to isr entry |
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| 326 | * points, then we need to install the appropriate RTEMS interrupt |
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| 327 | * handler for this vector number. |
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| 328 | */ |
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| 329 | |
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| 330 | /* |
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| 331 | * We put the actual user ISR address in '_ISR_vector_table'. This will |
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[637df35] | 332 | * be used by the _CPU_ISR_Handler so the user gets control. |
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[ac7d5ef0] | 333 | */ |
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| 334 | |
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| 335 | _ISR_Vector_table[ vector ] = new_handler; |
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| 336 | } |
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| 337 | |
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| 338 | /*PAGE |
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| 339 | * |
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| 340 | * _CPU_Install_interrupt_stack |
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| 341 | */ |
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| 342 | |
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| 343 | void _CPU_Install_interrupt_stack( void ) |
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| 344 | { |
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| 345 | } |
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| 346 | |
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| 347 | /*PAGE |
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| 348 | * |
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[75f09e5] | 349 | * _CPU_Thread_Idle_body |
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[ac7d5ef0] | 350 | * |
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[d1193c7] | 351 | * Stop until we get a signal which is the logically the same thing |
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[9700578] | 352 | * entering low-power or sleep mode on a real processor and waiting for |
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| 353 | * an interrupt. This significantly reduces the consumption of host |
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| 354 | * CPU cycles which is again similar to low power mode. |
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[ac7d5ef0] | 355 | */ |
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| 356 | |
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[75f09e5] | 357 | void _CPU_Thread_Idle_body( void ) |
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[ac7d5ef0] | 358 | { |
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[d196e48] | 359 | while (1) { |
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| 360 | #ifdef RTEMS_DEBUG |
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| 361 | /* interrupts had better be enabled at this point! */ |
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| 362 | if (_CPU_ISR_Get_level() != 0) |
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| 363 | abort(); |
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| 364 | #endif |
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[637df35] | 365 | pause(); |
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[d196e48] | 366 | } |
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| 367 | |
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[ac7d5ef0] | 368 | } |
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| 369 | |
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[637df35] | 370 | /*PAGE |
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[d1193c7] | 371 | * |
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[637df35] | 372 | * _CPU_Context_Initialize |
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| 373 | */ |
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| 374 | |
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[ac7d5ef0] | 375 | void _CPU_Context_Initialize( |
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| 376 | Context_Control *_the_context, |
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| 377 | unsigned32 *_stack_base, |
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| 378 | unsigned32 _size, |
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| 379 | unsigned32 _new_level, |
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[9700578] | 380 | void *_entry_point, |
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| 381 | boolean _is_fp |
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[ac7d5ef0] | 382 | ) |
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| 383 | { |
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[637df35] | 384 | unsigned32 *addr; |
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| 385 | unsigned32 jmp_addr; |
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| 386 | unsigned32 _stack_low; /* lowest "stack aligned" address */ |
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| 387 | unsigned32 _stack_high; /* highest "stack aligned" address */ |
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| 388 | unsigned32 _the_size; |
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[ac7d5ef0] | 389 | |
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[637df35] | 390 | jmp_addr = (unsigned32) _entry_point; |
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[ac7d5ef0] | 391 | |
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[637df35] | 392 | /* |
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| 393 | * On CPUs with stacks which grow down, we build the stack |
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[d1193c7] | 394 | * based on the _stack_high address. On CPUs with stacks which |
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| 395 | * grow up, we build the stack based on the _stack_low address. |
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[637df35] | 396 | */ |
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[88d594a] | 397 | |
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[cc4c1fe4] | 398 | _stack_low = (unsigned32)(_stack_base) + CPU_STACK_ALIGNMENT - 1; |
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[637df35] | 399 | _stack_low &= ~(CPU_STACK_ALIGNMENT - 1); |
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[88d594a] | 400 | |
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[cc4c1fe4] | 401 | _stack_high = (unsigned32)(_stack_base) + _size; |
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[637df35] | 402 | _stack_high &= ~(CPU_STACK_ALIGNMENT - 1); |
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[ac7d5ef0] | 403 | |
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[cc4c1fe4] | 404 | if (_stack_high > _stack_low) |
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| 405 | _the_size = _stack_high - _stack_low; |
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| 406 | else |
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| 407 | _the_size = _stack_low - _stack_high; |
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[ac7d5ef0] | 408 | |
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[637df35] | 409 | /* |
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| 410 | * Slam our jmp_buf template into the context we are creating |
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| 411 | */ |
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[ac7d5ef0] | 412 | |
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[637df35] | 413 | if ( _new_level == 0 ) |
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[d196e48] | 414 | *_the_context = *(Context_Control *) |
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| 415 | &_CPU_Context_Default_with_ISRs_enabled; |
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[637df35] | 416 | else |
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[d196e48] | 417 | *_the_context = *(Context_Control *) |
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| 418 | &_CPU_Context_Default_with_ISRs_disabled; |
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[d1193c7] | 419 | |
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[637df35] | 420 | addr = (unsigned32 *)_the_context; |
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[ac7d5ef0] | 421 | |
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| 422 | #if defined(hppa1_1) |
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[637df35] | 423 | *(addr + RP_OFF) = jmp_addr; |
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| 424 | *(addr + SP_OFF) = (unsigned32)(_stack_low + CPU_FRAME_SIZE); |
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[ac7d5ef0] | 425 | |
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[637df35] | 426 | /* |
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| 427 | * See if we are using shared libraries by checking |
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| 428 | * bit 30 in 24 off of newp. If bit 30 is set then |
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| 429 | * we are using shared libraries and the jump address |
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[cc4c1fe4] | 430 | * points to the pointer, so we put that into rp instead. |
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[637df35] | 431 | */ |
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[ac7d5ef0] | 432 | |
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[637df35] | 433 | if (jmp_addr & 0x40000000) { |
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| 434 | jmp_addr &= 0xfffffffc; |
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[cc4c1fe4] | 435 | *(addr + RP_OFF) = *(unsigned32 *)jmp_addr; |
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[637df35] | 436 | } |
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[ac7d5ef0] | 437 | #elif defined(sparc) |
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| 438 | |
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[637df35] | 439 | /* |
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| 440 | * See /usr/include/sys/stack.h in Solaris 2.3 for a nice |
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| 441 | * diagram of the stack. |
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| 442 | */ |
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[ac7d5ef0] | 443 | |
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[637df35] | 444 | asm ("ta 0x03"); /* flush registers */ |
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[ac7d5ef0] | 445 | |
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[637df35] | 446 | *(addr + RP_OFF) = jmp_addr + ADDR_ADJ_OFFSET; |
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| 447 | *(addr + SP_OFF) = (unsigned32)(_stack_high - CPU_FRAME_SIZE); |
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| 448 | *(addr + FP_OFF) = (unsigned32)(_stack_high); |
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[8044533] | 449 | |
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| 450 | #elif defined(i386) |
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[d1193c7] | 451 | |
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[8044533] | 452 | /* |
---|
| 453 | * This information was gathered by disassembling setjmp(). |
---|
| 454 | */ |
---|
[10aed1e3] | 455 | |
---|
| 456 | { |
---|
| 457 | unsigned32 stack_ptr; |
---|
| 458 | |
---|
| 459 | stack_ptr = _stack_high - CPU_FRAME_SIZE; |
---|
| 460 | |
---|
| 461 | *(addr + EBX_OFF) = 0xFEEDFEED; |
---|
| 462 | *(addr + ESI_OFF) = 0xDEADDEAD; |
---|
| 463 | *(addr + EDI_OFF) = 0xDEAFDEAF; |
---|
| 464 | *(addr + EBP_OFF) = stack_ptr; |
---|
| 465 | *(addr + ESP_OFF) = stack_ptr; |
---|
| 466 | *(addr + RET_OFF) = jmp_addr; |
---|
[d1193c7] | 467 | |
---|
[10aed1e3] | 468 | addr = (unsigned32 *) stack_ptr; |
---|
[d1193c7] | 469 | |
---|
[10aed1e3] | 470 | addr[ 0 ] = jmp_addr; |
---|
| 471 | addr[ 1 ] = (unsigned32) stack_ptr; |
---|
| 472 | addr[ 2 ] = (unsigned32) stack_ptr; |
---|
| 473 | } |
---|
[8044533] | 474 | |
---|
[ac7d5ef0] | 475 | #else |
---|
| 476 | #error "UNKNOWN CPU!!!" |
---|
| 477 | #endif |
---|
| 478 | |
---|
| 479 | } |
---|
| 480 | |
---|
[637df35] | 481 | /*PAGE |
---|
| 482 | * |
---|
| 483 | * _CPU_Context_restore |
---|
| 484 | */ |
---|
| 485 | |
---|
[ac7d5ef0] | 486 | void _CPU_Context_restore( |
---|
| 487 | Context_Control *next |
---|
| 488 | ) |
---|
| 489 | { |
---|
[37f4c2d] | 490 | Context_Control_overlay *nextp = (Context_Control_overlay *)next; |
---|
| 491 | |
---|
[d196e48] | 492 | _CPU_ISR_Enable(nextp->isr_level); |
---|
[37f4c2d] | 493 | longjmp( nextp->regs, 0 ); |
---|
[ac7d5ef0] | 494 | } |
---|
| 495 | |
---|
[637df35] | 496 | /*PAGE |
---|
| 497 | * |
---|
| 498 | * _CPU_Context_switch |
---|
| 499 | */ |
---|
| 500 | |
---|
[d196e48] | 501 | static void do_jump( |
---|
| 502 | Context_Control_overlay *currentp, |
---|
| 503 | Context_Control_overlay *nextp |
---|
| 504 | ); |
---|
| 505 | |
---|
[ac7d5ef0] | 506 | void _CPU_Context_switch( |
---|
| 507 | Context_Control *current, |
---|
| 508 | Context_Control *next |
---|
| 509 | ) |
---|
| 510 | { |
---|
[37f4c2d] | 511 | Context_Control_overlay *currentp = (Context_Control_overlay *)current; |
---|
| 512 | Context_Control_overlay *nextp = (Context_Control_overlay *)next; |
---|
[d196e48] | 513 | #if 0 |
---|
[3652ad35] | 514 | int status; |
---|
[d196e48] | 515 | #endif |
---|
[d1193c7] | 516 | |
---|
[d196e48] | 517 | currentp->isr_level = _CPU_ISR_Disable_support(); |
---|
[d1193c7] | 518 | |
---|
[d196e48] | 519 | do_jump( currentp, nextp ); |
---|
[3652ad35] | 520 | |
---|
[d196e48] | 521 | #if 0 |
---|
| 522 | if (sigsetjmp(currentp->regs, 1) == 0) { /* Save the current context */ |
---|
| 523 | siglongjmp(nextp->regs, 0); /* Switch to the new context */ |
---|
| 524 | _Internal_error_Occurred( |
---|
| 525 | INTERNAL_ERROR_CORE, |
---|
| 526 | TRUE, |
---|
| 527 | status |
---|
| 528 | ); |
---|
| 529 | } |
---|
| 530 | #endif |
---|
[d1193c7] | 531 | |
---|
[d196e48] | 532 | #ifdef RTEMS_DEBUG |
---|
| 533 | if (_CPU_ISR_Get_level() == 0) |
---|
| 534 | abort(); |
---|
| 535 | #endif |
---|
[d1193c7] | 536 | |
---|
[d196e48] | 537 | _CPU_ISR_Enable(currentp->isr_level); |
---|
| 538 | } |
---|
[d1193c7] | 539 | |
---|
| 540 | static void do_jump( |
---|
[d196e48] | 541 | Context_Control_overlay *currentp, |
---|
[d1193c7] | 542 | Context_Control_overlay *nextp |
---|
[d196e48] | 543 | ) |
---|
| 544 | { |
---|
| 545 | int status; |
---|
[ac7d5ef0] | 546 | |
---|
[37f4c2d] | 547 | if (setjmp(currentp->regs) == 0) { /* Save the current context */ |
---|
| 548 | longjmp(nextp->regs, 0); /* Switch to the new context */ |
---|
[d196e48] | 549 | _Internal_error_Occurred( |
---|
[3652ad35] | 550 | INTERNAL_ERROR_CORE, |
---|
| 551 | TRUE, |
---|
| 552 | status |
---|
| 553 | ); |
---|
[637df35] | 554 | } |
---|
[ac7d5ef0] | 555 | } |
---|
[d196e48] | 556 | |
---|
[637df35] | 557 | /*PAGE |
---|
| 558 | * |
---|
| 559 | * _CPU_Save_float_context |
---|
| 560 | */ |
---|
[ac7d5ef0] | 561 | |
---|
| 562 | void _CPU_Save_float_context( |
---|
| 563 | Context_Control_fp *fp_context |
---|
| 564 | ) |
---|
| 565 | { |
---|
| 566 | } |
---|
| 567 | |
---|
[637df35] | 568 | /*PAGE |
---|
| 569 | * |
---|
| 570 | * _CPU_Restore_float_context |
---|
| 571 | */ |
---|
| 572 | |
---|
[ac7d5ef0] | 573 | void _CPU_Restore_float_context( |
---|
| 574 | Context_Control_fp *fp_context |
---|
| 575 | ) |
---|
| 576 | { |
---|
| 577 | } |
---|
| 578 | |
---|
[637df35] | 579 | /*PAGE |
---|
| 580 | * |
---|
| 581 | * _CPU_ISR_Disable_support |
---|
| 582 | */ |
---|
[ac7d5ef0] | 583 | |
---|
[637df35] | 584 | unsigned32 _CPU_ISR_Disable_support(void) |
---|
[ac7d5ef0] | 585 | { |
---|
[3652ad35] | 586 | int status; |
---|
[637df35] | 587 | sigset_t old_mask; |
---|
[ac7d5ef0] | 588 | |
---|
[3652ad35] | 589 | status = sigprocmask(SIG_BLOCK, &_CPU_Signal_mask, &old_mask); |
---|
| 590 | if ( status ) |
---|
| 591 | _Internal_error_Occurred( |
---|
| 592 | INTERNAL_ERROR_CORE, |
---|
| 593 | TRUE, |
---|
| 594 | status |
---|
| 595 | ); |
---|
[ac7d5ef0] | 596 | |
---|
[3652ad35] | 597 | if (memcmp((void *)&posix_empty_mask, (void *)&old_mask, sizeof(sigset_t))) |
---|
[637df35] | 598 | return 1; |
---|
[ac7d5ef0] | 599 | |
---|
[637df35] | 600 | return 0; |
---|
[ac7d5ef0] | 601 | } |
---|
| 602 | |
---|
[637df35] | 603 | /*PAGE |
---|
| 604 | * |
---|
| 605 | * _CPU_ISR_Enable |
---|
| 606 | */ |
---|
[ac7d5ef0] | 607 | |
---|
[637df35] | 608 | void _CPU_ISR_Enable( |
---|
| 609 | unsigned32 level |
---|
| 610 | ) |
---|
[ac7d5ef0] | 611 | { |
---|
[3652ad35] | 612 | int status; |
---|
| 613 | |
---|
[637df35] | 614 | if (level == 0) |
---|
[3652ad35] | 615 | status = sigprocmask(SIG_UNBLOCK, &_CPU_Signal_mask, 0); |
---|
[637df35] | 616 | else |
---|
[3652ad35] | 617 | status = sigprocmask(SIG_BLOCK, &_CPU_Signal_mask, 0); |
---|
| 618 | |
---|
| 619 | if ( status ) |
---|
| 620 | _Internal_error_Occurred( |
---|
| 621 | INTERNAL_ERROR_CORE, |
---|
| 622 | TRUE, |
---|
| 623 | status |
---|
| 624 | ); |
---|
[ac7d5ef0] | 625 | } |
---|
| 626 | |
---|
[637df35] | 627 | /*PAGE |
---|
[ac7d5ef0] | 628 | * |
---|
[637df35] | 629 | * _CPU_ISR_Handler |
---|
| 630 | * |
---|
| 631 | * External interrupt handler. |
---|
| 632 | * This is installed as a UNIX signal handler. |
---|
| 633 | * It vectors out to specific user interrupt handlers. |
---|
[ac7d5ef0] | 634 | */ |
---|
| 635 | |
---|
[637df35] | 636 | void _CPU_ISR_Handler(int vector) |
---|
[ac7d5ef0] | 637 | { |
---|
[637df35] | 638 | extern void _Thread_Dispatch(void); |
---|
| 639 | extern unsigned32 _Thread_Dispatch_disable_level; |
---|
| 640 | extern boolean _Context_Switch_necessary; |
---|
[ac7d5ef0] | 641 | |
---|
[637df35] | 642 | if (_ISR_Nest_level++ == 0) { |
---|
| 643 | /* switch to interrupt stack */ |
---|
| 644 | } |
---|
[ac7d5ef0] | 645 | |
---|
[637df35] | 646 | _Thread_Dispatch_disable_level++; |
---|
[ac7d5ef0] | 647 | |
---|
[637df35] | 648 | if (_ISR_Vector_table[vector]) { |
---|
| 649 | _ISR_Vector_table[vector](vector); |
---|
| 650 | } else { |
---|
| 651 | _CPU_Stray_signal(vector); |
---|
| 652 | } |
---|
[ac7d5ef0] | 653 | |
---|
[637df35] | 654 | if (_ISR_Nest_level-- == 0) { |
---|
| 655 | /* switch back to original stack */ |
---|
| 656 | } |
---|
[ac7d5ef0] | 657 | |
---|
[637df35] | 658 | _Thread_Dispatch_disable_level--; |
---|
[ac7d5ef0] | 659 | |
---|
[637df35] | 660 | if (_Thread_Dispatch_disable_level == 0 && |
---|
| 661 | (_Context_Switch_necessary || _ISR_Signals_to_thread_executing)) { |
---|
[8a38f3b] | 662 | _ISR_Signals_to_thread_executing = FALSE; |
---|
[637df35] | 663 | _CPU_ISR_Enable(0); |
---|
| 664 | _Thread_Dispatch(); |
---|
| 665 | } |
---|
[ac7d5ef0] | 666 | } |
---|
| 667 | |
---|
[637df35] | 668 | /*PAGE |
---|
| 669 | * |
---|
| 670 | * _CPU_Stray_signal |
---|
| 671 | */ |
---|
[ac7d5ef0] | 672 | |
---|
[637df35] | 673 | void _CPU_Stray_signal(int sig_num) |
---|
[ac7d5ef0] | 674 | { |
---|
[c64e4ed4] | 675 | char buffer[ 4 ]; |
---|
[d1193c7] | 676 | |
---|
[c64e4ed4] | 677 | /* |
---|
| 678 | * print "stray" msg about ones which that might mean something |
---|
| 679 | * Avoid using the stdio section of the library. |
---|
| 680 | * The following is generally safe. |
---|
[637df35] | 681 | */ |
---|
[d1193c7] | 682 | |
---|
[c64e4ed4] | 683 | switch (sig_num) |
---|
| 684 | { |
---|
| 685 | case SIGCLD: |
---|
| 686 | break; |
---|
[d1193c7] | 687 | |
---|
[c64e4ed4] | 688 | default: |
---|
| 689 | { |
---|
[cc4c1fe4] | 690 | /* |
---|
| 691 | * We avoid using the stdio section of the library. |
---|
| 692 | * The following is generally safe |
---|
| 693 | */ |
---|
[d1193c7] | 694 | |
---|
[cc4c1fe4] | 695 | int digit; |
---|
| 696 | int number = sig_num; |
---|
| 697 | int len = 0; |
---|
| 698 | |
---|
| 699 | digit = number / 100; |
---|
| 700 | number %= 100; |
---|
| 701 | if (digit) buffer[len++] = '0' + digit; |
---|
| 702 | |
---|
| 703 | digit = number / 10; |
---|
| 704 | number %= 10; |
---|
| 705 | if (digit || len) buffer[len++] = '0' + digit; |
---|
| 706 | |
---|
| 707 | digit = number; |
---|
| 708 | buffer[len++] = '0' + digit; |
---|
[d1193c7] | 709 | |
---|
[cc4c1fe4] | 710 | buffer[ len++ ] = '\n'; |
---|
[d1193c7] | 711 | |
---|
[cc4c1fe4] | 712 | write( 2, "Stray signal ", 13 ); |
---|
| 713 | write( 2, buffer, len ); |
---|
| 714 | |
---|
[c64e4ed4] | 715 | } |
---|
| 716 | } |
---|
[d1193c7] | 717 | |
---|
[637df35] | 718 | /* |
---|
| 719 | * If it was a "fatal" signal, then exit here |
---|
| 720 | * If app code has installed a hander for one of these, then |
---|
| 721 | * we won't call _CPU_Stray_signal, so this is ok. |
---|
| 722 | */ |
---|
[d1193c7] | 723 | |
---|
[637df35] | 724 | switch (sig_num) { |
---|
| 725 | case SIGINT: |
---|
| 726 | case SIGHUP: |
---|
| 727 | case SIGQUIT: |
---|
| 728 | case SIGILL: |
---|
[10aed1e3] | 729 | #ifdef SIGEMT |
---|
[637df35] | 730 | case SIGEMT: |
---|
[10aed1e3] | 731 | #endif |
---|
[637df35] | 732 | case SIGKILL: |
---|
| 733 | case SIGBUS: |
---|
| 734 | case SIGSEGV: |
---|
| 735 | case SIGTERM: |
---|
[d196e48] | 736 | case SIGIOT: |
---|
[cc4c1fe4] | 737 | _CPU_Fatal_error(0x100 + sig_num); |
---|
[637df35] | 738 | } |
---|
[ac7d5ef0] | 739 | } |
---|
| 740 | |
---|
[637df35] | 741 | /*PAGE |
---|
| 742 | * |
---|
| 743 | * _CPU_Fatal_error |
---|
| 744 | */ |
---|
[ac7d5ef0] | 745 | |
---|
[637df35] | 746 | void _CPU_Fatal_error(unsigned32 error) |
---|
[ac7d5ef0] | 747 | { |
---|
[637df35] | 748 | setitimer(ITIMER_REAL, 0, 0); |
---|
[ac7d5ef0] | 749 | |
---|
[e7e016f] | 750 | if ( error ) { |
---|
| 751 | #ifdef RTEMS_DEBUG |
---|
| 752 | abort(); |
---|
| 753 | #endif |
---|
| 754 | if (getenv("RTEMS_DEBUG")) |
---|
| 755 | abort(); |
---|
| 756 | } |
---|
| 757 | |
---|
[637df35] | 758 | _exit(error); |
---|
[ac7d5ef0] | 759 | } |
---|
| 760 | |
---|
[37f4c2d] | 761 | /* |
---|
| 762 | * Special Purpose Routines to hide the use of UNIX system calls. |
---|
| 763 | */ |
---|
| 764 | |
---|
| 765 | int _CPU_Get_clock_vector( void ) |
---|
| 766 | { |
---|
| 767 | return SIGALRM; |
---|
| 768 | } |
---|
| 769 | |
---|
[d1193c7] | 770 | void _CPU_Start_clock( |
---|
[37f4c2d] | 771 | int microseconds |
---|
| 772 | ) |
---|
| 773 | { |
---|
| 774 | struct itimerval new; |
---|
| 775 | |
---|
| 776 | new.it_value.tv_sec = 0; |
---|
| 777 | new.it_value.tv_usec = microseconds; |
---|
| 778 | new.it_interval.tv_sec = 0; |
---|
| 779 | new.it_interval.tv_usec = microseconds; |
---|
| 780 | |
---|
| 781 | setitimer(ITIMER_REAL, &new, 0); |
---|
| 782 | } |
---|
| 783 | |
---|
| 784 | void _CPU_Stop_clock( void ) |
---|
| 785 | { |
---|
| 786 | struct itimerval new; |
---|
| 787 | struct sigaction act; |
---|
[d1193c7] | 788 | |
---|
[37f4c2d] | 789 | /* |
---|
| 790 | * Set the SIGALRM signal to ignore any last |
---|
| 791 | * signals that might come in while we are |
---|
| 792 | * disarming the timer and removing the interrupt |
---|
| 793 | * vector. |
---|
| 794 | */ |
---|
[d1193c7] | 795 | |
---|
[cc4c1fe4] | 796 | (void) memset(&act, 0, sizeof(act)); |
---|
[37f4c2d] | 797 | act.sa_handler = SIG_IGN; |
---|
[d1193c7] | 798 | |
---|
[cc4c1fe4] | 799 | sigaction(SIGALRM, &act, 0); |
---|
[d1193c7] | 800 | |
---|
[cc4c1fe4] | 801 | (void) memset(&new, 0, sizeof(new)); |
---|
[37f4c2d] | 802 | setitimer(ITIMER_REAL, &new, 0); |
---|
| 803 | } |
---|
| 804 | |
---|
| 805 | int _CPU_SHM_Semid; |
---|
| 806 | extern void fix_syscall_errno( void ); |
---|
| 807 | |
---|
[d1193c7] | 808 | void _CPU_SHM_Init( |
---|
[37f4c2d] | 809 | unsigned32 maximum_nodes, |
---|
| 810 | boolean is_master_node, |
---|
| 811 | void **shm_address, |
---|
| 812 | unsigned32 *shm_length |
---|
| 813 | ) |
---|
| 814 | { |
---|
| 815 | int i; |
---|
| 816 | int shmid; |
---|
| 817 | char *shm_addr; |
---|
| 818 | key_t shm_key; |
---|
| 819 | key_t sem_key; |
---|
| 820 | int status; |
---|
| 821 | int shm_size; |
---|
[d1193c7] | 822 | |
---|
[37f4c2d] | 823 | if (getenv("RTEMS_SHM_KEY")) |
---|
| 824 | shm_key = strtol(getenv("RTEMS_SHM_KEY"), 0, 0); |
---|
| 825 | else |
---|
| 826 | #ifdef RTEMS_SHM_KEY |
---|
| 827 | shm_key = RTEMS_SHM_KEY; |
---|
| 828 | #else |
---|
| 829 | shm_key = 0xa000; |
---|
| 830 | #endif |
---|
[d1193c7] | 831 | |
---|
[37f4c2d] | 832 | if (getenv("RTEMS_SHM_SIZE")) |
---|
| 833 | shm_size = strtol(getenv("RTEMS_SHM_SIZE"), 0, 0); |
---|
| 834 | else |
---|
| 835 | #ifdef RTEMS_SHM_SIZE |
---|
| 836 | shm_size = RTEMS_SHM_SIZE; |
---|
| 837 | #else |
---|
| 838 | shm_size = 64 * 1024; |
---|
| 839 | #endif |
---|
[d1193c7] | 840 | |
---|
[37f4c2d] | 841 | if (getenv("RTEMS_SHM_SEMAPHORE_KEY")) |
---|
| 842 | sem_key = strtol(getenv("RTEMS_SHM_SEMAPHORE_KEY"), 0, 0); |
---|
| 843 | else |
---|
| 844 | #ifdef RTEMS_SHM_SEMAPHORE_KEY |
---|
| 845 | sem_key = RTEMS_SHM_SEMAPHORE_KEY; |
---|
| 846 | #else |
---|
| 847 | sem_key = 0xa001; |
---|
| 848 | #endif |
---|
[d1193c7] | 849 | |
---|
[37f4c2d] | 850 | shmid = shmget(shm_key, shm_size, IPC_CREAT | 0660); |
---|
| 851 | if ( shmid == -1 ) { |
---|
| 852 | fix_syscall_errno(); /* in case of newlib */ |
---|
| 853 | perror( "shmget" ); |
---|
| 854 | _CPU_Fatal_halt( 0xdead0001 ); |
---|
| 855 | } |
---|
[d1193c7] | 856 | |
---|
[37f4c2d] | 857 | shm_addr = shmat(shmid, (char *)0, SHM_RND); |
---|
| 858 | if ( shm_addr == (void *)-1 ) { |
---|
| 859 | fix_syscall_errno(); /* in case of newlib */ |
---|
| 860 | perror( "shmat" ); |
---|
| 861 | _CPU_Fatal_halt( 0xdead0002 ); |
---|
| 862 | } |
---|
[d1193c7] | 863 | |
---|
[37f4c2d] | 864 | _CPU_SHM_Semid = semget(sem_key, maximum_nodes + 1, IPC_CREAT | 0660); |
---|
| 865 | if ( _CPU_SHM_Semid == -1 ) { |
---|
| 866 | fix_syscall_errno(); /* in case of newlib */ |
---|
| 867 | perror( "semget" ); |
---|
| 868 | _CPU_Fatal_halt( 0xdead0003 ); |
---|
| 869 | } |
---|
[d1193c7] | 870 | |
---|
[37f4c2d] | 871 | if ( is_master_node ) { |
---|
| 872 | for ( i=0 ; i <= maximum_nodes ; i++ ) { |
---|
| 873 | #if defined(solaris2) |
---|
| 874 | union semun { |
---|
| 875 | int val; |
---|
| 876 | struct semid_ds *buf; |
---|
| 877 | ushort *array; |
---|
| 878 | } help; |
---|
[d1193c7] | 879 | |
---|
[37f4c2d] | 880 | help.val = 1; |
---|
| 881 | status = semctl( _CPU_SHM_Semid, i, SETVAL, help ); |
---|
| 882 | #endif |
---|
| 883 | #if defined(hpux) |
---|
| 884 | status = semctl( _CPU_SHM_Semid, i, SETVAL, 1 ); |
---|
| 885 | #endif |
---|
[d1193c7] | 886 | |
---|
[37f4c2d] | 887 | fix_syscall_errno(); /* in case of newlib */ |
---|
| 888 | if ( status == -1 ) { |
---|
| 889 | _CPU_Fatal_halt( 0xdead0004 ); |
---|
| 890 | } |
---|
| 891 | } |
---|
| 892 | } |
---|
[d1193c7] | 893 | |
---|
[37f4c2d] | 894 | *shm_address = shm_addr; |
---|
| 895 | *shm_length = shm_size; |
---|
| 896 | |
---|
| 897 | } |
---|
| 898 | |
---|
| 899 | int _CPU_Get_pid( void ) |
---|
| 900 | { |
---|
| 901 | return getpid(); |
---|
| 902 | } |
---|
| 903 | |
---|
| 904 | /* |
---|
| 905 | * Define this to use signals for MPCI shared memory driver. |
---|
| 906 | * If undefined, the shared memory driver will poll from the |
---|
| 907 | * clock interrupt. |
---|
| 908 | * Ref: ../shmsupp/getcfg.c |
---|
| 909 | * |
---|
| 910 | * BEWARE:: many UN*X kernels and debuggers become severely confused when |
---|
| 911 | * debugging programs which use signals. The problem is *much* |
---|
| 912 | * worse when using multiple signals, since ptrace(2) tends to |
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| 913 | * drop all signals except 1 in the case of multiples. |
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| 914 | * On hpux9, this problem was so bad, we couldn't use interrupts |
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| 915 | * with the shared memory driver if we ever hoped to debug |
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| 916 | * RTEMS programs. |
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| 917 | * Maybe systems that use /proc don't have this problem... |
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| 918 | */ |
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[d1193c7] | 919 | |
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| 920 | |
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[37f4c2d] | 921 | int _CPU_SHM_Get_vector( void ) |
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| 922 | { |
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| 923 | #ifdef CPU_USE_SHM_INTERRUPTS |
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| 924 | return SIGUSR1; |
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| 925 | #else |
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| 926 | return 0; |
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| 927 | #endif |
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| 928 | } |
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| 929 | |
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| 930 | void _CPU_SHM_Send_interrupt( |
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| 931 | int pid, |
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| 932 | int vector |
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| 933 | ) |
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| 934 | { |
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| 935 | kill((pid_t) pid, vector); |
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| 936 | } |
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| 937 | |
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[d1193c7] | 938 | void _CPU_SHM_Lock( |
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[37f4c2d] | 939 | int semaphore |
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| 940 | ) |
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| 941 | { |
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| 942 | struct sembuf sb; |
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| 943 | int status; |
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[d1193c7] | 944 | |
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[37f4c2d] | 945 | sb.sem_num = semaphore; |
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| 946 | sb.sem_op = -1; |
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| 947 | sb.sem_flg = 0; |
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[d1193c7] | 948 | |
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[37f4c2d] | 949 | while (1) { |
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| 950 | status = semop(_CPU_SHM_Semid, &sb, 1); |
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| 951 | if ( status >= 0 ) |
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| 952 | break; |
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| 953 | if ( status == -1 ) { |
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| 954 | fix_syscall_errno(); /* in case of newlib */ |
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| 955 | if (errno == EINTR) |
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| 956 | continue; |
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| 957 | perror("shm lock"); |
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| 958 | _CPU_Fatal_halt( 0xdead0005 ); |
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| 959 | } |
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| 960 | } |
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| 961 | |
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| 962 | } |
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| 963 | |
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| 964 | void _CPU_SHM_Unlock( |
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| 965 | int semaphore |
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| 966 | ) |
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| 967 | { |
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| 968 | struct sembuf sb; |
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| 969 | int status; |
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[d1193c7] | 970 | |
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[37f4c2d] | 971 | sb.sem_num = semaphore; |
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| 972 | sb.sem_op = 1; |
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| 973 | sb.sem_flg = 0; |
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[d1193c7] | 974 | |
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[37f4c2d] | 975 | while (1) { |
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| 976 | status = semop(_CPU_SHM_Semid, &sb, 1); |
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| 977 | if ( status >= 0 ) |
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| 978 | break; |
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[d1193c7] | 979 | |
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[37f4c2d] | 980 | if ( status == -1 ) { |
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| 981 | fix_syscall_errno(); /* in case of newlib */ |
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| 982 | if (errno == EINTR) |
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| 983 | continue; |
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| 984 | perror("shm unlock"); |
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| 985 | _CPU_Fatal_halt( 0xdead0006 ); |
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| 986 | } |
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| 987 | } |
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| 988 | |
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| 989 | } |
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