[ac7d5ef0] | 1 | /* |
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[3652ad35] | 2 | * UNIX Simulator Dependent Source |
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[ac7d5ef0] | 3 | * |
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| 4 | * |
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| 5 | * To anyone who acknowledges that this file is provided "AS IS" |
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| 6 | * without any express or implied warranty: |
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| 7 | * permission to use, copy, modify, and distribute this file |
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| 8 | * for any purpose is hereby granted without fee, provided that |
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| 9 | * the above copyright notice and this notice appears in all |
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| 10 | * copies, and that the name of Division Incorporated not be |
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| 11 | * used in advertising or publicity pertaining to distribution |
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| 12 | * of the software without specific, written prior permission. |
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| 13 | * Division Incorporated makes no representations about the |
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| 14 | * suitability of this software for any purpose. |
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| 15 | * |
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| 16 | * $Id$ |
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| 17 | */ |
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| 18 | |
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| 19 | #include <rtems/system.h> |
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[5e9b32b] | 20 | #include <rtems/score/isr.h> |
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| 21 | #include <rtems/score/interr.h> |
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[ac7d5ef0] | 22 | |
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[37f4c2d] | 23 | #if defined(solaris2) |
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| 24 | #undef _POSIX_C_SOURCE |
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| 25 | #define _POSIX_C_SOURCE 3 |
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| 26 | #undef __STRICT_ANSI__ |
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| 27 | #define __STRICT_ANSI__ |
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| 28 | #endif |
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| 29 | |
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| 30 | #if defined(linux) |
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| 31 | #define MALLOC_0_RETURNS_NULL |
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| 32 | #endif |
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| 33 | |
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[ac7d5ef0] | 34 | #include <stdio.h> |
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| 35 | #include <stdlib.h> |
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[37f4c2d] | 36 | #include <setjmp.h> |
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[ac7d5ef0] | 37 | #include <signal.h> |
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| 38 | #include <time.h> |
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[10aed1e3] | 39 | #include <sys/time.h> |
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[37f4c2d] | 40 | #include <sys/types.h> |
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| 41 | #include <errno.h> |
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| 42 | #include <unistd.h> |
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| 43 | #include <sys/ipc.h> |
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| 44 | #include <sys/shm.h> |
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| 45 | #include <sys/sem.h> |
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[ac7d5ef0] | 46 | |
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[637df35] | 47 | #ifndef SA_RESTART |
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| 48 | #define SA_RESTART 0 |
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| 49 | #endif |
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[ac7d5ef0] | 50 | |
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[37f4c2d] | 51 | typedef struct { |
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| 52 | jmp_buf regs; |
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| 53 | sigset_t isr_level; |
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| 54 | } Context_Control_overlay; |
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| 55 | |
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[637df35] | 56 | void _CPU_Signal_initialize(void); |
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| 57 | void _CPU_Stray_signal(int); |
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| 58 | void _CPU_ISR_Handler(int); |
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[ac7d5ef0] | 59 | |
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[637df35] | 60 | sigset_t _CPU_Signal_mask; |
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| 61 | Context_Control _CPU_Context_Default_with_ISRs_enabled; |
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| 62 | Context_Control _CPU_Context_Default_with_ISRs_disabled; |
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[ac7d5ef0] | 63 | |
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| 64 | /* |
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| 65 | * Which cpu are we? Used by libcpu and libbsp. |
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| 66 | */ |
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| 67 | |
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| 68 | int cpu_number; |
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| 69 | |
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[637df35] | 70 | /*PAGE |
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| 71 | * |
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| 72 | * _CPU_ISR_From_CPU_Init |
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| 73 | */ |
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| 74 | |
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[e7e016f] | 75 | sigset_t posix_empty_mask; |
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| 76 | |
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[637df35] | 77 | void _CPU_ISR_From_CPU_Init() |
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| 78 | { |
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| 79 | unsigned32 i; |
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| 80 | proc_ptr old_handler; |
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| 81 | |
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[e7e016f] | 82 | /* |
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| 83 | * Generate an empty mask to be used by disable_support |
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| 84 | */ |
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[637df35] | 85 | |
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[e7e016f] | 86 | sigemptyset(&posix_empty_mask); |
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| 87 | |
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[637df35] | 88 | /* |
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| 89 | * Block all the signals except SIGTRAP for the debugger |
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| 90 | * and SIGABRT for fatal errors. |
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| 91 | */ |
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| 92 | |
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| 93 | (void) sigfillset(&_CPU_Signal_mask); |
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| 94 | (void) sigdelset(&_CPU_Signal_mask, SIGTRAP); |
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| 95 | (void) sigdelset(&_CPU_Signal_mask, SIGABRT); |
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| 96 | (void) sigdelset(&_CPU_Signal_mask, SIGIOT); |
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| 97 | (void) sigdelset(&_CPU_Signal_mask, SIGCONT); |
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| 98 | |
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[e7e016f] | 99 | _CPU_ISR_Enable(1); |
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[637df35] | 100 | |
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| 101 | /* |
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| 102 | * Set the handler for all signals to be signal_handler |
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| 103 | * which will then vector out to the correct handler |
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| 104 | * for whichever signal actually happened. Initially |
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| 105 | * set the vectors to the stray signal handler. |
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| 106 | */ |
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| 107 | |
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| 108 | for (i = 0; i < CPU_INTERRUPT_NUMBER_OF_VECTORS; i++) |
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| 109 | (void)_CPU_ISR_install_vector(i, _CPU_Stray_signal, &old_handler); |
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| 110 | |
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| 111 | _CPU_Signal_initialize(); |
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| 112 | } |
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| 113 | |
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| 114 | void _CPU_Signal_initialize( void ) |
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| 115 | { |
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| 116 | struct sigaction act; |
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| 117 | sigset_t mask; |
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| 118 | |
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| 119 | /* mark them all active except for TraceTrap and Abort */ |
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| 120 | |
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| 121 | sigfillset(&mask); |
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| 122 | sigdelset(&mask, SIGTRAP); |
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| 123 | sigdelset(&mask, SIGABRT); |
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| 124 | sigdelset(&mask, SIGIOT); |
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| 125 | sigdelset(&mask, SIGCONT); |
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| 126 | sigprocmask(SIG_UNBLOCK, &mask, 0); |
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| 127 | |
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| 128 | act.sa_handler = _CPU_ISR_Handler; |
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| 129 | act.sa_mask = mask; |
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| 130 | act.sa_flags = SA_RESTART; |
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| 131 | |
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| 132 | sigaction(SIGHUP, &act, 0); |
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| 133 | sigaction(SIGINT, &act, 0); |
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| 134 | sigaction(SIGQUIT, &act, 0); |
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| 135 | sigaction(SIGILL, &act, 0); |
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[10aed1e3] | 136 | #ifdef SIGEMT |
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[637df35] | 137 | sigaction(SIGEMT, &act, 0); |
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[10aed1e3] | 138 | #endif |
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[637df35] | 139 | sigaction(SIGFPE, &act, 0); |
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| 140 | sigaction(SIGKILL, &act, 0); |
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| 141 | sigaction(SIGBUS, &act, 0); |
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| 142 | sigaction(SIGSEGV, &act, 0); |
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[10aed1e3] | 143 | #ifdef SIGSYS |
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[637df35] | 144 | sigaction(SIGSYS, &act, 0); |
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[10aed1e3] | 145 | #endif |
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[637df35] | 146 | sigaction(SIGPIPE, &act, 0); |
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| 147 | sigaction(SIGALRM, &act, 0); |
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| 148 | sigaction(SIGTERM, &act, 0); |
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| 149 | sigaction(SIGUSR1, &act, 0); |
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| 150 | sigaction(SIGUSR2, &act, 0); |
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| 151 | sigaction(SIGCHLD, &act, 0); |
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| 152 | sigaction(SIGCLD, &act, 0); |
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| 153 | sigaction(SIGPWR, &act, 0); |
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| 154 | sigaction(SIGVTALRM, &act, 0); |
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| 155 | sigaction(SIGPROF, &act, 0); |
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| 156 | sigaction(SIGIO, &act, 0); |
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| 157 | sigaction(SIGWINCH, &act, 0); |
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| 158 | sigaction(SIGSTOP, &act, 0); |
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| 159 | sigaction(SIGTTIN, &act, 0); |
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| 160 | sigaction(SIGTTOU, &act, 0); |
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| 161 | sigaction(SIGURG, &act, 0); |
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[e7e016f] | 162 | #ifdef SIGLOST |
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[637df35] | 163 | sigaction(SIGLOST, &act, 0); |
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| 164 | #endif |
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| 165 | |
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| 166 | } |
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| 167 | |
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| 168 | /*PAGE |
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| 169 | * |
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| 170 | * _CPU_Context_From_CPU_Init |
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| 171 | */ |
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| 172 | |
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| 173 | void _CPU_Context_From_CPU_Init() |
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| 174 | { |
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| 175 | |
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| 176 | #if defined(hppa1_1) && defined(RTEMS_UNIXLIB) |
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| 177 | /* |
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| 178 | * HACK - set the _SYSTEM_ID to 0x20c so that setjmp/longjmp |
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| 179 | * will handle the full 32 floating point registers. |
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| 180 | * |
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| 181 | * NOTE: Is this a bug in HPUX9? |
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| 182 | */ |
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| 183 | |
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| 184 | { |
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| 185 | extern unsigned32 _SYSTEM_ID; |
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| 186 | |
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| 187 | _SYSTEM_ID = 0x20c; |
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| 188 | } |
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| 189 | #endif |
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| 190 | |
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| 191 | /* |
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| 192 | * get default values to use in _CPU_Context_Initialize() |
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| 193 | */ |
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| 194 | |
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| 195 | _CPU_ISR_Set_level( 0 ); |
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[3652ad35] | 196 | _CPU_Context_switch( |
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| 197 | &_CPU_Context_Default_with_ISRs_enabled, |
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| 198 | &_CPU_Context_Default_with_ISRs_enabled |
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[637df35] | 199 | ); |
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| 200 | |
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| 201 | _CPU_ISR_Set_level( 1 ); |
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[3652ad35] | 202 | _CPU_Context_switch( |
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| 203 | &_CPU_Context_Default_with_ISRs_disabled, |
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| 204 | &_CPU_Context_Default_with_ISRs_disabled |
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[637df35] | 205 | ); |
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| 206 | } |
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| 207 | |
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[3a4ae6c] | 208 | /*PAGE |
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| 209 | * |
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| 210 | * _CPU_ISR_Get_level |
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| 211 | */ |
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| 212 | |
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[3652ad35] | 213 | sigset_t GET_old_mask; |
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| 214 | |
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[3a4ae6c] | 215 | unsigned32 _CPU_ISR_Get_level( void ) |
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| 216 | { |
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[3652ad35] | 217 | /* sigset_t old_mask; */ |
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| 218 | unsigned32 old_level; |
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[3a4ae6c] | 219 | |
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[3652ad35] | 220 | sigprocmask(0, 0, &GET_old_mask); |
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| 221 | |
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| 222 | if (memcmp((void *)&posix_empty_mask, (void *)&GET_old_mask, sizeof(sigset_t))) |
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| 223 | old_level = 1; |
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| 224 | else |
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| 225 | old_level = 0; |
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[3a4ae6c] | 226 | |
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[3652ad35] | 227 | return old_level; |
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[3a4ae6c] | 228 | } |
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| 229 | |
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[ac7d5ef0] | 230 | /* _CPU_Initialize |
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| 231 | * |
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| 232 | * This routine performs processor dependent initialization. |
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| 233 | * |
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| 234 | * INPUT PARAMETERS: |
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| 235 | * cpu_table - CPU table to initialize |
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| 236 | * thread_dispatch - address of disptaching routine |
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| 237 | */ |
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| 238 | |
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| 239 | |
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| 240 | void _CPU_Initialize( |
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| 241 | rtems_cpu_table *cpu_table, |
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[3a4ae6c] | 242 | void (*thread_dispatch) /* ignored on this CPU */ |
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[ac7d5ef0] | 243 | ) |
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| 244 | { |
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| 245 | /* |
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| 246 | * The thread_dispatch argument is the address of the entry point |
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| 247 | * for the routine called at the end of an ISR once it has been |
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| 248 | * decided a context switch is necessary. On some compilation |
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| 249 | * systems it is difficult to call a high-level language routine |
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| 250 | * from assembly. This allows us to trick these systems. |
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| 251 | * |
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| 252 | * If you encounter this problem save the entry point in a CPU |
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| 253 | * dependent variable. |
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| 254 | */ |
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| 255 | |
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| 256 | _CPU_Thread_dispatch_pointer = thread_dispatch; |
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| 257 | |
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| 258 | /* |
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| 259 | * XXX; If there is not an easy way to initialize the FP context |
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| 260 | * during Context_Initialize, then it is usually easier to |
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| 261 | * save an "uninitialized" FP context here and copy it to |
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| 262 | * the task's during Context_Initialize. |
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| 263 | */ |
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| 264 | |
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| 265 | /* XXX: FP context initialization support */ |
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| 266 | |
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| 267 | _CPU_Table = *cpu_table; |
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| 268 | |
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[637df35] | 269 | _CPU_ISR_From_CPU_Init(); |
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[ac7d5ef0] | 270 | |
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[637df35] | 271 | _CPU_Context_From_CPU_Init(); |
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[ac7d5ef0] | 272 | |
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[637df35] | 273 | } |
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[ac7d5ef0] | 274 | |
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[637df35] | 275 | /*PAGE |
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| 276 | * |
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| 277 | * _CPU_ISR_install_raw_handler |
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| 278 | */ |
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[ac7d5ef0] | 279 | |
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[637df35] | 280 | void _CPU_ISR_install_raw_handler( |
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| 281 | unsigned32 vector, |
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| 282 | proc_ptr new_handler, |
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| 283 | proc_ptr *old_handler |
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| 284 | ) |
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| 285 | { |
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| 286 | _CPU_Fatal_halt( 0xdeaddead ); |
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[ac7d5ef0] | 287 | } |
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| 288 | |
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[637df35] | 289 | /*PAGE |
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| 290 | * |
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| 291 | * _CPU_ISR_install_vector |
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[ac7d5ef0] | 292 | * |
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| 293 | * This kernel routine installs the RTEMS handler for the |
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| 294 | * specified vector. |
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| 295 | * |
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| 296 | * Input parameters: |
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| 297 | * vector - interrupt vector number |
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| 298 | * old_handler - former ISR for this vector number |
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| 299 | * new_handler - replacement ISR for this vector number |
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| 300 | * |
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| 301 | * Output parameters: NONE |
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| 302 | * |
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| 303 | */ |
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| 304 | |
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| 305 | |
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| 306 | void _CPU_ISR_install_vector( |
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| 307 | unsigned32 vector, |
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| 308 | proc_ptr new_handler, |
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| 309 | proc_ptr *old_handler |
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| 310 | ) |
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| 311 | { |
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| 312 | *old_handler = _ISR_Vector_table[ vector ]; |
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| 313 | |
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| 314 | /* |
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| 315 | * If the interrupt vector table is a table of pointer to isr entry |
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| 316 | * points, then we need to install the appropriate RTEMS interrupt |
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| 317 | * handler for this vector number. |
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| 318 | */ |
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| 319 | |
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| 320 | /* |
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| 321 | * We put the actual user ISR address in '_ISR_vector_table'. This will |
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[637df35] | 322 | * be used by the _CPU_ISR_Handler so the user gets control. |
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[ac7d5ef0] | 323 | */ |
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| 324 | |
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| 325 | _ISR_Vector_table[ vector ] = new_handler; |
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| 326 | } |
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| 327 | |
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| 328 | /*PAGE |
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| 329 | * |
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| 330 | * _CPU_Install_interrupt_stack |
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| 331 | */ |
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| 332 | |
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| 333 | void _CPU_Install_interrupt_stack( void ) |
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| 334 | { |
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| 335 | } |
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| 336 | |
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| 337 | /*PAGE |
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| 338 | * |
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| 339 | * _CPU_Internal_threads_Idle_thread_body |
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| 340 | * |
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| 341 | * NOTES: |
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| 342 | * |
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| 343 | * 1. This is the same as the regular CPU independent algorithm. |
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| 344 | * |
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| 345 | * 2. If you implement this using a "halt", "idle", or "shutdown" |
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| 346 | * instruction, then don't forget to put it in an infinite loop. |
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| 347 | * |
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| 348 | * 3. Be warned. Some processors with onboard DMA have been known |
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| 349 | * to stop the DMA if the CPU were put in IDLE mode. This might |
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| 350 | * also be a problem with other on-chip peripherals. So use this |
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| 351 | * hook with caution. |
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| 352 | */ |
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| 353 | |
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| 354 | void _CPU_Internal_threads_Idle_thread_body( void ) |
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| 355 | { |
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[637df35] | 356 | while (1) |
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| 357 | pause(); |
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[ac7d5ef0] | 358 | } |
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| 359 | |
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[637df35] | 360 | /*PAGE |
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| 361 | * |
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| 362 | * _CPU_Context_Initialize |
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| 363 | */ |
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| 364 | |
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[ac7d5ef0] | 365 | void _CPU_Context_Initialize( |
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| 366 | Context_Control *_the_context, |
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| 367 | unsigned32 *_stack_base, |
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| 368 | unsigned32 _size, |
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| 369 | unsigned32 _new_level, |
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[88d594a] | 370 | void *_entry_point |
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[ac7d5ef0] | 371 | ) |
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| 372 | { |
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[637df35] | 373 | void *source; |
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| 374 | unsigned32 *addr; |
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| 375 | unsigned32 jmp_addr; |
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| 376 | unsigned32 _stack_low; /* lowest "stack aligned" address */ |
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| 377 | unsigned32 _stack_high; /* highest "stack aligned" address */ |
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| 378 | unsigned32 _the_size; |
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[ac7d5ef0] | 379 | |
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[637df35] | 380 | jmp_addr = (unsigned32) _entry_point; |
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[ac7d5ef0] | 381 | |
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[637df35] | 382 | /* |
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| 383 | * On CPUs with stacks which grow down, we build the stack |
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| 384 | * based on the _stack_high address. On CPUs with stacks which |
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| 385 | * grow up, we build the stack based on the _stack_low address. |
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| 386 | */ |
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[88d594a] | 387 | |
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[637df35] | 388 | _stack_low = ((unsigned32)(_stack_base) + CPU_STACK_ALIGNMENT); |
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| 389 | _stack_low &= ~(CPU_STACK_ALIGNMENT - 1); |
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[88d594a] | 390 | |
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[637df35] | 391 | _stack_high = ((unsigned32)(_stack_base) + _size); |
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| 392 | _stack_high &= ~(CPU_STACK_ALIGNMENT - 1); |
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[ac7d5ef0] | 393 | |
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[637df35] | 394 | _the_size = _size & ~(CPU_STACK_ALIGNMENT - 1); |
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[ac7d5ef0] | 395 | |
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[637df35] | 396 | /* |
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| 397 | * Slam our jmp_buf template into the context we are creating |
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| 398 | */ |
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[ac7d5ef0] | 399 | |
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[637df35] | 400 | if ( _new_level == 0 ) |
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[37f4c2d] | 401 | source = &_CPU_Context_Default_with_ISRs_enabled; |
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[637df35] | 402 | else |
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[37f4c2d] | 403 | source = &_CPU_Context_Default_with_ISRs_disabled; |
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[637df35] | 404 | |
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[3652ad35] | 405 | memcpy(_the_context, source, sizeof(Context_Control) ); /* sizeof(jmp_buf)); */ |
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[ac7d5ef0] | 406 | |
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[637df35] | 407 | addr = (unsigned32 *)_the_context; |
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[ac7d5ef0] | 408 | |
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| 409 | #if defined(hppa1_1) |
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[637df35] | 410 | *(addr + RP_OFF) = jmp_addr; |
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| 411 | *(addr + SP_OFF) = (unsigned32)(_stack_low + CPU_FRAME_SIZE); |
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[ac7d5ef0] | 412 | |
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[637df35] | 413 | /* |
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| 414 | * See if we are using shared libraries by checking |
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| 415 | * bit 30 in 24 off of newp. If bit 30 is set then |
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| 416 | * we are using shared libraries and the jump address |
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| 417 | * is at what 24 off of newp points to so shove that |
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| 418 | * into 24 off of newp instead. |
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| 419 | */ |
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[ac7d5ef0] | 420 | |
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[637df35] | 421 | if (jmp_addr & 0x40000000) { |
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| 422 | jmp_addr &= 0xfffffffc; |
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| 423 | *(addr + RP_OFF) = (unsigned32)*(unsigned32 *)jmp_addr; |
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| 424 | } |
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[ac7d5ef0] | 425 | #elif defined(sparc) |
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| 426 | |
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[637df35] | 427 | /* |
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| 428 | * See /usr/include/sys/stack.h in Solaris 2.3 for a nice |
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| 429 | * diagram of the stack. |
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| 430 | */ |
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[ac7d5ef0] | 431 | |
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[637df35] | 432 | asm ("ta 0x03"); /* flush registers */ |
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[ac7d5ef0] | 433 | |
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[637df35] | 434 | *(addr + RP_OFF) = jmp_addr + ADDR_ADJ_OFFSET; |
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| 435 | *(addr + SP_OFF) = (unsigned32)(_stack_high - CPU_FRAME_SIZE); |
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| 436 | *(addr + FP_OFF) = (unsigned32)(_stack_high); |
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[8044533] | 437 | |
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| 438 | #elif defined(i386) |
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| 439 | |
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| 440 | /* |
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| 441 | * This information was gathered by disassembling setjmp(). |
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| 442 | */ |
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[10aed1e3] | 443 | |
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| 444 | { |
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| 445 | unsigned32 stack_ptr; |
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| 446 | |
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| 447 | stack_ptr = _stack_high - CPU_FRAME_SIZE; |
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| 448 | |
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| 449 | *(addr + EBX_OFF) = 0xFEEDFEED; |
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| 450 | *(addr + ESI_OFF) = 0xDEADDEAD; |
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| 451 | *(addr + EDI_OFF) = 0xDEAFDEAF; |
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| 452 | *(addr + EBP_OFF) = stack_ptr; |
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| 453 | *(addr + ESP_OFF) = stack_ptr; |
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| 454 | *(addr + RET_OFF) = jmp_addr; |
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[8044533] | 455 | |
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[10aed1e3] | 456 | addr = (unsigned32 *) stack_ptr; |
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[8044533] | 457 | |
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[10aed1e3] | 458 | addr[ 0 ] = jmp_addr; |
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| 459 | addr[ 1 ] = (unsigned32) stack_ptr; |
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| 460 | addr[ 2 ] = (unsigned32) stack_ptr; |
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| 461 | } |
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[8044533] | 462 | |
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[ac7d5ef0] | 463 | #else |
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| 464 | #error "UNKNOWN CPU!!!" |
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| 465 | #endif |
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| 466 | |
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| 467 | } |
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| 468 | |
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[637df35] | 469 | /*PAGE |
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| 470 | * |
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| 471 | * _CPU_Context_restore |
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| 472 | */ |
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| 473 | |
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[ac7d5ef0] | 474 | void _CPU_Context_restore( |
---|
| 475 | Context_Control *next |
---|
| 476 | ) |
---|
| 477 | { |
---|
[37f4c2d] | 478 | Context_Control_overlay *nextp = (Context_Control_overlay *)next; |
---|
| 479 | |
---|
| 480 | sigprocmask( SIG_SETMASK, &nextp->isr_level, 0 ); |
---|
| 481 | longjmp( nextp->regs, 0 ); |
---|
[ac7d5ef0] | 482 | } |
---|
| 483 | |
---|
[637df35] | 484 | /*PAGE |
---|
| 485 | * |
---|
| 486 | * _CPU_Context_switch |
---|
| 487 | */ |
---|
| 488 | |
---|
[ac7d5ef0] | 489 | void _CPU_Context_switch( |
---|
| 490 | Context_Control *current, |
---|
| 491 | Context_Control *next |
---|
| 492 | ) |
---|
| 493 | { |
---|
[37f4c2d] | 494 | Context_Control_overlay *currentp = (Context_Control_overlay *)current; |
---|
| 495 | Context_Control_overlay *nextp = (Context_Control_overlay *)next; |
---|
| 496 | |
---|
[3652ad35] | 497 | int status; |
---|
| 498 | |
---|
[637df35] | 499 | /* |
---|
| 500 | * Switch levels in one operation |
---|
| 501 | */ |
---|
[ac7d5ef0] | 502 | |
---|
[37f4c2d] | 503 | status = sigprocmask( SIG_SETMASK, &nextp->isr_level, ¤tp->isr_level ); |
---|
[3652ad35] | 504 | if ( status ) |
---|
| 505 | _Internal_error_Occurred( |
---|
| 506 | INTERNAL_ERROR_CORE, |
---|
| 507 | TRUE, |
---|
| 508 | status |
---|
| 509 | ); |
---|
[ac7d5ef0] | 510 | |
---|
[37f4c2d] | 511 | if (setjmp(currentp->regs) == 0) { /* Save the current context */ |
---|
| 512 | longjmp(nextp->regs, 0); /* Switch to the new context */ |
---|
[3652ad35] | 513 | if ( status ) |
---|
| 514 | _Internal_error_Occurred( |
---|
| 515 | INTERNAL_ERROR_CORE, |
---|
| 516 | TRUE, |
---|
| 517 | status |
---|
| 518 | ); |
---|
[637df35] | 519 | } |
---|
[3652ad35] | 520 | |
---|
[ac7d5ef0] | 521 | } |
---|
[637df35] | 522 | |
---|
| 523 | /*PAGE |
---|
| 524 | * |
---|
| 525 | * _CPU_Save_float_context |
---|
| 526 | */ |
---|
[ac7d5ef0] | 527 | |
---|
| 528 | void _CPU_Save_float_context( |
---|
| 529 | Context_Control_fp *fp_context |
---|
| 530 | ) |
---|
| 531 | { |
---|
| 532 | } |
---|
| 533 | |
---|
[637df35] | 534 | /*PAGE |
---|
| 535 | * |
---|
| 536 | * _CPU_Restore_float_context |
---|
| 537 | */ |
---|
| 538 | |
---|
[ac7d5ef0] | 539 | void _CPU_Restore_float_context( |
---|
| 540 | Context_Control_fp *fp_context |
---|
| 541 | ) |
---|
| 542 | { |
---|
| 543 | } |
---|
| 544 | |
---|
[637df35] | 545 | /*PAGE |
---|
| 546 | * |
---|
| 547 | * _CPU_ISR_Disable_support |
---|
| 548 | */ |
---|
[ac7d5ef0] | 549 | |
---|
[637df35] | 550 | unsigned32 _CPU_ISR_Disable_support(void) |
---|
[ac7d5ef0] | 551 | { |
---|
[3652ad35] | 552 | int status; |
---|
[637df35] | 553 | sigset_t old_mask; |
---|
[ac7d5ef0] | 554 | |
---|
[3652ad35] | 555 | status = sigprocmask(SIG_BLOCK, &_CPU_Signal_mask, &old_mask); |
---|
| 556 | if ( status ) |
---|
| 557 | _Internal_error_Occurred( |
---|
| 558 | INTERNAL_ERROR_CORE, |
---|
| 559 | TRUE, |
---|
| 560 | status |
---|
| 561 | ); |
---|
[ac7d5ef0] | 562 | |
---|
[3652ad35] | 563 | if (memcmp((void *)&posix_empty_mask, (void *)&old_mask, sizeof(sigset_t))) |
---|
[637df35] | 564 | return 1; |
---|
[ac7d5ef0] | 565 | |
---|
[637df35] | 566 | return 0; |
---|
[ac7d5ef0] | 567 | } |
---|
| 568 | |
---|
[637df35] | 569 | /*PAGE |
---|
| 570 | * |
---|
| 571 | * _CPU_ISR_Enable |
---|
| 572 | */ |
---|
[ac7d5ef0] | 573 | |
---|
[637df35] | 574 | void _CPU_ISR_Enable( |
---|
| 575 | unsigned32 level |
---|
| 576 | ) |
---|
[ac7d5ef0] | 577 | { |
---|
[3652ad35] | 578 | int status; |
---|
| 579 | |
---|
[637df35] | 580 | if (level == 0) |
---|
[3652ad35] | 581 | status = sigprocmask(SIG_UNBLOCK, &_CPU_Signal_mask, 0); |
---|
[637df35] | 582 | else |
---|
[3652ad35] | 583 | status = sigprocmask(SIG_BLOCK, &_CPU_Signal_mask, 0); |
---|
| 584 | |
---|
| 585 | if ( status ) |
---|
| 586 | _Internal_error_Occurred( |
---|
| 587 | INTERNAL_ERROR_CORE, |
---|
| 588 | TRUE, |
---|
| 589 | status |
---|
| 590 | ); |
---|
[ac7d5ef0] | 591 | } |
---|
| 592 | |
---|
[637df35] | 593 | /*PAGE |
---|
[ac7d5ef0] | 594 | * |
---|
[637df35] | 595 | * _CPU_ISR_Handler |
---|
| 596 | * |
---|
| 597 | * External interrupt handler. |
---|
| 598 | * This is installed as a UNIX signal handler. |
---|
| 599 | * It vectors out to specific user interrupt handlers. |
---|
[ac7d5ef0] | 600 | */ |
---|
| 601 | |
---|
[637df35] | 602 | void _CPU_ISR_Handler(int vector) |
---|
[ac7d5ef0] | 603 | { |
---|
[637df35] | 604 | extern void _Thread_Dispatch(void); |
---|
| 605 | extern unsigned32 _Thread_Dispatch_disable_level; |
---|
| 606 | extern boolean _Context_Switch_necessary; |
---|
[ac7d5ef0] | 607 | |
---|
| 608 | |
---|
[637df35] | 609 | if (_ISR_Nest_level++ == 0) { |
---|
| 610 | /* switch to interrupt stack */ |
---|
| 611 | } |
---|
[ac7d5ef0] | 612 | |
---|
[637df35] | 613 | _Thread_Dispatch_disable_level++; |
---|
[ac7d5ef0] | 614 | |
---|
[637df35] | 615 | if (_ISR_Vector_table[vector]) { |
---|
| 616 | _ISR_Vector_table[vector](vector); |
---|
| 617 | } else { |
---|
| 618 | _CPU_Stray_signal(vector); |
---|
| 619 | } |
---|
[ac7d5ef0] | 620 | |
---|
[637df35] | 621 | if (_ISR_Nest_level-- == 0) { |
---|
| 622 | /* switch back to original stack */ |
---|
| 623 | } |
---|
[ac7d5ef0] | 624 | |
---|
[637df35] | 625 | _Thread_Dispatch_disable_level--; |
---|
[ac7d5ef0] | 626 | |
---|
[637df35] | 627 | if (_Thread_Dispatch_disable_level == 0 && |
---|
| 628 | (_Context_Switch_necessary || _ISR_Signals_to_thread_executing)) { |
---|
| 629 | _CPU_ISR_Enable(0); |
---|
| 630 | _Thread_Dispatch(); |
---|
| 631 | } |
---|
[ac7d5ef0] | 632 | } |
---|
| 633 | |
---|
[637df35] | 634 | /*PAGE |
---|
| 635 | * |
---|
| 636 | * _CPU_Stray_signal |
---|
| 637 | */ |
---|
[ac7d5ef0] | 638 | |
---|
[637df35] | 639 | void _CPU_Stray_signal(int sig_num) |
---|
[ac7d5ef0] | 640 | { |
---|
[37f4c2d] | 641 | char buffer[ 4 ]; |
---|
[ac7d5ef0] | 642 | |
---|
[637df35] | 643 | /* |
---|
| 644 | * We avoid using the stdio section of the library. |
---|
| 645 | * The following is generally safe. |
---|
| 646 | */ |
---|
[ac7d5ef0] | 647 | |
---|
[37f4c2d] | 648 | buffer[ 0 ] = (sig_num >> 4) + 0x30; |
---|
| 649 | buffer[ 1 ] = (sig_num & 0xf) + 0x30; |
---|
| 650 | buffer[ 2 ] = '\n'; |
---|
| 651 | |
---|
| 652 | write( 2, "Stray signal 0x", 12 ); |
---|
| 653 | write( 2, buffer, 3 ); |
---|
[ac7d5ef0] | 654 | |
---|
[637df35] | 655 | /* |
---|
| 656 | * If it was a "fatal" signal, then exit here |
---|
| 657 | * If app code has installed a hander for one of these, then |
---|
| 658 | * we won't call _CPU_Stray_signal, so this is ok. |
---|
| 659 | */ |
---|
[ac7d5ef0] | 660 | |
---|
[637df35] | 661 | switch (sig_num) { |
---|
| 662 | case SIGINT: |
---|
| 663 | case SIGHUP: |
---|
| 664 | case SIGQUIT: |
---|
| 665 | case SIGILL: |
---|
[10aed1e3] | 666 | #ifdef SIGEMT |
---|
[637df35] | 667 | case SIGEMT: |
---|
[10aed1e3] | 668 | #endif |
---|
[637df35] | 669 | case SIGKILL: |
---|
| 670 | case SIGBUS: |
---|
| 671 | case SIGSEGV: |
---|
| 672 | case SIGTERM: |
---|
| 673 | _CPU_Fatal_error(0x100 + sig_num); |
---|
| 674 | } |
---|
[ac7d5ef0] | 675 | } |
---|
| 676 | |
---|
[637df35] | 677 | /*PAGE |
---|
| 678 | * |
---|
| 679 | * _CPU_Fatal_error |
---|
| 680 | */ |
---|
[ac7d5ef0] | 681 | |
---|
[637df35] | 682 | void _CPU_Fatal_error(unsigned32 error) |
---|
[ac7d5ef0] | 683 | { |
---|
[637df35] | 684 | setitimer(ITIMER_REAL, 0, 0); |
---|
[ac7d5ef0] | 685 | |
---|
[e7e016f] | 686 | if ( error ) { |
---|
| 687 | #ifdef RTEMS_DEBUG |
---|
| 688 | abort(); |
---|
| 689 | #endif |
---|
| 690 | if (getenv("RTEMS_DEBUG")) |
---|
| 691 | abort(); |
---|
| 692 | } |
---|
| 693 | |
---|
[637df35] | 694 | _exit(error); |
---|
[ac7d5ef0] | 695 | } |
---|
| 696 | |
---|
[637df35] | 697 | /*PAGE |
---|
| 698 | * |
---|
| 699 | * _CPU_ffs |
---|
| 700 | */ |
---|
| 701 | |
---|
| 702 | int _CPU_ffs(unsigned32 value) |
---|
[ac7d5ef0] | 703 | { |
---|
[637df35] | 704 | int output; |
---|
| 705 | extern int ffs( int ); |
---|
[ac7d5ef0] | 706 | |
---|
[637df35] | 707 | output = ffs(value); |
---|
| 708 | output = output - 1; |
---|
[ac7d5ef0] | 709 | |
---|
[637df35] | 710 | return output; |
---|
[ac7d5ef0] | 711 | } |
---|
[37f4c2d] | 712 | |
---|
| 713 | |
---|
| 714 | /* |
---|
| 715 | * Special Purpose Routines to hide the use of UNIX system calls. |
---|
| 716 | */ |
---|
| 717 | |
---|
| 718 | #if 0 |
---|
| 719 | /* XXX clock had this set of #define's */ |
---|
| 720 | |
---|
| 721 | /* |
---|
| 722 | * In order to get the types and prototypes used in this file under |
---|
| 723 | * Solaris 2.3, it is necessary to pull the following magic. |
---|
| 724 | */ |
---|
| 725 | |
---|
| 726 | #if defined(solaris) |
---|
| 727 | #warning "Ignore the undefining __STDC__ warning" |
---|
| 728 | #undef __STDC__ |
---|
| 729 | #define __STDC__ 0 |
---|
| 730 | #undef _POSIX_C_SOURCE |
---|
| 731 | #endif |
---|
| 732 | #endif |
---|
| 733 | |
---|
| 734 | int _CPU_Get_clock_vector( void ) |
---|
| 735 | { |
---|
| 736 | return SIGALRM; |
---|
| 737 | } |
---|
| 738 | |
---|
| 739 | |
---|
| 740 | void _CPU_Start_clock( |
---|
| 741 | int microseconds |
---|
| 742 | ) |
---|
| 743 | { |
---|
| 744 | struct itimerval new; |
---|
| 745 | |
---|
| 746 | new.it_value.tv_sec = 0; |
---|
| 747 | new.it_value.tv_usec = microseconds; |
---|
| 748 | new.it_interval.tv_sec = 0; |
---|
| 749 | new.it_interval.tv_usec = microseconds; |
---|
| 750 | |
---|
| 751 | setitimer(ITIMER_REAL, &new, 0); |
---|
| 752 | } |
---|
| 753 | |
---|
| 754 | void _CPU_Stop_clock( void ) |
---|
| 755 | { |
---|
| 756 | struct itimerval new; |
---|
| 757 | struct sigaction act; |
---|
| 758 | |
---|
| 759 | /* |
---|
| 760 | * Set the SIGALRM signal to ignore any last |
---|
| 761 | * signals that might come in while we are |
---|
| 762 | * disarming the timer and removing the interrupt |
---|
| 763 | * vector. |
---|
| 764 | */ |
---|
| 765 | |
---|
| 766 | act.sa_handler = SIG_IGN; |
---|
| 767 | |
---|
| 768 | sigaction(SIGALRM, &act, 0); |
---|
| 769 | |
---|
| 770 | new.it_value.tv_sec = 0; |
---|
| 771 | new.it_value.tv_usec = 0; |
---|
| 772 | |
---|
| 773 | setitimer(ITIMER_REAL, &new, 0); |
---|
| 774 | } |
---|
| 775 | |
---|
| 776 | int _CPU_SHM_Semid; |
---|
| 777 | extern void fix_syscall_errno( void ); |
---|
| 778 | |
---|
| 779 | void _CPU_SHM_Init( |
---|
| 780 | unsigned32 maximum_nodes, |
---|
| 781 | boolean is_master_node, |
---|
| 782 | void **shm_address, |
---|
| 783 | unsigned32 *shm_length |
---|
| 784 | ) |
---|
| 785 | { |
---|
| 786 | int i; |
---|
| 787 | int shmid; |
---|
| 788 | char *shm_addr; |
---|
| 789 | key_t shm_key; |
---|
| 790 | key_t sem_key; |
---|
| 791 | int status; |
---|
| 792 | int shm_size; |
---|
| 793 | |
---|
| 794 | if (getenv("RTEMS_SHM_KEY")) |
---|
| 795 | shm_key = strtol(getenv("RTEMS_SHM_KEY"), 0, 0); |
---|
| 796 | else |
---|
| 797 | #ifdef RTEMS_SHM_KEY |
---|
| 798 | shm_key = RTEMS_SHM_KEY; |
---|
| 799 | #else |
---|
| 800 | shm_key = 0xa000; |
---|
| 801 | #endif |
---|
| 802 | |
---|
| 803 | if (getenv("RTEMS_SHM_SIZE")) |
---|
| 804 | shm_size = strtol(getenv("RTEMS_SHM_SIZE"), 0, 0); |
---|
| 805 | else |
---|
| 806 | #ifdef RTEMS_SHM_SIZE |
---|
| 807 | shm_size = RTEMS_SHM_SIZE; |
---|
| 808 | #else |
---|
| 809 | shm_size = 64 * 1024; |
---|
| 810 | #endif |
---|
| 811 | |
---|
| 812 | if (getenv("RTEMS_SHM_SEMAPHORE_KEY")) |
---|
| 813 | sem_key = strtol(getenv("RTEMS_SHM_SEMAPHORE_KEY"), 0, 0); |
---|
| 814 | else |
---|
| 815 | #ifdef RTEMS_SHM_SEMAPHORE_KEY |
---|
| 816 | sem_key = RTEMS_SHM_SEMAPHORE_KEY; |
---|
| 817 | #else |
---|
| 818 | sem_key = 0xa001; |
---|
| 819 | #endif |
---|
| 820 | |
---|
| 821 | shmid = shmget(shm_key, shm_size, IPC_CREAT | 0660); |
---|
| 822 | if ( shmid == -1 ) { |
---|
| 823 | fix_syscall_errno(); /* in case of newlib */ |
---|
| 824 | perror( "shmget" ); |
---|
| 825 | _CPU_Fatal_halt( 0xdead0001 ); |
---|
| 826 | } |
---|
| 827 | |
---|
| 828 | shm_addr = shmat(shmid, (char *)0, SHM_RND); |
---|
| 829 | if ( shm_addr == (void *)-1 ) { |
---|
| 830 | fix_syscall_errno(); /* in case of newlib */ |
---|
| 831 | perror( "shmat" ); |
---|
| 832 | _CPU_Fatal_halt( 0xdead0002 ); |
---|
| 833 | } |
---|
| 834 | |
---|
| 835 | _CPU_SHM_Semid = semget(sem_key, maximum_nodes + 1, IPC_CREAT | 0660); |
---|
| 836 | if ( _CPU_SHM_Semid == -1 ) { |
---|
| 837 | fix_syscall_errno(); /* in case of newlib */ |
---|
| 838 | perror( "semget" ); |
---|
| 839 | _CPU_Fatal_halt( 0xdead0003 ); |
---|
| 840 | } |
---|
| 841 | |
---|
| 842 | if ( is_master_node ) { |
---|
| 843 | for ( i=0 ; i <= maximum_nodes ; i++ ) { |
---|
| 844 | #if defined(solaris2) |
---|
| 845 | union semun { |
---|
| 846 | int val; |
---|
| 847 | struct semid_ds *buf; |
---|
| 848 | ushort *array; |
---|
| 849 | } help; |
---|
| 850 | |
---|
| 851 | help.val = 1; |
---|
| 852 | status = semctl( _CPU_SHM_Semid, i, SETVAL, help ); |
---|
| 853 | #endif |
---|
| 854 | #if defined(hpux) |
---|
| 855 | status = semctl( _CPU_SHM_Semid, i, SETVAL, 1 ); |
---|
| 856 | #endif |
---|
| 857 | |
---|
| 858 | fix_syscall_errno(); /* in case of newlib */ |
---|
| 859 | if ( status == -1 ) { |
---|
| 860 | _CPU_Fatal_halt( 0xdead0004 ); |
---|
| 861 | } |
---|
| 862 | } |
---|
| 863 | } |
---|
| 864 | |
---|
| 865 | *shm_address = shm_addr; |
---|
| 866 | *shm_length = shm_size; |
---|
| 867 | |
---|
| 868 | } |
---|
| 869 | |
---|
| 870 | int _CPU_Get_pid( void ) |
---|
| 871 | { |
---|
| 872 | return getpid(); |
---|
| 873 | } |
---|
| 874 | |
---|
| 875 | /* |
---|
| 876 | * Define this to use signals for MPCI shared memory driver. |
---|
| 877 | * If undefined, the shared memory driver will poll from the |
---|
| 878 | * clock interrupt. |
---|
| 879 | * Ref: ../shmsupp/getcfg.c |
---|
| 880 | * |
---|
| 881 | * BEWARE:: many UN*X kernels and debuggers become severely confused when |
---|
| 882 | * debugging programs which use signals. The problem is *much* |
---|
| 883 | * worse when using multiple signals, since ptrace(2) tends to |
---|
| 884 | * drop all signals except 1 in the case of multiples. |
---|
| 885 | * On hpux9, this problem was so bad, we couldn't use interrupts |
---|
| 886 | * with the shared memory driver if we ever hoped to debug |
---|
| 887 | * RTEMS programs. |
---|
| 888 | * Maybe systems that use /proc don't have this problem... |
---|
| 889 | */ |
---|
| 890 | |
---|
| 891 | |
---|
| 892 | int _CPU_SHM_Get_vector( void ) |
---|
| 893 | { |
---|
| 894 | #ifdef CPU_USE_SHM_INTERRUPTS |
---|
| 895 | return SIGUSR1; |
---|
| 896 | #else |
---|
| 897 | return 0; |
---|
| 898 | #endif |
---|
| 899 | } |
---|
| 900 | |
---|
| 901 | void _CPU_SHM_Send_interrupt( |
---|
| 902 | int pid, |
---|
| 903 | int vector |
---|
| 904 | ) |
---|
| 905 | { |
---|
| 906 | kill((pid_t) pid, vector); |
---|
| 907 | } |
---|
| 908 | |
---|
| 909 | void _CPU_SHM_Lock( |
---|
| 910 | int semaphore |
---|
| 911 | ) |
---|
| 912 | { |
---|
| 913 | struct sembuf sb; |
---|
| 914 | int status; |
---|
| 915 | |
---|
| 916 | sb.sem_num = semaphore; |
---|
| 917 | sb.sem_op = -1; |
---|
| 918 | sb.sem_flg = 0; |
---|
| 919 | |
---|
| 920 | while (1) { |
---|
| 921 | status = semop(_CPU_SHM_Semid, &sb, 1); |
---|
| 922 | if ( status >= 0 ) |
---|
| 923 | break; |
---|
| 924 | if ( status == -1 ) { |
---|
| 925 | fix_syscall_errno(); /* in case of newlib */ |
---|
| 926 | if (errno == EINTR) |
---|
| 927 | continue; |
---|
| 928 | perror("shm lock"); |
---|
| 929 | _CPU_Fatal_halt( 0xdead0005 ); |
---|
| 930 | } |
---|
| 931 | } |
---|
| 932 | |
---|
| 933 | } |
---|
| 934 | |
---|
| 935 | void _CPU_SHM_Unlock( |
---|
| 936 | int semaphore |
---|
| 937 | ) |
---|
| 938 | { |
---|
| 939 | struct sembuf sb; |
---|
| 940 | int status; |
---|
| 941 | |
---|
| 942 | sb.sem_num = semaphore; |
---|
| 943 | sb.sem_op = 1; |
---|
| 944 | sb.sem_flg = 0; |
---|
| 945 | |
---|
| 946 | while (1) { |
---|
| 947 | status = semop(_CPU_SHM_Semid, &sb, 1); |
---|
| 948 | if ( status >= 0 ) |
---|
| 949 | break; |
---|
| 950 | |
---|
| 951 | if ( status == -1 ) { |
---|
| 952 | fix_syscall_errno(); /* in case of newlib */ |
---|
| 953 | if (errno == EINTR) |
---|
| 954 | continue; |
---|
| 955 | perror("shm unlock"); |
---|
| 956 | _CPU_Fatal_halt( 0xdead0006 ); |
---|
| 957 | } |
---|
| 958 | } |
---|
| 959 | |
---|
| 960 | } |
---|