source: rtems/cpukit/score/cpu/sparc64/include/rtems/score/cpuimpl.h @ 4c89fbcd

Last change on this file since 4c89fbcd was 4c89fbcd, checked in by Sebastian Huber <sebastian.huber@…>, on 09/27/22 at 05:43:37

score: Add CPU_THREAD_LOCAL_STORAGE_VARIANT

Update #3835.

  • Property mode set to 100644
File size: 2.4 KB
Line 
1/* SPDX-License-Identifier: BSD-2-Clause */
2
3/**
4 * @file
5 *
6 * @brief CPU Port Implementation API
7 */
8
9/*
10 * Copyright (c) 2013 embedded brains GmbH
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 * 1. Redistributions of source code must retain the above copyright
16 *    notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 *    notice, this list of conditions and the following disclaimer in the
19 *    documentation and/or other materials provided with the distribution.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
25 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE.
32 */
33
34#ifndef _RTEMS_SCORE_CPUIMPL_H
35#define _RTEMS_SCORE_CPUIMPL_H
36
37#include <rtems/score/cpu.h>
38
39/**
40 * @defgroup RTEMSScoreCPUSPARC64 SPARC64
41 *
42 * @ingroup RTEMSScoreCPU
43 *
44 * @brief SPARC64 Architecture Support
45 *
46 * @{
47 */
48
49#define CPU_PER_CPU_CONTROL_SIZE 0
50
51#define CPU_THREAD_LOCAL_STORAGE_VARIANT 20
52
53#ifndef ASM
54
55#ifdef __cplusplus
56extern "C" {
57#endif
58
59RTEMS_NO_RETURN void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error );
60
61static inline void _CPU_Context_volatile_clobber( uintptr_t pattern )
62{
63  /* TODO */
64}
65
66static inline void _CPU_Context_validate( uintptr_t pattern )
67{
68  while (1) {
69    /* TODO */
70  }
71}
72
73static inline void _CPU_Instruction_illegal( void )
74{
75  __asm__ volatile ( "unimp" );
76}
77
78static inline void _CPU_Instruction_no_operation( void )
79{
80  __asm__ volatile ( "nop" );
81}
82
83static inline void _CPU_Use_thread_local_storage(
84  const Context_Control *context
85)
86{
87  (void) context;
88}
89
90#ifdef __cplusplus
91}
92#endif
93
94#endif /* ASM */
95
96#endif /* _RTEMS_SCORE_CPUIMPL_H */
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