source: rtems/cpukit/score/cpu/sparc64/cpu.c @ 4eeed005

4.115
Last change on this file since 4eeed005 was 4eeed005, checked in by Joel Sherrill <joel.sherrill@…>, on 10/06/11 at 16:42:52

2011-10-06 Gedare Bloom <giddyup44@…>

PR 1918/cpukit

  • cpu.c: Initialize context with cleared g4 register.
  • Property mode set to 100644
File size: 3.2 KB
Line 
1/*
2 *  SPARC-v9 Dependent Source
3 *
4 *  COPYRIGHT (c) 1989-2007.
5 *  On-Line Applications Research Corporation (OAR).
6 *
7 *  This file is based on the SPARC cpu.c file. Modifications are made to
8 *  provide support for the SPARC-v9.
9 *    COPYRIGHT (c) 2010. Gedare Bloom.
10 *
11 *  The license and distribution terms for this file may be
12 *  found in the file LICENSE in this distribution or at
13 *  http://www.rtems.com/license/LICENSE.
14 *
15 *  $Id$
16 */
17
18#include <rtems/system.h>
19#include <rtems/asm.h>
20#include <rtems/score/isr.h>
21#include <rtems/rtems/cache.h>
22
23/*
24 *  _CPU_Initialize
25 *
26 *  This routine performs processor dependent initialization.
27 *
28 *  INPUT PARAMETERS: NONE
29 *
30 *  Output Parameters: NONE
31 *
32 *  NOTE: There is no need to save the pointer to the thread dispatch routine.
33 *        The SPARC's assembly code can reference it directly with no problems.
34 */
35
36void _CPU_Initialize(void)
37{
38#if (SPARC_HAS_FPU == 1)
39  Context_Control_fp *pointer;
40
41  /*
42   *  This seems to be the most appropriate way to obtain an initial
43   *  FP context on the SPARC.  The NULL fp context is copied in to
44   *  the task's FP context during Context_Initialize_fp.
45   */
46
47  pointer = &_CPU_Null_fp_context;
48  _CPU_Context_save_fp( &pointer );
49
50#endif
51
52  /*
53   *  Since no tasks have been created yet and no interrupts have occurred,
54   *  there is no way that the currently executing thread can have an
55   *  _ISR_Dispatch stack frame on its stack.
56   */
57  _CPU_ISR_Dispatch_disable = 0;
58}
59
60/*
61 *  _CPU_Context_Initialize
62 *
63 *  This kernel routine initializes the basic non-FP context area associated
64 *  with each thread.
65 *
66 *  Input parameters:
67 *    the_context  - pointer to the context area
68 *    stack_base   - address of memory for the SPARC
69 *    size         - size in bytes of the stack area
70 *    new_level    - interrupt level for this context area
71 *    entry_point  - the starting execution point for this this context
72 *    is_fp        - TRUE if this context is associated with an FP thread
73 *
74 *  Output parameters: NONE
75 */
76
77void _CPU_Context_Initialize(
78  Context_Control  *the_context,
79  void         *stack_base,
80  uint32_t          size,
81  uint32_t          new_level,
82  void             *entry_point,
83  bool              is_fp
84)
85{
86    uint64_t     stack_high;  /* highest "stack aligned" address */
87    uint32_t     the_size;
88
89    /*
90     *  On CPUs with stacks which grow down (i.e. SPARC), we build the stack
91     *  based on the stack_high address.
92     */
93
94    stack_high = ((uint64_t)(stack_base) + size);
95    stack_high &= ~(CPU_STACK_ALIGNMENT - 1);
96
97    the_size = size & ~(CPU_STACK_ALIGNMENT - 1);
98
99    /*
100     *  See the README in this directory for a diagram of the stack.
101     */
102
103    the_context->o7    = ((uint64_t) entry_point) - 8;
104    the_context->o6_sp = stack_high - CPU_MINIMUM_STACK_FRAME_SIZE - STACK_BIAS;
105    the_context->i6_fp = 0;
106
107    /* ABI uses g4 as segment register, make sure it is zeroed */
108    the_context->g4    = 0;
109
110    /* PSTATE used to be built here, but is no longer included in context */
111
112  /*
113   *  Since THIS thread is being created, there is no way that THIS
114   *  thread can have an _ISR_Dispatch stack frame on its stack.
115   */
116    the_context->isr_dispatch_disable = 0;
117}
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