source: rtems/cpukit/score/cpu/sparc/rtems/score/types.h @ b04b76c6

5
Last change on this file since b04b76c6 was b04b76c6, checked in by Sebastian Huber <sebastian.huber@…>, on 06/07/16 at 19:36:48

score: Simplify priority bit map implementation

The priority bit map can deal with a maximum of 256 priority values
ranging from 0 to 255. Consistently use an unsigned int for
computation, due to the usual integer promotion rules.

Make Priority_bit_map_Word definition architecture-independent and
define it to uint16_t. This was already the case for all architectures
except PowerPC. Adjust the PowerPC bitmap support accordingly.
  • Property mode set to 100644
File size: 973 bytes
Line 
1/**
2 * @file
3 *
4 * @brief SPARC CPU Type Definitions
5 *
6 * This include file contains type definitions pertaining to the
7 * SPARC processor family.
8 */
9
10/*
11 *  COPYRIGHT (c) 1989-2011.
12 *  On-Line Applications Research Corporation (OAR).
13 *
14 *  The license and distribution terms for this file may be
15 *  found in the file LICENSE in this distribution or at
16 *  http://www.rtems.org/license/LICENSE.
17 */
18
19#ifndef _RTEMS_SCORE_TYPES_H
20#define _RTEMS_SCORE_TYPES_H
21
22#include <rtems/score/basedefs.h>
23
24#ifndef ASM
25
26#ifdef __cplusplus
27extern "C" {
28#endif
29
30/** Type that can store a 32-bit integer or a pointer. */
31typedef uintptr_t CPU_Uint32ptr;
32
33/**
34 * @brief SPARC ISR handler return type.
35 *
36 * This is the type which SPARC ISR Handlers return.
37 */
38typedef void sparc_isr;
39
40/**
41 * @brief SPARC ISR handler prototype.
42 *
43 * This is the prototype for SPARC ISR Handlers.
44 */
45typedef void ( *sparc_isr_entry )( void );
46
47#ifdef __cplusplus
48}
49#endif
50
51#endif  /* !ASM */
52
53#endif
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