source: rtems/cpukit/score/cpu/sparc/README

Last change on this file was 9b4422a2, checked in by Joel Sherrill <joel.sherrill@…>, on May 3, 2012 at 3:09:24 PM

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1This file discusses SPARC specific issues which are important to
2this port.  The primary topics in this file are:
3
4  + Global Register Usage
5  + Stack Frame
6  + EF bit in the PSR
7
8
9Global Register Usage
10=====================
11
12This information on register usage is based heavily on a comment in the
13file gcc-2.7.0/config/sparc/sparc.h in the the gcc 2.7.0 source.
14
15   + g0 is hardwired to 0
16   + On non-v9 systems:
17       - g1 is free to use as temporary.
18       - g2-g4 are reserved for applications.  Gcc normally uses them as
19         temporaries, but this can be disabled via the -mno-app-regs option.
20       - g5 through g7 are reserved for the operating system.
21   + On v9 systems:
22       - g1 and g5 are free to use as temporaries.
23       - g2-g4 are reserved for applications (the compiler will not normally use
24         them, but they can be used as temporaries with -mapp-regs).
25       - g6-g7 are reserved for the operating system.
26
27   NOTE:  As of gcc 2.7.0 register g1 was used in the following scenarios:
28
29       + as a temporary by the 64 bit sethi pattern
30       + when restoring call-preserved registers in large stack frames
31
32RTEMS places no constraints on the usage of the global registers.  Although
33gcc assumes that either g5-g7 (non-V9) or g6-g7 (V9) are reserved for the
34operating system, RTEMS does not assume any special use for them.
35
36
37
38Stack Frame
39===========
40
41The stack grows downward (i.e. to lower addresses) on the SPARC architecture.
42
43The following is the organization of the stack frame:
44
45
46
47                |        ...............        |
48             fp |                               |
49                +-------------------------------+
50                |                               |
51                | Local registers, temporaries, |
52                |      and saved floats         |      x bytes
53                |                               |
54        sp + x  +-------------------------------+
55                |                               |
56                |   outgoing parameters past    |
57                |       the sixth one           |      x bytes
58                |                               |
59        sp + 92 +-------------------------------+  *
60                |                               |  *
61                |   area for callee to save     |  *
62                |      register arguments       |  *  24 bytes
63                |                               |  *
64        sp + 68 +-------------------------------+  *
65                |                               |  *
66                |   structure return pointer    |  *   4 bytes
67                |                               |  *
68        sp + 64 +-------------------------------+  *
69                |                               |  *
70                |      local register set       |  *  32 bytes
71                |                               |  *
72        sp + 32 +-------------------------------+  *
73                |                               |  *
74                |      input register set       |  *  32 bytes
75                |                               |  *
76            sp  +-------------------------------+  *
77
78
79* = minimal stack frame
80
81x = optional components
82
83EF bit in the PSR
84=================
85
86The EF (enable floating point unit) in the PSR is utilized in this port to
87prevent non-floating point tasks from performing floating point
88operations. This bit is maintained as part of the integer context.
89However, the floating point context is switched BEFORE the integer
90context.  Thus the EF bit in place at the time of the FP switch may
91indicate that FP operations are disabled.  This occurs on certain task
92switches, when the EF bit will be 0 for the outgoing task and thus a fault
93will be generated on the first FP operation of the FP context save.
94
95The remedy for this is to enable FP access as the first step in both the
96save and restore of the FP context area.  This bit will be subsequently
97reloaded by the integer context switch.
98
99Two of the scenarios which demonstrate this problem are outlined below:
100
1011. When the first FP task is switched to.  The system tasks are not FP and
102thus would be unable to restore the FP context of the incoming task.
103
1042. On a deferred FP context switch. In this case, the system might switch
105from FP Task A to non-FP Task B and then to FP Task C.  In this scenario,
106the floating point state must technically be saved by a non-FP task.
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