source: rtems/cpukit/score/cpu/riscv32/riscv-context-validate.S @ 660db8c8

Last change on this file since 660db8c8 was 660db8c8, checked in by Hesham Almatary <hesham@…>, on Oct 26, 2017 at 11:12:41 PM

cpukit: Add basic riscv32 architecture port v3

Limitations:

  • NO FPU support [TODO]

Update #3109

  • Property mode set to 100644
File size: 5.6 KB
Line 
1/*
2 * Copyrigh (c) 2015 Hesham Almatary <hesham@alumni.york.ac.uk>
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 * 1. Redistributions of source code must retain the above copyright
8 *    notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 *    notice, this list of conditions and the following disclaimer in the
11 *    documentation and/or other materials provided with the distribution.
12 *
13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
23 * SUCH DAMAGE.
24 */
25
26#ifdef HAVE_CONFIG_H
27#include "config.h"
28#endif
29
30#include <rtems/asm.h>
31#include <rtems/score/cpu.h>
32
33.section        .text
34
35#define SREG sw
36#define LREG lw
37
38PUBLIC(_CPU_Context_validate)
39SYM(_CPU_Context_validate):
40  addi sp, sp, -144
41
42  SREG x1, (1 * CPU_SIZEOF_POINTER)(sp)
43  /* Skip x2/sp */
44  SREG x3, (3 * CPU_SIZEOF_POINTER)(sp)
45  SREG x4, (4 * CPU_SIZEOF_POINTER)(sp)
46  SREG x5, (5 * CPU_SIZEOF_POINTER)(sp)
47  SREG x6, (6 * CPU_SIZEOF_POINTER)(sp)
48  SREG x7, (7 * CPU_SIZEOF_POINTER)(sp)
49  SREG x8, (8 * CPU_SIZEOF_POINTER)(sp)
50  SREG x9, (9 * CPU_SIZEOF_POINTER)(sp)
51  SREG x10, (10 * CPU_SIZEOF_POINTER)(sp)
52  SREG x11, (11 * CPU_SIZEOF_POINTER)(sp)
53  SREG x12, (12 * CPU_SIZEOF_POINTER)(sp)
54  SREG x13, (13 * CPU_SIZEOF_POINTER)(sp)
55  SREG x14, (14 * CPU_SIZEOF_POINTER)(sp)
56  SREG x15, (15 * CPU_SIZEOF_POINTER)(sp)
57  SREG x16, (16 * CPU_SIZEOF_POINTER)(sp)
58  SREG x17, (17 * CPU_SIZEOF_POINTER)(sp)
59  SREG x18, (18 * CPU_SIZEOF_POINTER)(sp)
60  SREG x19, (19 * CPU_SIZEOF_POINTER)(sp)
61  SREG x20, (20 * CPU_SIZEOF_POINTER)(sp)
62  SREG x21, (21 * CPU_SIZEOF_POINTER)(sp)
63  SREG x22, (22 * CPU_SIZEOF_POINTER)(sp)
64  SREG x23, (23 * CPU_SIZEOF_POINTER)(sp)
65  SREG x24, (24 * CPU_SIZEOF_POINTER)(sp)
66  SREG x25, (25 * CPU_SIZEOF_POINTER)(sp)
67  SREG x26, (26 * CPU_SIZEOF_POINTER)(sp)
68  SREG x27, (27 * CPU_SIZEOF_POINTER)(sp)
69  SREG x28, (28 * CPU_SIZEOF_POINTER)(sp)
70  SREG x29, (28 * CPU_SIZEOF_POINTER)(sp)
71  SREG x30, (30 * CPU_SIZEOF_POINTER)(sp)
72  SREG x31, (31 * CPU_SIZEOF_POINTER)(sp)
73
74  /* Fill */
75
76  /* t0 is used for temporary values */
77  mv t0, x0
78
79  /* x31 contains the stack pointer */
80  mv x31, sp
81
82  .macro fill_register reg
83  addi  t0, t0,  1
84  mv    \reg, t0
85  .endm
86
87  fill_register x1
88  fill_register x2
89  fill_register x3
90  fill_register x4
91  fill_register x5
92  fill_register x6
93  fill_register x7
94  fill_register x8
95  fill_register x9
96  fill_register x10
97  fill_register x11
98  fill_register x12
99  fill_register x13
100  fill_register x14
101  fill_register x15
102  fill_register x16
103  fill_register x17
104  fill_register x18
105  fill_register x19
106  fill_register x20
107  fill_register x21
108  fill_register x22
109  fill_register x23
110  fill_register x24
111  fill_register x25
112  fill_register x26
113  fill_register x27
114  fill_register x28
115  fill_register x29
116  fill_register x30
117  fill_register x31
118
119  /* Check */
120check:
121
122  .macro check_register reg
123  addi t0, t0, 1
124  bne \reg, t0, restore
125  .endm
126
127  bne   x31, sp, restore
128
129  mv t0, x0
130
131  check_register        x1
132  check_register        x2
133  check_register        x3
134  check_register        x4
135  check_register        x5
136  check_register        x6
137  check_register        x7
138  check_register        x8
139  check_register        x9
140  check_register        x10
141  check_register        x11
142  check_register        x12
143  check_register        x13
144  check_register        x14
145  check_register        x15
146  check_register        x16
147  check_register        x17
148  check_register        x18
149  check_register        x19
150  check_register        x20
151  check_register        x21
152  check_register        x22
153  check_register        x23
154  check_register        x24
155  check_register        x25
156  check_register        x26
157  check_register        x27
158  check_register        x28
159  check_register        x29
160  check_register        x30
161  check_register        x31
162
163  j check
164
165  /* Restore */
166restore:
167  LREG x1, (1 * CPU_SIZEOF_POINTER)(sp)
168  /* Skip sp/x2 */
169  LREG x3, (3 * CPU_SIZEOF_POINTER)(sp)
170  LREG x4, (4 * CPU_SIZEOF_POINTER)(sp)
171  LREG x5, (5 * CPU_SIZEOF_POINTER)(sp)
172  LREG x6, (6 * CPU_SIZEOF_POINTER)(sp)
173  LREG x7, (7 * CPU_SIZEOF_POINTER)(sp)
174  LREG x8, (8 * CPU_SIZEOF_POINTER)(sp)
175  LREG x9, (9 * CPU_SIZEOF_POINTER)(sp)
176  LREG x10, (10 * CPU_SIZEOF_POINTER)(sp)
177  LREG x11, (11 * CPU_SIZEOF_POINTER)(sp)
178  LREG x12, (12 * CPU_SIZEOF_POINTER)(sp)
179  LREG x13, (13 * CPU_SIZEOF_POINTER)(sp)
180  LREG x14, (14 * CPU_SIZEOF_POINTER)(sp)
181  LREG x15, (15 * CPU_SIZEOF_POINTER)(sp)
182  LREG x16, (16 * CPU_SIZEOF_POINTER)(sp)
183  LREG x17, (17 * CPU_SIZEOF_POINTER)(sp)
184  LREG x18, (18 * CPU_SIZEOF_POINTER)(sp)
185  LREG x19, (19 * CPU_SIZEOF_POINTER)(sp)
186  LREG x20, (20 * CPU_SIZEOF_POINTER)(sp)
187  LREG x21, (21 * CPU_SIZEOF_POINTER)(sp)
188  LREG x22, (22 * CPU_SIZEOF_POINTER)(sp)
189  LREG x23, (23 * CPU_SIZEOF_POINTER)(sp)
190  LREG x24, (24 * CPU_SIZEOF_POINTER)(sp)
191  LREG x25, (25 * CPU_SIZEOF_POINTER)(sp)
192  LREG x26, (26 * CPU_SIZEOF_POINTER)(sp)
193  LREG x27, (27 * CPU_SIZEOF_POINTER)(sp)
194  LREG x28, (28 * CPU_SIZEOF_POINTER)(sp)
195  LREG x29, (29 * CPU_SIZEOF_POINTER)(sp)
196  LREG x30, (30 * CPU_SIZEOF_POINTER)(sp)
197
198  LREG x31, (31 * CPU_SIZEOF_POINTER)(sp)
199
200  addi sp, sp, 144
201  ret
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