1 | /** |
---|
2 | * @file rtems/score/riscv.h |
---|
3 | */ |
---|
4 | |
---|
5 | /* |
---|
6 | * This file contains information pertaining to the riscv32 processor. |
---|
7 | * |
---|
8 | * COPYRIGHT (c) 2014 Hesham Almatary <heshamelmatary@gmail.com> |
---|
9 | * |
---|
10 | * Based on code with the following copyright... |
---|
11 | * COPYRIGHT (c) 1989-1999, 2010. |
---|
12 | * On-Line Applications Research Corporation (OAR). |
---|
13 | * |
---|
14 | * Redistribution and use in source and binary forms, with or without |
---|
15 | * modification, are permitted provided that the following conditions |
---|
16 | * are met: |
---|
17 | * 1. Redistributions of source code must retain the above copyright |
---|
18 | * notice, this list of conditions and the following disclaimer. |
---|
19 | * 2. Redistributions in binary form must reproduce the above copyright |
---|
20 | * notice, this list of conditions and the following disclaimer in the |
---|
21 | * documentation and/or other materials provided with the distribution. |
---|
22 | * |
---|
23 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND |
---|
24 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
---|
25 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
---|
26 | * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE |
---|
27 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
---|
28 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
---|
29 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
---|
30 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
---|
31 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
---|
32 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
---|
33 | * SUCH DAMAGE. |
---|
34 | */ |
---|
35 | |
---|
36 | #ifndef _RTEMS_SCORE_RISCV_H |
---|
37 | #define _RTEMS_SCORE_RISCV_H |
---|
38 | |
---|
39 | #ifdef __cplusplus |
---|
40 | extern "C" { |
---|
41 | #endif |
---|
42 | |
---|
43 | /* |
---|
44 | * This file contains the information required to build |
---|
45 | * RTEMS for a particular member of the RISCV family. |
---|
46 | * It does this by setting variables to indicate which |
---|
47 | * implementation dependent features are present in a particular |
---|
48 | * member of the family. |
---|
49 | * |
---|
50 | * This is a good place to list all the known CPU models |
---|
51 | * that this port supports and which RTEMS CPU model they correspond |
---|
52 | * to. |
---|
53 | */ |
---|
54 | |
---|
55 | /* |
---|
56 | * Define the name of the CPU family and specific model. |
---|
57 | */ |
---|
58 | |
---|
59 | #define CPU_NAME "RISCV" |
---|
60 | #define CPU_MODEL_NAME "RISCV" |
---|
61 | |
---|
62 | #ifdef __cplusplus |
---|
63 | } |
---|
64 | #endif |
---|
65 | |
---|
66 | #endif /* _RTEMS_SCORE_RISCV_H */ |
---|