source: rtems/cpukit/score/cpu/riscv/include/rtems/asm.h @ bca36d9

5
Last change on this file since bca36d9 was bca36d9, checked in by Sebastian Huber <sebastian.huber@…>, on 07/06/18 at 09:07:20

riscv: Add LADDR assembler define

An address must be loaded to a register according to the code model.
Add LADDR define for use in assembler code.

Update #3433.

  • Property mode set to 100644
File size: 4.6 KB
Line 
1/**
2 * @file rtems/asm.h
3 *
4 *  This include file attempts to address the problems
5 *  caused by incompatible flavors of assemblers and
6 *  toolsets.  It primarily addresses variations in the
7 *  use of leading underscores on symbols and the requirement
8 *  that register names be preceded by a %.
9 */
10
11/*
12 *  NOTE: The spacing in the use of these macros
13 *        is critical to them working as advertised.
14 *
15 *  This file is based on similar code found in newlib available
16 *  from ftp.cygnus.com.  The file which was used had no copyright
17 *  notice.  This file is freely distributable as long as the source
18 *  of the file is noted.  This file is:
19 *
20 * Copyright (c) 2015 University of York.
21 * Hesham Almatary <hesham@alumni.york.ac.uk>
22 *
23 *
24 * COPYRIGHT (c) 1994-1997.
25 * On-Line Applications Research Corporation (OAR).
26 *
27 * Redistribution and use in source and binary forms, with or without
28 * modification, are permitted provided that the following conditions
29 * are met:
30 * 1. Redistributions of source code must retain the above copyright
31 *    notice, this list of conditions and the following disclaimer.
32 * 2. Redistributions in binary form must reproduce the above copyright
33 *    notice, this list of conditions and the following disclaimer in the
34 *    documentation and/or other materials provided with the distribution.
35 *
36 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
37 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
38 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
39 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
40 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
41 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
42 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
43 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
44 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
45 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
46 * SUCH DAMAGE.
47 */
48
49#ifndef __RISCV_ASM_H
50#define __RISCV_ASM_H
51
52/*
53 *  Indicate we are in an assembly file and get the basic CPU definitions.
54 */
55
56#ifndef ASM
57#define ASM
58#endif
59#include <rtems/score/cpuopts.h>
60#include <rtems/score/riscv.h>
61
62/*
63 *  Recent versions of GNU cpp define variables which indicate the
64 *  need for underscores and percents.  If not using GNU cpp or
65 *  the version does not support this, then you will obviously
66 *  have to define these as appropriate.
67 */
68
69#ifndef __USER_LABEL_PREFIX__
70#define __USER_LABEL_PREFIX__ _
71#endif
72
73#ifndef __REGISTER_PREFIX__
74#define __REGISTER_PREFIX__
75#endif
76
77/* ANSI concatenation macros.  */
78
79#define CONCAT1(a, b) CONCAT2(a, b)
80#define CONCAT2(a, b) a ## b
81
82/* Use the right prefix for global labels.  */
83
84#define SYM(x) CONCAT1 (__USER_LABEL_PREFIX__, x)
85
86/* Use the right prefix for registers.  */
87
88#define REG(x) CONCAT1 (__REGISTER_PREFIX__, x)
89
90/*
91 *  define macros for all of the registers on this CPU
92 *
93 *  EXAMPLE:     #define d0 REG (d0)
94 */
95
96/*
97 *  Define macros to handle section beginning and ends.
98 */
99#define BEGIN_CODE_DCL .text
100#define END_CODE_DCL
101#define BEGIN_DATA_DCL .data
102#define END_DATA_DCL
103#define BEGIN_CODE .text
104#define END_CODE
105#define BEGIN_DATA
106#define END_DATA
107#define BEGIN_BSS
108#define END_BSS
109#define END
110
111/*
112 *  Following must be tailor for a particular flavor of the C compiler.
113 *  They may need to put underscores in front of the symbols.
114 */
115
116#define PUBLIC(sym)    .global SYM (sym)
117#define EXTERN(sym)    .extern SYM (sym)
118#define TYPE_FUNC(sym) .type SYM (sym), %function
119
120#if __riscv_xlen == 32
121
122#define LREG lw
123
124#define SREG sw
125
126#elif __riscv_xlen == 64
127
128#define LREG ld
129
130#define SREG sd
131
132#endif /* __riscv_xlen */
133
134#ifdef __riscv_cmodel_medany
135
136#define LADDR lla
137
138#else /* !__riscv_cmodel_medany */
139
140#define LADDR la
141
142#endif /* __riscv_cmodel_medany */
143
144#if __riscv_flen == 32
145
146#define FLREG flw
147
148#define FSREG fsw
149
150#define FMVYX fmv.s.x
151
152#define FMVXY fmv.x.s
153
154#elif __riscv_flen == 64
155
156#define FLREG fld
157
158#define FSREG fsd
159
160#if __riscv_xlen == 32
161
162#define FMVYX fmv.s.x
163
164#define FMVXY fmv.x.s
165
166#elif __riscv_xlen == 64
167
168#define FMVYX fmv.d.x
169
170#define FMVXY fmv.x.d
171
172#endif /* __riscv_xlen */
173
174#endif /* __riscv_flen */
175
176.macro GET_SELF_CPU_CONTROL REG
177#ifdef RTEMS_SMP
178        csrr    \REG, mscratch
179#else
180        LADDR   \REG, _Per_CPU_Information
181#endif
182.endm
183
184.macro CLEAR_RESERVATIONS REG
185#ifdef __riscv_atomic
186        /*
187         * Clear reservations, see also RISC-V User-Level ISA V2.3, comment in
188         * section 8.2 "Load-Reserved/Store-Conditional Instructions".
189         */
190        sc.w    zero, zero, (\REG)
191#endif
192.endm
193
194#endif
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