source: rtems/cpukit/score/cpu/powerpc/rtems/score/powerpc.h @ 83b9299

4.104.114.84.95
Last change on this file since 83b9299 was 83b9299, checked in by Ralf Corsepius <ralf.corsepius@…>, on Feb 13, 2005 at 10:36:20 AM

2005-02-13 Ralf Corsepius <ralf.corsepius@…>

  • rtems/score/powerpc.h: Remove PPC_CACHE_ALIGN_POWER (Unused).
  • Property mode set to 100644
File size: 18.5 KB
Line 
1/**
2 * @file rtems/score/powerpc.h
3 */
4
5/*
6 *  This file contains definitions for the IBM/Motorola PowerPC
7 *  family members.
8 *
9 *  Author:     Andrew Bray <andy@i-cubed.co.uk>
10 *
11 *  COPYRIGHT (c) 1995 by i-cubed ltd.
12 *
13 *  MPC860 support code was added by Jay Monkman <jmonkman@frasca.com>
14 *  MPC8260 support added by Andy Dachs <a.dachs@sstl.co.uk>
15 *  Surrey Satellite Technology Limited
16 *
17 *  To anyone who acknowledges that this file is provided "AS IS"
18 *  without any express or implied warranty:
19 *      permission to use, copy, modify, and distribute this file
20 *      for any purpose is hereby granted without fee, provided that
21 *      the above copyright notice and this notice appears in all
22 *      copies, and that the name of i-cubed limited not be used in
23 *      advertising or publicity pertaining to distribution of the
24 *      software without specific, written prior permission.
25 *      i-cubed limited makes no representations about the suitability
26 *      of this software for any purpose.
27 *
28 *  Derived from c/src/exec/cpu/no_cpu/no_cpu.h:
29 *
30 *  COPYRIGHT (c) 1989-1997.
31 *  On-Line Applications Research Corporation (OAR).
32 *
33 *  The license and distribution terms for this file may in
34 *  the file LICENSE in this distribution or at
35 *  http://www.rtems.com/license/LICENSE.
36 *
37 *
38 * Note:
39 *      This file is included by both C and assembler code ( -DASM )
40 *
41 *  $Id$
42 */
43
44
45#ifndef _RTEMS_SCORE_POWERPC_H
46#define _RTEMS_SCORE_POWERPC_H
47
48#ifdef __cplusplus
49extern "C" {
50#endif
51
52#include <rtems/score/types.h>
53
54/*
55 *  Define the name of the CPU family.
56 */
57
58#define CPU_NAME "PowerPC"
59
60/*
61 *  This file contains the information required to build
62 *  RTEMS for a particular member of the PowerPC family.  It does
63 *  this by setting variables to indicate which implementation
64 *  dependent features are present in a particular member
65 *  of the family.
66 *
67 *  The following architectural feature definitions are defaulted
68 *  unless specifically set by the model definition:
69 *
70 *    + PPC_INTERRUPT_MAX        - 16
71 *    + PPC_CACHE_ALIGNMENT      - 32
72 *    + PPC_HAS_EXCEPTION_PREFIX - 1
73 *    + PPC_HAS_FPU              - 1
74 *    + PPC_HAS_DOUBLE           - 1 if PPC_HAS_FPU,
75 *                               - 0 otherwise
76 */
77 
78/*
79 *  Figure out all CPU Model Feature Flags based upon compiler
80 *  predefines.
81 */
82
83#if defined(ppc403) || defined(ppc405)
84/*
85 *  IBM 403
86 *
87 *  Developed for 403GA.  Book checked for 403GB.
88 *
89 *  Does not have user mode.
90 */
91 
92#if defined(ppc403)
93#define CPU_MODEL_NAME "PowerPC 403"
94#elif defined (ppc405)
95#define CPU_MODEL_NAME "PowerPC 405"
96#endif
97#define PPC_ALIGNMENT           4 
98#define PPC_CACHE_ALIGNMENT     16
99#define PPC_HAS_RFCI            1
100
101#define PPC_HAS_EXCEPTION_PREFIX 0
102
103#elif defined(mpc555)
104
105#define CPU_MODEL_NAME  "PowerPC 555"
106
107/* Copied from mpc505 */
108#define PPC_ALIGNMENT           4
109#define PPC_CACHE_ALIGNMENT     16
110
111#elif defined(mpc505) || defined(mpc509)
112/*
113 *  Submitted by Sergei Organov <osv@Javad.RU> as a patch against
114 *  3.6.0 long after 4.0 was released.   This is just an attempt
115 *  to get the setting correct.
116 */
117
118#define CPU_MODEL_NAME  "PowerPC 505/509"
119
120#define PPC_ALIGNMENT           4
121#define PPC_CACHE_ALIGNMENT     16
122
123#elif defined(ppc601)
124
125/*
126 *  Submitted with original port -- book checked only.
127 */
128 
129#define CPU_MODEL_NAME  "PowerPC 601"
130
131#define PPC_ALIGNMENT           8
132
133#elif defined(ppc602)
134/*
135 *  Submitted with original port -- book checked only.
136 */
137 
138#define CPU_MODEL_NAME  "PowerPC 602"
139
140#define PPC_ALIGNMENT           4
141#define PPC_HAS_DOUBLE          0
142
143#elif defined(ppc603)
144/*
145 *  Submitted with original port -- book checked only.
146 */
147 
148#define CPU_MODEL_NAME  "PowerPC 603"
149
150#define PPC_ALIGNMENT           8
151
152#elif defined(ppc603e)
153 
154#define CPU_MODEL_NAME  "PowerPC 603e"
155/*
156 *  Submitted with original port.
157 *
158 *  Known to work on real hardware.
159 */
160
161#define PPC_ALIGNMENT           8
162
163#elif defined(mpc604)
164/*
165 *  Submitted with original port -- book checked only.
166 */
167 
168#define CPU_MODEL_NAME  "PowerPC 604"
169
170#define PPC_ALIGNMENT           8
171 
172#elif defined(mpc860)
173/*
174 *  Added by Jay Monkman (jmonkman@frasca.com) 6/28/98
175 *  with some changes by Darlene Stewart (Darlene.Stewart@iit.nrc.ca)
176 */ 
177#define CPU_MODEL_NAME  "PowerPC MPC860"
178
179#define PPC_ALIGNMENT           4
180#define PPC_CACHE_ALIGNMENT     16
181#define PPC_INTERRUPT_MAX       71
182
183#elif defined(mpc821)
184/*
185 *  Added by Andrew Bray <andy@chaos.org.uk> 6/April/1999
186 */ 
187#define CPU_MODEL_NAME  "PowerPC MPC821"
188
189#define PPC_ALIGNMENT           4
190#define PPC_CACHE_ALIGNMENT     16
191#define PPC_INTERRUPT_MAX       71
192
193#elif defined(mpc750)
194
195#define CPU_MODEL_NAME  "PowerPC 750"
196
197#define PPC_ALIGNMENT           8
198
199#elif defined(mpc7400)
200
201#define CPU_MODEL_NAME  "PowerPC 7400"
202
203#define PPC_ALIGNMENT           8
204
205#elif defined(mpc7455)
206/*
207 *  Added by S.K. Feng <feng1@bnl.gov> 10/03
208 */
209
210#define CPU_MODEL_NAME  "PowerPC 7455"
211
212#define PPC_ALIGNMENT           8
213#define PPC_CACHE_ALIGNMENT     32
214
215#elif defined(mpc8260)
216/*
217 *  Added by Andy Dachs <a.dachs@sstl.co.uk> 23/11/2000
218 */
219#define CPU_MODEL_NAME  "PowerPC MPC8260"
220
221#define PPC_ALIGNMENT           4
222#define PPC_CACHE_ALIGNMENT     32
223#define PPC_INTERRUPT_MAX       125
224#else
225 
226#error "Unsupported CPU Model"
227 
228#endif
229
230/*
231 *  Application binary interfaces.
232 *
233 *  PPC_ABI MUST be defined as one of these.
234 *  Only big endian is currently supported.
235 */
236/*
237 *  SVR4 ABI
238 */
239#define PPC_ABI_SVR4            2
240/*
241 *  Embedded ABI
242 */
243#define PPC_ABI_EABI            3
244
245/*
246 *  Default to the EABI used by current GNU tools
247 */
248
249#ifndef PPC_ABI
250#define PPC_ABI PPC_ABI_EABI
251#endif
252
253#if (PPC_ABI == PPC_ABI_SVR4)
254#define PPC_STACK_ALIGNMENT     16
255#elif (PPC_ABI == PPC_ABI_EABI)
256#define PPC_STACK_ALIGNMENT     8
257#else
258#error  "PPC_ABI is not properly defined"
259#endif
260
261/*
262 *  Assemblers.
263 *  PPC_ASM MUST be defined as one of these.
264 *
265 *  PPC_ASM_ELF:   ELF assembler. Currently used for all ABIs.
266 *
267 *  NOTE: Only PPC_ABI_ELF is currently fully supported.
268 */
269
270#define PPC_ASM_ELF   0
271
272/*
273 *  Default to the assembler format used by the current GNU tools.
274 */
275
276#ifndef PPC_ASM
277#define PPC_ASM PPC_ASM_ELF
278#endif
279
280/*
281 *  If the maximum number of exception sources has not been defined,
282 *  then default it to 16.
283 */
284
285#ifndef PPC_INTERRUPT_MAX
286#define PPC_INTERRUPT_MAX       16
287#endif
288
289/*
290 *  Unless specified otherwise, the cache line size is defaulted to 32.
291 *
292 *  The derive the power of 2 the cache line is.
293 */
294
295#ifndef PPC_CACHE_ALIGNMENT
296#define PPC_CACHE_ALIGNMENT 32
297#endif
298
299/*
300 *  Unless otherwise specified, assume the model has an IP/EP bit to
301 *  set the exception address prefix.
302 */
303
304#ifndef PPC_HAS_EXCEPTION_PREFIX
305#define PPC_HAS_EXCEPTION_PREFIX 1
306#endif
307
308/*
309 *  Unless specified above, assume PPC_HAS_FPU to be a synonym for _SOFT_FLOAT.
310 *  FIXME: Should we tie PPC_HAS_FPU to _SOFT_FLOAT, directly
311 *     and disallow explicitly setting PPC_HAS_FPU?
312 */
313
314#ifndef PPC_HAS_FPU
315#ifdef _SOFT_FLOAT
316#define PPC_HAS_FPU 0
317#else
318#define PPC_HAS_FPU 1
319#endif
320#endif
321
322/*
323 *  Unless specified above, If the model has FP support, it is assumed to
324 *  support doubles (8-byte floating point numbers).
325 *
326 *  If the model does NOT have FP support, then the model does
327 *  NOT have double length FP registers.
328 */
329
330#ifndef PPC_HAS_DOUBLE
331#if (PPC_HAS_FPU)
332#define PPC_HAS_DOUBLE 1
333#else
334#define PPC_HAS_DOUBLE 0
335#endif
336#endif
337
338/*
339 *  Unless specified above, then assume the model does NOT have critical
340 *  interrupt support.
341 */
342
343#ifndef PPC_HAS_RFCI
344#define PPC_HAS_RFCI 0
345#endif
346
347/*
348 *  The following exceptions are not maskable, and are not
349 *  necessarily predictable, so cannot be offered to RTEMS:
350 *    Alignment exception - handled by the CPU module
351 *    Data exceptions.
352 *    Instruction exceptions.
353 */
354
355/*
356 *  Base Interrupt vectors supported on all models.
357 */
358#define PPC_IRQ_SYSTEM_RESET     0 /* 0x00100 - System reset.              */
359#define PPC_IRQ_MCHECK           1 /* 0x00200 - Machine check              */
360#define PPC_IRQ_PROTECT          2 /* 0x00300 - Protection violation       */
361#define PPC_IRQ_ISI              3 /* 0x00400 - Instruction Fetch error    */
362#define PPC_IRQ_EXTERNAL         4 /* 0x00500 - External interrupt         */
363#define PPC_IRQ_ALIGNMENT        5 /* 0X00600 - Alignment exception        */
364#define PPC_IRQ_PROGRAM          6 /* 0x00700 - Program exception          */
365#define PPC_IRQ_NOFP             7 /* 0x00800 - Floating point unavailable */
366#define PPC_IRQ_DECREMENTER      8 /* 0x00900 - Decrementer interrupt      */
367#define PPC_IRQ_RESERVED_A       9 /* 0x00a00 - Implementation Reserved    */
368#define PPC_IRQ_RESERVED_B      10 /* 0x00b00 - Implementation Reserved    */
369#define PPC_IRQ_SCALL           11 /* 0x00c00 - System call                */
370#define PPC_IRQ_TRACE           12 /* 0x00d00 - Trace Exception            */
371#define PPC_IRQ_FP_ASST         13 /* ox00e00 - Floating point assist      */
372#define PPC_STD_IRQ_LAST        PPC_IRQ_FP_ASST
373
374#define PPC_IRQ_FIRST           PPC_IRQ_SYSTEM_RESET
375
376#if defined(ppc403) || defined(ppc405)
377                                 
378#define PPC_IRQ_CRIT     PPC_IRQ_SYSTEM_RESET /*0x00100- Critical int. pin */
379#define PPC_IRQ_PIT      (PPC_STD_IRQ_LAST+1) /*0x01000- Pgm interval timer*/
380#define PPC_IRQ_FIT      (PPC_STD_IRQ_LAST+2) /*0x01010- Fixed int. timer  */
381#define PPC_IRQ_WATCHDOG (PPC_STD_IRQ_LAST+3) /*0x01020- Watchdog timer    */
382#define PPC_IRQ_DEBUG    (PPC_STD_IRQ_LAST+4) /*0x02000- Debug exceptions  */
383#define PPC_IRQ_LAST     PPC_IRQ_DEBUG
384
385#elif defined(mpc505) || defined(mpc509)
386#define PPC_IRQ_SOFTEMU   (PPC_STD_IRQ_LAST+1)    /* Software emulation. */
387#define PPC_IRQ_DATA_BP   (PPC_STD_IRQ_LAST+ 2)
388#define PPC_IRQ_INST_BP   (PPC_STD_IRQ_LAST+ 3)
389#define PPC_IRQ_MEXT_BP   (PPC_STD_IRQ_LAST+ 4)
390#define PPC_IRQ_NMEXT_BP  (PPC_STD_IRQ_LAST+ 5)
391
392#elif defined(mpc555)
393#define PPC_IRQ_SOFTEMU   (PPC_STD_IRQ_LAST+1)  /* Software emulation. */
394#define PPC_IRQ_INST_PE   (PPC_STD_IRQ_LAST+2)  /* Insn protection error */
395#define PPC_IRQ_DATA_PE   (PPC_STD_IRQ_LAST+3)  /* Data protection error */
396#define PPC_IRQ_DATA_BP   (PPC_STD_IRQ_LAST+4)  /* Data breakpoint */
397#define PPC_IRQ_INST_BP   (PPC_STD_IRQ_LAST+5)  /* Insn breakpoint */
398#define PPC_IRQ_MEXT_BP   (PPC_STD_IRQ_LAST+6)  /* Maskable ext bkpt */
399#define PPC_IRQ_NMEXT_BP  (PPC_STD_IRQ_LAST+7)  /* Non-maskable ext bkpt */
400#define PPC_IRQ_LAST      PPC_IRQ_NMEXT_BP
401
402#elif defined(ppc601)
403#define PPC_IRQ_TRACE    (PPC_STD_IRQ_LAST+1) /*0x02000-Run/Trace Exception*/
404#define PPC_IRQ_LAST     PPC_IRQ_TRACE       
405
406#elif defined(ppc602)
407#define PPC_IRQ_LAST     (PPC_STD_IRQ_LAST)
408
409#elif defined(ppc603)
410#define PPC_IRQ_TRANS_MISS (PPC_STD_IRQ_LAST+1) /*0x1000-Ins Translation Miss*/
411#define PPC_IRQ_DATA_LOAD  (PPC_STD_IRQ_LAST+2) /*0x1100-Data Load Trans Miss*/
412#define PPC_IRQ_DATA_STORE (PPC_STD_IRQ_LAST+3) /*0x1200-Data Store Miss     */
413#define PPC_IRQ_ADDR_BRK   (PPC_STD_IRQ_LAST+4) /*0x1300-Instruction Bkpoint */
414#define PPC_IRQ_SYS_MGT    (PPC_STD_IRQ_LAST+5) /*0x1400-System Management   */
415#define PPC_IRQ_LAST       PPC_IRQ_SYS_MGT   
416
417#elif defined(ppc603e)
418#define PPC_TLB_INST_MISS  (PPC_STD_IRQ_LAST+1) /*0x1000-Instruction TLB Miss*/
419#define PPC_TLB_LOAD_MISS  (PPC_STD_IRQ_LAST+2) /*0x1100-TLB miss on load  */
420#define PPC_TLB_STORE_MISS (PPC_STD_IRQ_LAST+3) /*0x1200-TLB Miss on store */
421#define PPC_IRQ_ADDRBRK    (PPC_STD_IRQ_LAST+4) /*0x1300-Instruct addr break */
422#define PPC_IRQ_SYS_MGT    (PPC_STD_IRQ_LAST+5) /*0x1400-System Management   */
423#define PPC_IRQ_LAST       PPC_IRQ_SYS_MGT   
424
425
426#elif defined(mpc604)
427#define PPC_IRQ_ADDR_BRK (PPC_STD_IRQ_LAST+1) /*0x1300- Inst. addr break  */
428#define PPC_IRQ_SYS_MGT  (PPC_STD_IRQ_LAST+2) /*0x1400- System Management */
429#define PPC_IRQ_LAST     PPC_IRQ_SYS_MGT 
430
431#elif defined(mpc860) || defined(mpc821)
432#define PPC_IRQ_EMULATE         (PPC_STD_IRQ_LAST+1) /*0x1000-Software emulation  */
433#define PPC_IRQ_INST_MISS       (PPC_STD_IRQ_LAST+2) /*0x1100-Instruction TLB miss*/
434#define PPC_IRQ_DATA_MISS       (PPC_STD_IRQ_LAST+3) /*0x1200-Data TLB miss */
435#define PPC_IRQ_INST_ERR        (PPC_STD_IRQ_LAST+4) /*0x1300-Instruction TLB err */
436#define PPC_IRQ_DATA_ERR        (PPC_STD_IRQ_LAST+5) /*0x1400-Data TLB error */
437#define PPC_IRQ_DATA_BPNT       (PPC_STD_IRQ_LAST+6) /*0x1C00-Data breakpoint */
438#define PPC_IRQ_INST_BPNT       (PPC_STD_IRQ_LAST+7) /*0x1D00-Inst breakpoint */
439#define PPC_IRQ_IO_BPNT         (PPC_STD_IRQ_LAST+8) /*0x1E00-Peripheral breakpnt */
440#define PPC_IRQ_DEV_PORT        (PPC_STD_IRQ_LAST+9) /*0x1F00-Development port */
441#define PPC_IRQ_IRQ0            (PPC_STD_IRQ_LAST + 10)
442#define PPC_IRQ_LVL0            (PPC_STD_IRQ_LAST + 11)
443#define PPC_IRQ_IRQ1            (PPC_STD_IRQ_LAST + 12)
444#define PPC_IRQ_LVL1            (PPC_STD_IRQ_LAST + 13)
445#define PPC_IRQ_IRQ2            (PPC_STD_IRQ_LAST + 14)
446#define PPC_IRQ_LVL2            (PPC_STD_IRQ_LAST + 15)
447#define PPC_IRQ_IRQ3            (PPC_STD_IRQ_LAST + 16)
448#define PPC_IRQ_LVL3            (PPC_STD_IRQ_LAST + 17)
449#define PPC_IRQ_IRQ4            (PPC_STD_IRQ_LAST + 18)
450#define PPC_IRQ_LVL4            (PPC_STD_IRQ_LAST + 19)
451#define PPC_IRQ_IRQ5            (PPC_STD_IRQ_LAST + 20)
452#define PPC_IRQ_LVL5            (PPC_STD_IRQ_LAST + 21)
453#define PPC_IRQ_IRQ6            (PPC_STD_IRQ_LAST + 22)
454#define PPC_IRQ_LVL6            (PPC_STD_IRQ_LAST + 23)
455#define PPC_IRQ_IRQ7            (PPC_STD_IRQ_LAST + 24)
456#define PPC_IRQ_LVL7            (PPC_STD_IRQ_LAST + 25)
457#define PPC_IRQ_CPM_ERROR       (PPC_STD_IRQ_LAST + 26)
458#define PPC_IRQ_CPM_PC4         (PPC_STD_IRQ_LAST + 27)
459#define PPC_IRQ_CPM_PC5         (PPC_STD_IRQ_LAST + 28)
460#define PPC_IRQ_CPM_SMC2        (PPC_STD_IRQ_LAST + 29)
461#define PPC_IRQ_CPM_SMC1        (PPC_STD_IRQ_LAST + 30)
462#define PPC_IRQ_CPM_SPI         (PPC_STD_IRQ_LAST + 31)
463#define PPC_IRQ_CPM_PC6         (PPC_STD_IRQ_LAST + 32)
464#define PPC_IRQ_CPM_TIMER4      (PPC_STD_IRQ_LAST + 33)
465#define PPC_IRQ_CPM_RESERVED_8  (PPC_STD_IRQ_LAST + 34)
466#define PPC_IRQ_CPM_PC7         (PPC_STD_IRQ_LAST + 35)
467#define PPC_IRQ_CPM_PC8         (PPC_STD_IRQ_LAST + 36)
468#define PPC_IRQ_CPM_PC9         (PPC_STD_IRQ_LAST + 37)
469#define PPC_IRQ_CPM_TIMER3      (PPC_STD_IRQ_LAST + 38)
470#define PPC_IRQ_CPM_RESERVED_D  (PPC_STD_IRQ_LAST + 39)
471#define PPC_IRQ_CPM_PC10        (PPC_STD_IRQ_LAST + 40)
472#define PPC_IRQ_CPM_PC11        (PPC_STD_IRQ_LAST + 41)
473#define PPC_IRQ_CPM_I2C         (PPC_STD_IRQ_LAST + 42)
474#define PPC_IRQ_CPM_RISC_TIMER  (PPC_STD_IRQ_LAST + 43)
475#define PPC_IRQ_CPM_TIMER2      (PPC_STD_IRQ_LAST + 44)
476#define PPC_IRQ_CPM_RESERVED_13 (PPC_STD_IRQ_LAST + 45)
477#define PPC_IRQ_CPM_IDMA2       (PPC_STD_IRQ_LAST + 46)
478#define PPC_IRQ_CPM_IDMA1       (PPC_STD_IRQ_LAST + 47)
479#define PPC_IRQ_CPM_SDMA_ERROR  (PPC_STD_IRQ_LAST + 48)
480#define PPC_IRQ_CPM_PC12        (PPC_STD_IRQ_LAST + 49)
481#define PPC_IRQ_CPM_PC13        (PPC_STD_IRQ_LAST + 50)
482#define PPC_IRQ_CPM_TIMER1      (PPC_STD_IRQ_LAST + 51)
483#define PPC_IRQ_CPM_PC14        (PPC_STD_IRQ_LAST + 52)
484#define PPC_IRQ_CPM_SCC4        (PPC_STD_IRQ_LAST + 53)
485#define PPC_IRQ_CPM_SCC3        (PPC_STD_IRQ_LAST + 54)
486#define PPC_IRQ_CPM_SCC2        (PPC_STD_IRQ_LAST + 55)
487#define PPC_IRQ_CPM_SCC1        (PPC_STD_IRQ_LAST + 56)
488#define PPC_IRQ_CPM_PC15        (PPC_STD_IRQ_LAST + 57)
489
490#define PPC_IRQ_LAST             PPC_IRQ_CPM_PC15
491
492#elif defined(mpc8260)
493
494#define PPC_IRQ_INST_MISS       (PPC_STD_IRQ_LAST+1) /*0x1000-Instruction TLB miss*/
495#define PPC_IRQ_DATA_MISS       (PPC_STD_IRQ_LAST+2) /*0x1100-Data TLB miss */
496#define PPC_IRQ_DATA_L_MISS     (PPC_STD_IRQ_LAST+3) /*0x1200-Data TLB load miss */
497#define PPC_IRQ_DATA_S_MISS     (PPC_STD_IRQ_LAST+4) /*0x1300-Data TLB store miss */
498#define PPC_IRQ_INST_BPNT       (PPC_STD_IRQ_LAST+5) /*0x1400-Inst address breakpoint */
499#define PPC_IRQ_SYS_MGT         (PPC_STD_IRQ_LAST+6) /*0x1500-System Management */
500/* 0x1600 - 0x2F00 reserved */
501#define PPC_IRQ_CPM_NONE        (PPC_STD_IRQ_LAST + 50)
502#define PPC_IRQ_CPM_I2C         (PPC_STD_IRQ_LAST + 51)
503#define PPC_IRQ_CPM_SPI         (PPC_STD_IRQ_LAST + 52)
504#define PPC_IRQ_CPM_RISC_TIMER  (PPC_STD_IRQ_LAST + 53)
505#define PPC_IRQ_CPM_SMC1        (PPC_STD_IRQ_LAST + 54)
506#define PPC_IRQ_CPM_SMC2        (PPC_STD_IRQ_LAST + 55)
507#define PPC_IRQ_CPM_IDMA1       (PPC_STD_IRQ_LAST + 56)
508#define PPC_IRQ_CPM_IDMA2       (PPC_STD_IRQ_LAST + 57)
509#define PPC_IRQ_CPM_IDMA3       (PPC_STD_IRQ_LAST + 58)
510#define PPC_IRQ_CPM_IDMA4       (PPC_STD_IRQ_LAST + 59)
511#define PPC_IRQ_CPM_SDMA        (PPC_STD_IRQ_LAST + 60)
512#define PPC_IRQ_CPM_RES_A       (PPC_STD_IRQ_LAST + 61)
513#define PPC_IRQ_CPM_TIMER1      (PPC_STD_IRQ_LAST + 62)
514#define PPC_IRQ_CPM_TIMER2      (PPC_STD_IRQ_LAST + 63)
515#define PPC_IRQ_CPM_TIMER3      (PPC_STD_IRQ_LAST + 64)
516#define PPC_IRQ_CPM_TIMER4      (PPC_STD_IRQ_LAST + 65)
517#define PPC_IRQ_CPM_TMCNT       (PPC_STD_IRQ_LAST + 66)
518#define PPC_IRQ_CPM_PIT         (PPC_STD_IRQ_LAST + 67)
519#define PPC_IRQ_CPM_RES_B       (PPC_STD_IRQ_LAST + 68)
520#define PPC_IRQ_CPM_IRQ1        (PPC_STD_IRQ_LAST + 69)
521#define PPC_IRQ_CPM_IRQ2        (PPC_STD_IRQ_LAST + 70)
522#define PPC_IRQ_CPM_IRQ3        (PPC_STD_IRQ_LAST + 71)
523#define PPC_IRQ_CPM_IRQ4        (PPC_STD_IRQ_LAST + 72)
524#define PPC_IRQ_CPM_IRQ5        (PPC_STD_IRQ_LAST + 73)
525#define PPC_IRQ_CPM_IRQ6        (PPC_STD_IRQ_LAST + 74)
526#define PPC_IRQ_CPM_IRQ7        (PPC_STD_IRQ_LAST + 75)
527#define PPC_IRQ_CPM_RES_C       (PPC_STD_IRQ_LAST + 76)
528#define PPC_IRQ_CPM_RES_D       (PPC_STD_IRQ_LAST + 77)
529#define PPC_IRQ_CPM_RES_E       (PPC_STD_IRQ_LAST + 78)
530#define PPC_IRQ_CPM_RES_F       (PPC_STD_IRQ_LAST + 79)
531#define PPC_IRQ_CPM_RES_G       (PPC_STD_IRQ_LAST + 80)
532#define PPC_IRQ_CPM_RES_H       (PPC_STD_IRQ_LAST + 81)
533#define PPC_IRQ_CPM_FCC1        (PPC_STD_IRQ_LAST + 82)
534#define PPC_IRQ_CPM_FCC2        (PPC_STD_IRQ_LAST + 83)
535#define PPC_IRQ_CPM_FCC3        (PPC_STD_IRQ_LAST + 84)
536#define PPC_IRQ_CPM_RES_I       (PPC_STD_IRQ_LAST + 85)
537#define PPC_IRQ_CPM_MCC1        (PPC_STD_IRQ_LAST + 86)
538#define PPC_IRQ_CPM_MCC2        (PPC_STD_IRQ_LAST + 87)
539#define PPC_IRQ_CPM_RES_J       (PPC_STD_IRQ_LAST + 88)
540#define PPC_IRQ_CPM_RES_K       (PPC_STD_IRQ_LAST + 89)
541#define PPC_IRQ_CPM_SCC1        (PPC_STD_IRQ_LAST + 90)
542#define PPC_IRQ_CPM_SCC2        (PPC_STD_IRQ_LAST + 91)
543#define PPC_IRQ_CPM_SCC3        (PPC_STD_IRQ_LAST + 92)
544#define PPC_IRQ_CPM_SCC4        (PPC_STD_IRQ_LAST + 93)
545#define PPC_IRQ_CPM_RES_L       (PPC_STD_IRQ_LAST + 94)
546#define PPC_IRQ_CPM_RES_M       (PPC_STD_IRQ_LAST + 95)
547#define PPC_IRQ_CPM_RES_N       (PPC_STD_IRQ_LAST + 96)
548#define PPC_IRQ_CPM_RES_O       (PPC_STD_IRQ_LAST + 97)
549#define PPC_IRQ_CPM_PC15        (PPC_STD_IRQ_LAST + 98)
550#define PPC_IRQ_CPM_PC14        (PPC_STD_IRQ_LAST + 99)
551#define PPC_IRQ_CPM_PC13        (PPC_STD_IRQ_LAST + 100)
552#define PPC_IRQ_CPM_PC12        (PPC_STD_IRQ_LAST + 101)
553#define PPC_IRQ_CPM_PC11        (PPC_STD_IRQ_LAST + 102)
554#define PPC_IRQ_CPM_PC10        (PPC_STD_IRQ_LAST + 103)
555#define PPC_IRQ_CPM_PC9         (PPC_STD_IRQ_LAST + 104)
556#define PPC_IRQ_CPM_PC8         (PPC_STD_IRQ_LAST + 105)
557#define PPC_IRQ_CPM_PC7         (PPC_STD_IRQ_LAST + 106)
558#define PPC_IRQ_CPM_PC6         (PPC_STD_IRQ_LAST + 107)
559#define PPC_IRQ_CPM_PC5         (PPC_STD_IRQ_LAST + 108)
560#define PPC_IRQ_CPM_PC4         (PPC_STD_IRQ_LAST + 109)
561#define PPC_IRQ_CPM_PC3         (PPC_STD_IRQ_LAST + 110)
562#define PPC_IRQ_CPM_PC2         (PPC_STD_IRQ_LAST + 111)
563#define PPC_IRQ_CPM_PC1         (PPC_STD_IRQ_LAST + 112)
564#define PPC_IRQ_CPM_PC0         (PPC_STD_IRQ_LAST + 113)
565
566#define PPC_IRQ_LAST             PPC_IRQ_CPM_PC0
567
568#endif
569
570
571/*
572 *  If the maximum number of exception sources is too low,
573 *  then fix it
574 */
575
576#if PPC_INTERRUPT_MAX <= PPC_IRQ_LAST
577#undef PPC_INTERRUPT_MAX
578#define PPC_INTERRUPT_MAX ((PPC_IRQ_LAST) + 1)
579#endif
580
581/*
582 *  Initial value for the FPSCR register
583 */
584
585#define PPC_INIT_FPSCR          0x000000f8
586
587#ifdef __cplusplus
588}
589#endif
590
591#endif /* _RTEMS_SCORE_POWERPC_H */
Note: See TracBrowser for help on using the repository browser.