source: rtems/cpukit/score/cpu/powerpc/rtems/score/powerpc.h @ 7bda4d6

4.104.114.84.95
Last change on this file since 7bda4d6 was 7bda4d6, checked in by Ralf Corsepius <ralf.corsepius@…>, on Feb 14, 2005 at 4:17:23 AM

2005-02-14 Ralf Corsepius <ralf.corsepius@…>

  • rtems/score/powerpc.h: Remove PPC_HAS_RFCI (Unused).
  • Property mode set to 100644
File size: 18.1 KB
Line 
1/**
2 * @file rtems/score/powerpc.h
3 */
4
5/*
6 *  This file contains definitions for the IBM/Motorola PowerPC
7 *  family members.
8 *
9 *  Author:     Andrew Bray <andy@i-cubed.co.uk>
10 *
11 *  COPYRIGHT (c) 1995 by i-cubed ltd.
12 *
13 *  MPC860 support code was added by Jay Monkman <jmonkman@frasca.com>
14 *  MPC8260 support added by Andy Dachs <a.dachs@sstl.co.uk>
15 *  Surrey Satellite Technology Limited
16 *
17 *  To anyone who acknowledges that this file is provided "AS IS"
18 *  without any express or implied warranty:
19 *      permission to use, copy, modify, and distribute this file
20 *      for any purpose is hereby granted without fee, provided that
21 *      the above copyright notice and this notice appears in all
22 *      copies, and that the name of i-cubed limited not be used in
23 *      advertising or publicity pertaining to distribution of the
24 *      software without specific, written prior permission.
25 *      i-cubed limited makes no representations about the suitability
26 *      of this software for any purpose.
27 *
28 *  Derived from c/src/exec/cpu/no_cpu/no_cpu.h:
29 *
30 *  COPYRIGHT (c) 1989-1997.
31 *  On-Line Applications Research Corporation (OAR).
32 *
33 *  The license and distribution terms for this file may in
34 *  the file LICENSE in this distribution or at
35 *  http://www.rtems.com/license/LICENSE.
36 *
37 *
38 * Note:
39 *      This file is included by both C and assembler code ( -DASM )
40 *
41 *  $Id$
42 */
43
44
45#ifndef _RTEMS_SCORE_POWERPC_H
46#define _RTEMS_SCORE_POWERPC_H
47
48#ifdef __cplusplus
49extern "C" {
50#endif
51
52#include <rtems/score/types.h>
53
54/*
55 *  Define the name of the CPU family.
56 */
57
58#define CPU_NAME "PowerPC"
59
60/*
61 *  This file contains the information required to build
62 *  RTEMS for a particular member of the PowerPC family.  It does
63 *  this by setting variables to indicate which implementation
64 *  dependent features are present in a particular member
65 *  of the family.
66 *
67 *  The following architectural feature definitions are defaulted
68 *  unless specifically set by the model definition:
69 *
70 *    + PPC_INTERRUPT_MAX        - 16
71 *    + PPC_CACHE_ALIGNMENT      - 32
72 *    + PPC_HAS_FPU              - 1
73 *    + PPC_HAS_DOUBLE           - 1 if PPC_HAS_FPU,
74 *                               - 0 otherwise
75 */
76 
77/*
78 *  Figure out all CPU Model Feature Flags based upon compiler
79 *  predefines.
80 */
81
82#if defined(ppc403) || defined(ppc405)
83/*
84 *  IBM 403
85 *
86 *  Developed for 403GA.  Book checked for 403GB.
87 *
88 *  Does not have user mode.
89 */
90 
91#if defined(ppc403)
92#define CPU_MODEL_NAME "PowerPC 403"
93#elif defined (ppc405)
94#define CPU_MODEL_NAME "PowerPC 405"
95#endif
96#define PPC_ALIGNMENT           4 
97#define PPC_CACHE_ALIGNMENT     16
98
99#elif defined(mpc555)
100
101#define CPU_MODEL_NAME  "PowerPC 555"
102
103/* Copied from mpc505 */
104#define PPC_ALIGNMENT           4
105#define PPC_CACHE_ALIGNMENT     16
106
107#elif defined(mpc505) || defined(mpc509)
108/*
109 *  Submitted by Sergei Organov <osv@Javad.RU> as a patch against
110 *  3.6.0 long after 4.0 was released.   This is just an attempt
111 *  to get the setting correct.
112 */
113
114#define CPU_MODEL_NAME  "PowerPC 505/509"
115
116#define PPC_ALIGNMENT           4
117#define PPC_CACHE_ALIGNMENT     16
118
119#elif defined(ppc601)
120
121/*
122 *  Submitted with original port -- book checked only.
123 */
124 
125#define CPU_MODEL_NAME  "PowerPC 601"
126
127#define PPC_ALIGNMENT           8
128
129#elif defined(ppc602)
130/*
131 *  Submitted with original port -- book checked only.
132 */
133 
134#define CPU_MODEL_NAME  "PowerPC 602"
135
136#define PPC_ALIGNMENT           4
137#define PPC_HAS_DOUBLE          0
138
139#elif defined(ppc603)
140/*
141 *  Submitted with original port -- book checked only.
142 */
143 
144#define CPU_MODEL_NAME  "PowerPC 603"
145
146#define PPC_ALIGNMENT           8
147
148#elif defined(ppc603e)
149 
150#define CPU_MODEL_NAME  "PowerPC 603e"
151/*
152 *  Submitted with original port.
153 *
154 *  Known to work on real hardware.
155 */
156
157#define PPC_ALIGNMENT           8
158
159#elif defined(mpc604)
160/*
161 *  Submitted with original port -- book checked only.
162 */
163 
164#define CPU_MODEL_NAME  "PowerPC 604"
165
166#define PPC_ALIGNMENT           8
167 
168#elif defined(mpc860)
169/*
170 *  Added by Jay Monkman (jmonkman@frasca.com) 6/28/98
171 *  with some changes by Darlene Stewart (Darlene.Stewart@iit.nrc.ca)
172 */ 
173#define CPU_MODEL_NAME  "PowerPC MPC860"
174
175#define PPC_ALIGNMENT           4
176#define PPC_CACHE_ALIGNMENT     16
177#define PPC_INTERRUPT_MAX       71
178
179#elif defined(mpc821)
180/*
181 *  Added by Andrew Bray <andy@chaos.org.uk> 6/April/1999
182 */ 
183#define CPU_MODEL_NAME  "PowerPC MPC821"
184
185#define PPC_ALIGNMENT           4
186#define PPC_CACHE_ALIGNMENT     16
187#define PPC_INTERRUPT_MAX       71
188
189#elif defined(mpc750)
190
191#define CPU_MODEL_NAME  "PowerPC 750"
192
193#define PPC_ALIGNMENT           8
194
195#elif defined(mpc7400)
196
197#define CPU_MODEL_NAME  "PowerPC 7400"
198
199#define PPC_ALIGNMENT           8
200
201#elif defined(mpc7455)
202/*
203 *  Added by S.K. Feng <feng1@bnl.gov> 10/03
204 */
205
206#define CPU_MODEL_NAME  "PowerPC 7455"
207
208#define PPC_ALIGNMENT           8
209#define PPC_CACHE_ALIGNMENT     32
210
211#elif defined(mpc8260)
212/*
213 *  Added by Andy Dachs <a.dachs@sstl.co.uk> 23/11/2000
214 */
215#define CPU_MODEL_NAME  "PowerPC MPC8260"
216
217#define PPC_ALIGNMENT           4
218#define PPC_CACHE_ALIGNMENT     32
219#define PPC_INTERRUPT_MAX       125
220#else
221 
222#error "Unsupported CPU Model"
223 
224#endif
225
226/*
227 *  Application binary interfaces.
228 *
229 *  PPC_ABI MUST be defined as one of these.
230 *  Only big endian is currently supported.
231 */
232/*
233 *  SVR4 ABI
234 */
235#define PPC_ABI_SVR4            2
236/*
237 *  Embedded ABI
238 */
239#define PPC_ABI_EABI            3
240
241/*
242 *  Default to the EABI used by current GNU tools
243 */
244
245#ifndef PPC_ABI
246#define PPC_ABI PPC_ABI_EABI
247#endif
248
249#if (PPC_ABI == PPC_ABI_SVR4)
250#define PPC_STACK_ALIGNMENT     16
251#elif (PPC_ABI == PPC_ABI_EABI)
252#define PPC_STACK_ALIGNMENT     8
253#else
254#error  "PPC_ABI is not properly defined"
255#endif
256
257/*
258 *  Assemblers.
259 *  PPC_ASM MUST be defined as one of these.
260 *
261 *  PPC_ASM_ELF:   ELF assembler. Currently used for all ABIs.
262 *
263 *  NOTE: Only PPC_ABI_ELF is currently fully supported.
264 */
265
266#define PPC_ASM_ELF   0
267
268/*
269 *  Default to the assembler format used by the current GNU tools.
270 */
271
272#ifndef PPC_ASM
273#define PPC_ASM PPC_ASM_ELF
274#endif
275
276/*
277 *  If the maximum number of exception sources has not been defined,
278 *  then default it to 16.
279 */
280
281#ifndef PPC_INTERRUPT_MAX
282#define PPC_INTERRUPT_MAX       16
283#endif
284
285/*
286 *  Unless specified otherwise, the cache line size is defaulted to 32.
287 *
288 *  The derive the power of 2 the cache line is.
289 */
290
291#ifndef PPC_CACHE_ALIGNMENT
292#define PPC_CACHE_ALIGNMENT 32
293#endif
294
295/*
296 *  Unless specified above, assume PPC_HAS_FPU to be a synonym for _SOFT_FLOAT.
297 *  FIXME: Should we tie PPC_HAS_FPU to _SOFT_FLOAT, directly
298 *     and disallow explicitly setting PPC_HAS_FPU?
299 */
300
301#ifndef PPC_HAS_FPU
302#ifdef _SOFT_FLOAT
303#define PPC_HAS_FPU 0
304#else
305#define PPC_HAS_FPU 1
306#endif
307#endif
308
309/*
310 *  Unless specified above, If the model has FP support, it is assumed to
311 *  support doubles (8-byte floating point numbers).
312 *
313 *  If the model does NOT have FP support, then the model does
314 *  NOT have double length FP registers.
315 */
316
317#ifndef PPC_HAS_DOUBLE
318#if (PPC_HAS_FPU)
319#define PPC_HAS_DOUBLE 1
320#else
321#define PPC_HAS_DOUBLE 0
322#endif
323#endif
324
325/*
326 *  The following exceptions are not maskable, and are not
327 *  necessarily predictable, so cannot be offered to RTEMS:
328 *    Alignment exception - handled by the CPU module
329 *    Data exceptions.
330 *    Instruction exceptions.
331 */
332
333/*
334 *  Base Interrupt vectors supported on all models.
335 */
336#define PPC_IRQ_SYSTEM_RESET     0 /* 0x00100 - System reset.              */
337#define PPC_IRQ_MCHECK           1 /* 0x00200 - Machine check              */
338#define PPC_IRQ_PROTECT          2 /* 0x00300 - Protection violation       */
339#define PPC_IRQ_ISI              3 /* 0x00400 - Instruction Fetch error    */
340#define PPC_IRQ_EXTERNAL         4 /* 0x00500 - External interrupt         */
341#define PPC_IRQ_ALIGNMENT        5 /* 0X00600 - Alignment exception        */
342#define PPC_IRQ_PROGRAM          6 /* 0x00700 - Program exception          */
343#define PPC_IRQ_NOFP             7 /* 0x00800 - Floating point unavailable */
344#define PPC_IRQ_DECREMENTER      8 /* 0x00900 - Decrementer interrupt      */
345#define PPC_IRQ_RESERVED_A       9 /* 0x00a00 - Implementation Reserved    */
346#define PPC_IRQ_RESERVED_B      10 /* 0x00b00 - Implementation Reserved    */
347#define PPC_IRQ_SCALL           11 /* 0x00c00 - System call                */
348#define PPC_IRQ_TRACE           12 /* 0x00d00 - Trace Exception            */
349#define PPC_IRQ_FP_ASST         13 /* ox00e00 - Floating point assist      */
350#define PPC_STD_IRQ_LAST        PPC_IRQ_FP_ASST
351
352#define PPC_IRQ_FIRST           PPC_IRQ_SYSTEM_RESET
353
354#if defined(ppc403) || defined(ppc405)
355                                 
356#define PPC_IRQ_CRIT     PPC_IRQ_SYSTEM_RESET /*0x00100- Critical int. pin */
357#define PPC_IRQ_PIT      (PPC_STD_IRQ_LAST+1) /*0x01000- Pgm interval timer*/
358#define PPC_IRQ_FIT      (PPC_STD_IRQ_LAST+2) /*0x01010- Fixed int. timer  */
359#define PPC_IRQ_WATCHDOG (PPC_STD_IRQ_LAST+3) /*0x01020- Watchdog timer    */
360#define PPC_IRQ_DEBUG    (PPC_STD_IRQ_LAST+4) /*0x02000- Debug exceptions  */
361#define PPC_IRQ_LAST     PPC_IRQ_DEBUG
362
363#elif defined(mpc505) || defined(mpc509)
364#define PPC_IRQ_SOFTEMU   (PPC_STD_IRQ_LAST+1)    /* Software emulation. */
365#define PPC_IRQ_DATA_BP   (PPC_STD_IRQ_LAST+ 2)
366#define PPC_IRQ_INST_BP   (PPC_STD_IRQ_LAST+ 3)
367#define PPC_IRQ_MEXT_BP   (PPC_STD_IRQ_LAST+ 4)
368#define PPC_IRQ_NMEXT_BP  (PPC_STD_IRQ_LAST+ 5)
369
370#elif defined(mpc555)
371#define PPC_IRQ_SOFTEMU   (PPC_STD_IRQ_LAST+1)  /* Software emulation. */
372#define PPC_IRQ_INST_PE   (PPC_STD_IRQ_LAST+2)  /* Insn protection error */
373#define PPC_IRQ_DATA_PE   (PPC_STD_IRQ_LAST+3)  /* Data protection error */
374#define PPC_IRQ_DATA_BP   (PPC_STD_IRQ_LAST+4)  /* Data breakpoint */
375#define PPC_IRQ_INST_BP   (PPC_STD_IRQ_LAST+5)  /* Insn breakpoint */
376#define PPC_IRQ_MEXT_BP   (PPC_STD_IRQ_LAST+6)  /* Maskable ext bkpt */
377#define PPC_IRQ_NMEXT_BP  (PPC_STD_IRQ_LAST+7)  /* Non-maskable ext bkpt */
378#define PPC_IRQ_LAST      PPC_IRQ_NMEXT_BP
379
380#elif defined(ppc601)
381#define PPC_IRQ_TRACE    (PPC_STD_IRQ_LAST+1) /*0x02000-Run/Trace Exception*/
382#define PPC_IRQ_LAST     PPC_IRQ_TRACE       
383
384#elif defined(ppc602)
385#define PPC_IRQ_LAST     (PPC_STD_IRQ_LAST)
386
387#elif defined(ppc603)
388#define PPC_IRQ_TRANS_MISS (PPC_STD_IRQ_LAST+1) /*0x1000-Ins Translation Miss*/
389#define PPC_IRQ_DATA_LOAD  (PPC_STD_IRQ_LAST+2) /*0x1100-Data Load Trans Miss*/
390#define PPC_IRQ_DATA_STORE (PPC_STD_IRQ_LAST+3) /*0x1200-Data Store Miss     */
391#define PPC_IRQ_ADDR_BRK   (PPC_STD_IRQ_LAST+4) /*0x1300-Instruction Bkpoint */
392#define PPC_IRQ_SYS_MGT    (PPC_STD_IRQ_LAST+5) /*0x1400-System Management   */
393#define PPC_IRQ_LAST       PPC_IRQ_SYS_MGT   
394
395#elif defined(ppc603e)
396#define PPC_TLB_INST_MISS  (PPC_STD_IRQ_LAST+1) /*0x1000-Instruction TLB Miss*/
397#define PPC_TLB_LOAD_MISS  (PPC_STD_IRQ_LAST+2) /*0x1100-TLB miss on load  */
398#define PPC_TLB_STORE_MISS (PPC_STD_IRQ_LAST+3) /*0x1200-TLB Miss on store */
399#define PPC_IRQ_ADDRBRK    (PPC_STD_IRQ_LAST+4) /*0x1300-Instruct addr break */
400#define PPC_IRQ_SYS_MGT    (PPC_STD_IRQ_LAST+5) /*0x1400-System Management   */
401#define PPC_IRQ_LAST       PPC_IRQ_SYS_MGT   
402
403
404#elif defined(mpc604)
405#define PPC_IRQ_ADDR_BRK (PPC_STD_IRQ_LAST+1) /*0x1300- Inst. addr break  */
406#define PPC_IRQ_SYS_MGT  (PPC_STD_IRQ_LAST+2) /*0x1400- System Management */
407#define PPC_IRQ_LAST     PPC_IRQ_SYS_MGT 
408
409#elif defined(mpc860) || defined(mpc821)
410#define PPC_IRQ_EMULATE         (PPC_STD_IRQ_LAST+1) /*0x1000-Software emulation  */
411#define PPC_IRQ_INST_MISS       (PPC_STD_IRQ_LAST+2) /*0x1100-Instruction TLB miss*/
412#define PPC_IRQ_DATA_MISS       (PPC_STD_IRQ_LAST+3) /*0x1200-Data TLB miss */
413#define PPC_IRQ_INST_ERR        (PPC_STD_IRQ_LAST+4) /*0x1300-Instruction TLB err */
414#define PPC_IRQ_DATA_ERR        (PPC_STD_IRQ_LAST+5) /*0x1400-Data TLB error */
415#define PPC_IRQ_DATA_BPNT       (PPC_STD_IRQ_LAST+6) /*0x1C00-Data breakpoint */
416#define PPC_IRQ_INST_BPNT       (PPC_STD_IRQ_LAST+7) /*0x1D00-Inst breakpoint */
417#define PPC_IRQ_IO_BPNT         (PPC_STD_IRQ_LAST+8) /*0x1E00-Peripheral breakpnt */
418#define PPC_IRQ_DEV_PORT        (PPC_STD_IRQ_LAST+9) /*0x1F00-Development port */
419#define PPC_IRQ_IRQ0            (PPC_STD_IRQ_LAST + 10)
420#define PPC_IRQ_LVL0            (PPC_STD_IRQ_LAST + 11)
421#define PPC_IRQ_IRQ1            (PPC_STD_IRQ_LAST + 12)
422#define PPC_IRQ_LVL1            (PPC_STD_IRQ_LAST + 13)
423#define PPC_IRQ_IRQ2            (PPC_STD_IRQ_LAST + 14)
424#define PPC_IRQ_LVL2            (PPC_STD_IRQ_LAST + 15)
425#define PPC_IRQ_IRQ3            (PPC_STD_IRQ_LAST + 16)
426#define PPC_IRQ_LVL3            (PPC_STD_IRQ_LAST + 17)
427#define PPC_IRQ_IRQ4            (PPC_STD_IRQ_LAST + 18)
428#define PPC_IRQ_LVL4            (PPC_STD_IRQ_LAST + 19)
429#define PPC_IRQ_IRQ5            (PPC_STD_IRQ_LAST + 20)
430#define PPC_IRQ_LVL5            (PPC_STD_IRQ_LAST + 21)
431#define PPC_IRQ_IRQ6            (PPC_STD_IRQ_LAST + 22)
432#define PPC_IRQ_LVL6            (PPC_STD_IRQ_LAST + 23)
433#define PPC_IRQ_IRQ7            (PPC_STD_IRQ_LAST + 24)
434#define PPC_IRQ_LVL7            (PPC_STD_IRQ_LAST + 25)
435#define PPC_IRQ_CPM_ERROR       (PPC_STD_IRQ_LAST + 26)
436#define PPC_IRQ_CPM_PC4         (PPC_STD_IRQ_LAST + 27)
437#define PPC_IRQ_CPM_PC5         (PPC_STD_IRQ_LAST + 28)
438#define PPC_IRQ_CPM_SMC2        (PPC_STD_IRQ_LAST + 29)
439#define PPC_IRQ_CPM_SMC1        (PPC_STD_IRQ_LAST + 30)
440#define PPC_IRQ_CPM_SPI         (PPC_STD_IRQ_LAST + 31)
441#define PPC_IRQ_CPM_PC6         (PPC_STD_IRQ_LAST + 32)
442#define PPC_IRQ_CPM_TIMER4      (PPC_STD_IRQ_LAST + 33)
443#define PPC_IRQ_CPM_RESERVED_8  (PPC_STD_IRQ_LAST + 34)
444#define PPC_IRQ_CPM_PC7         (PPC_STD_IRQ_LAST + 35)
445#define PPC_IRQ_CPM_PC8         (PPC_STD_IRQ_LAST + 36)
446#define PPC_IRQ_CPM_PC9         (PPC_STD_IRQ_LAST + 37)
447#define PPC_IRQ_CPM_TIMER3      (PPC_STD_IRQ_LAST + 38)
448#define PPC_IRQ_CPM_RESERVED_D  (PPC_STD_IRQ_LAST + 39)
449#define PPC_IRQ_CPM_PC10        (PPC_STD_IRQ_LAST + 40)
450#define PPC_IRQ_CPM_PC11        (PPC_STD_IRQ_LAST + 41)
451#define PPC_IRQ_CPM_I2C         (PPC_STD_IRQ_LAST + 42)
452#define PPC_IRQ_CPM_RISC_TIMER  (PPC_STD_IRQ_LAST + 43)
453#define PPC_IRQ_CPM_TIMER2      (PPC_STD_IRQ_LAST + 44)
454#define PPC_IRQ_CPM_RESERVED_13 (PPC_STD_IRQ_LAST + 45)
455#define PPC_IRQ_CPM_IDMA2       (PPC_STD_IRQ_LAST + 46)
456#define PPC_IRQ_CPM_IDMA1       (PPC_STD_IRQ_LAST + 47)
457#define PPC_IRQ_CPM_SDMA_ERROR  (PPC_STD_IRQ_LAST + 48)
458#define PPC_IRQ_CPM_PC12        (PPC_STD_IRQ_LAST + 49)
459#define PPC_IRQ_CPM_PC13        (PPC_STD_IRQ_LAST + 50)
460#define PPC_IRQ_CPM_TIMER1      (PPC_STD_IRQ_LAST + 51)
461#define PPC_IRQ_CPM_PC14        (PPC_STD_IRQ_LAST + 52)
462#define PPC_IRQ_CPM_SCC4        (PPC_STD_IRQ_LAST + 53)
463#define PPC_IRQ_CPM_SCC3        (PPC_STD_IRQ_LAST + 54)
464#define PPC_IRQ_CPM_SCC2        (PPC_STD_IRQ_LAST + 55)
465#define PPC_IRQ_CPM_SCC1        (PPC_STD_IRQ_LAST + 56)
466#define PPC_IRQ_CPM_PC15        (PPC_STD_IRQ_LAST + 57)
467
468#define PPC_IRQ_LAST             PPC_IRQ_CPM_PC15
469
470#elif defined(mpc8260)
471
472#define PPC_IRQ_INST_MISS       (PPC_STD_IRQ_LAST+1) /*0x1000-Instruction TLB miss*/
473#define PPC_IRQ_DATA_MISS       (PPC_STD_IRQ_LAST+2) /*0x1100-Data TLB miss */
474#define PPC_IRQ_DATA_L_MISS     (PPC_STD_IRQ_LAST+3) /*0x1200-Data TLB load miss */
475#define PPC_IRQ_DATA_S_MISS     (PPC_STD_IRQ_LAST+4) /*0x1300-Data TLB store miss */
476#define PPC_IRQ_INST_BPNT       (PPC_STD_IRQ_LAST+5) /*0x1400-Inst address breakpoint */
477#define PPC_IRQ_SYS_MGT         (PPC_STD_IRQ_LAST+6) /*0x1500-System Management */
478/* 0x1600 - 0x2F00 reserved */
479#define PPC_IRQ_CPM_NONE        (PPC_STD_IRQ_LAST + 50)
480#define PPC_IRQ_CPM_I2C         (PPC_STD_IRQ_LAST + 51)
481#define PPC_IRQ_CPM_SPI         (PPC_STD_IRQ_LAST + 52)
482#define PPC_IRQ_CPM_RISC_TIMER  (PPC_STD_IRQ_LAST + 53)
483#define PPC_IRQ_CPM_SMC1        (PPC_STD_IRQ_LAST + 54)
484#define PPC_IRQ_CPM_SMC2        (PPC_STD_IRQ_LAST + 55)
485#define PPC_IRQ_CPM_IDMA1       (PPC_STD_IRQ_LAST + 56)
486#define PPC_IRQ_CPM_IDMA2       (PPC_STD_IRQ_LAST + 57)
487#define PPC_IRQ_CPM_IDMA3       (PPC_STD_IRQ_LAST + 58)
488#define PPC_IRQ_CPM_IDMA4       (PPC_STD_IRQ_LAST + 59)
489#define PPC_IRQ_CPM_SDMA        (PPC_STD_IRQ_LAST + 60)
490#define PPC_IRQ_CPM_RES_A       (PPC_STD_IRQ_LAST + 61)
491#define PPC_IRQ_CPM_TIMER1      (PPC_STD_IRQ_LAST + 62)
492#define PPC_IRQ_CPM_TIMER2      (PPC_STD_IRQ_LAST + 63)
493#define PPC_IRQ_CPM_TIMER3      (PPC_STD_IRQ_LAST + 64)
494#define PPC_IRQ_CPM_TIMER4      (PPC_STD_IRQ_LAST + 65)
495#define PPC_IRQ_CPM_TMCNT       (PPC_STD_IRQ_LAST + 66)
496#define PPC_IRQ_CPM_PIT         (PPC_STD_IRQ_LAST + 67)
497#define PPC_IRQ_CPM_RES_B       (PPC_STD_IRQ_LAST + 68)
498#define PPC_IRQ_CPM_IRQ1        (PPC_STD_IRQ_LAST + 69)
499#define PPC_IRQ_CPM_IRQ2        (PPC_STD_IRQ_LAST + 70)
500#define PPC_IRQ_CPM_IRQ3        (PPC_STD_IRQ_LAST + 71)
501#define PPC_IRQ_CPM_IRQ4        (PPC_STD_IRQ_LAST + 72)
502#define PPC_IRQ_CPM_IRQ5        (PPC_STD_IRQ_LAST + 73)
503#define PPC_IRQ_CPM_IRQ6        (PPC_STD_IRQ_LAST + 74)
504#define PPC_IRQ_CPM_IRQ7        (PPC_STD_IRQ_LAST + 75)
505#define PPC_IRQ_CPM_RES_C       (PPC_STD_IRQ_LAST + 76)
506#define PPC_IRQ_CPM_RES_D       (PPC_STD_IRQ_LAST + 77)
507#define PPC_IRQ_CPM_RES_E       (PPC_STD_IRQ_LAST + 78)
508#define PPC_IRQ_CPM_RES_F       (PPC_STD_IRQ_LAST + 79)
509#define PPC_IRQ_CPM_RES_G       (PPC_STD_IRQ_LAST + 80)
510#define PPC_IRQ_CPM_RES_H       (PPC_STD_IRQ_LAST + 81)
511#define PPC_IRQ_CPM_FCC1        (PPC_STD_IRQ_LAST + 82)
512#define PPC_IRQ_CPM_FCC2        (PPC_STD_IRQ_LAST + 83)
513#define PPC_IRQ_CPM_FCC3        (PPC_STD_IRQ_LAST + 84)
514#define PPC_IRQ_CPM_RES_I       (PPC_STD_IRQ_LAST + 85)
515#define PPC_IRQ_CPM_MCC1        (PPC_STD_IRQ_LAST + 86)
516#define PPC_IRQ_CPM_MCC2        (PPC_STD_IRQ_LAST + 87)
517#define PPC_IRQ_CPM_RES_J       (PPC_STD_IRQ_LAST + 88)
518#define PPC_IRQ_CPM_RES_K       (PPC_STD_IRQ_LAST + 89)
519#define PPC_IRQ_CPM_SCC1        (PPC_STD_IRQ_LAST + 90)
520#define PPC_IRQ_CPM_SCC2        (PPC_STD_IRQ_LAST + 91)
521#define PPC_IRQ_CPM_SCC3        (PPC_STD_IRQ_LAST + 92)
522#define PPC_IRQ_CPM_SCC4        (PPC_STD_IRQ_LAST + 93)
523#define PPC_IRQ_CPM_RES_L       (PPC_STD_IRQ_LAST + 94)
524#define PPC_IRQ_CPM_RES_M       (PPC_STD_IRQ_LAST + 95)
525#define PPC_IRQ_CPM_RES_N       (PPC_STD_IRQ_LAST + 96)
526#define PPC_IRQ_CPM_RES_O       (PPC_STD_IRQ_LAST + 97)
527#define PPC_IRQ_CPM_PC15        (PPC_STD_IRQ_LAST + 98)
528#define PPC_IRQ_CPM_PC14        (PPC_STD_IRQ_LAST + 99)
529#define PPC_IRQ_CPM_PC13        (PPC_STD_IRQ_LAST + 100)
530#define PPC_IRQ_CPM_PC12        (PPC_STD_IRQ_LAST + 101)
531#define PPC_IRQ_CPM_PC11        (PPC_STD_IRQ_LAST + 102)
532#define PPC_IRQ_CPM_PC10        (PPC_STD_IRQ_LAST + 103)
533#define PPC_IRQ_CPM_PC9         (PPC_STD_IRQ_LAST + 104)
534#define PPC_IRQ_CPM_PC8         (PPC_STD_IRQ_LAST + 105)
535#define PPC_IRQ_CPM_PC7         (PPC_STD_IRQ_LAST + 106)
536#define PPC_IRQ_CPM_PC6         (PPC_STD_IRQ_LAST + 107)
537#define PPC_IRQ_CPM_PC5         (PPC_STD_IRQ_LAST + 108)
538#define PPC_IRQ_CPM_PC4         (PPC_STD_IRQ_LAST + 109)
539#define PPC_IRQ_CPM_PC3         (PPC_STD_IRQ_LAST + 110)
540#define PPC_IRQ_CPM_PC2         (PPC_STD_IRQ_LAST + 111)
541#define PPC_IRQ_CPM_PC1         (PPC_STD_IRQ_LAST + 112)
542#define PPC_IRQ_CPM_PC0         (PPC_STD_IRQ_LAST + 113)
543
544#define PPC_IRQ_LAST             PPC_IRQ_CPM_PC0
545
546#endif
547
548
549/*
550 *  If the maximum number of exception sources is too low,
551 *  then fix it
552 */
553
554#if PPC_INTERRUPT_MAX <= PPC_IRQ_LAST
555#undef PPC_INTERRUPT_MAX
556#define PPC_INTERRUPT_MAX ((PPC_IRQ_LAST) + 1)
557#endif
558
559/*
560 *  Initial value for the FPSCR register
561 */
562
563#define PPC_INIT_FPSCR          0x000000f8
564
565#ifdef __cplusplus
566}
567#endif
568
569#endif /* _RTEMS_SCORE_POWERPC_H */
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