source: rtems/cpukit/score/cpu/powerpc/cpu.c @ 38b59a6

4.115
Last change on this file since 38b59a6 was 38b59a6, checked in by Sebastian Huber <sebastian.huber@…>, on 05/02/14 at 08:31:09

score: Implement forced thread migration

The current implementation of task migration in RTEMS has some
implications with respect to the interrupt latency. It is crucial to
preserve the system invariant that a task can execute on at most one
processor in the system at a time. This is accomplished with a boolean
indicator in the task context. The processor architecture specific
low-level task context switch code will mark that a task context is no
longer executing and waits that the heir context stopped execution
before it restores the heir context and resumes execution of the heir
task. So there is one point in time in which a processor is without a
task. This is essential to avoid cyclic dependencies in case multiple
tasks migrate at once. Otherwise some supervising entity is necessary to
prevent life-locks. Such a global supervisor would lead to scalability
problems so this approach is not used. Currently the thread dispatch is
performed with interrupts disabled. So in case the heir task is
currently executing on another processor then this prolongs the time of
disabled interrupts since one processor has to wait for another
processor to make progress.

It is difficult to avoid this issue with the interrupt latency since
interrupts normally store the context of the interrupted task on its
stack. In case a task is marked as not executing we must not use its
task stack to store such an interrupt context. We cannot use the heir
stack before it stopped execution on another processor. So if we enable
interrupts during this transition we have to provide an alternative task
independent stack for this time frame. This issue needs further
investigation.

  • Property mode set to 100644
File size: 1.5 KB
Line 
1/**
2 *  @file
3 *
4 *  @brief PowerPC Dependent Source
5 */
6
7/*
8 *  The license and distribution terms for this file may be
9 *  found in the file LICENSE in this distribution or at
10 *  http://www.rtems.org/license/LICENSE.
11 */
12
13/*
14 * For now, this file is just a stub to work around
15 * structural deficiencies of the powerpc port.
16 */
17
18#ifdef HAVE_CONFIG_H
19  #include "config.h"
20#endif
21
22#include <rtems/system.h>
23#include <rtems/score/cpu.h>
24
25#define PPC_ASSERT_OFFSET(field, off) \
26  RTEMS_STATIC_ASSERT( \
27    offsetof(ppc_context, field) + PPC_DEFAULT_CACHE_LINE_SIZE \
28      == PPC_CONTEXT_OFFSET_ ## off, \
29    ppc_context_offset_ ## field \
30  )
31
32PPC_ASSERT_OFFSET(gpr1, GPR1);
33PPC_ASSERT_OFFSET(msr, MSR);
34PPC_ASSERT_OFFSET(lr, LR);
35PPC_ASSERT_OFFSET(cr, CR);
36PPC_ASSERT_OFFSET(gpr14, GPR14);
37PPC_ASSERT_OFFSET(gpr15, GPR15);
38PPC_ASSERT_OFFSET(gpr16, GPR16);
39PPC_ASSERT_OFFSET(gpr17, GPR17);
40PPC_ASSERT_OFFSET(gpr18, GPR18);
41PPC_ASSERT_OFFSET(gpr19, GPR19);
42PPC_ASSERT_OFFSET(gpr20, GPR20);
43PPC_ASSERT_OFFSET(gpr21, GPR21);
44PPC_ASSERT_OFFSET(gpr22, GPR22);
45PPC_ASSERT_OFFSET(gpr23, GPR23);
46PPC_ASSERT_OFFSET(gpr24, GPR24);
47PPC_ASSERT_OFFSET(gpr25, GPR25);
48PPC_ASSERT_OFFSET(gpr26, GPR26);
49PPC_ASSERT_OFFSET(gpr27, GPR27);
50PPC_ASSERT_OFFSET(gpr28, GPR28);
51PPC_ASSERT_OFFSET(gpr29, GPR29);
52PPC_ASSERT_OFFSET(gpr30, GPR30);
53PPC_ASSERT_OFFSET(gpr31, GPR31);
54PPC_ASSERT_OFFSET(gpr2, GPR2);
55
56#ifdef RTEMS_SMP
57  PPC_ASSERT_OFFSET(is_executing, IS_EXECUTING);
58#endif
59
60RTEMS_STATIC_ASSERT(
61  sizeof(Context_Control) % PPC_DEFAULT_CACHE_LINE_SIZE == 0,
62  ppc_context_size
63);
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