source: rtems/cpukit/score/cpu/or1k/cpu.c @ 5c6edee

5
Last change on this file since 5c6edee was 511dc4b, checked in by Sebastian Huber <sebastian.huber@…>, on 06/19/18 at 07:09:51

Rework initialization and interrupt stack support

Statically initialize the interrupt stack area
(_Configuration_Interrupt_stack_area_begin,
_Configuration_Interrupt_stack_area_end, and
_Configuration_Interrupt_stack_size) via <rtems/confdefs.h>. Place the
interrupt stack area in a special section ".rtemsstack.interrupt". Let
BSPs define the optimal placement of this section in their linker
command files (e.g. in a fast on-chip memory).

This change makes makes the CPU_HAS_SOFTWARE_INTERRUPT_STACK and
CPU_HAS_HARDWARE_INTERRUPT_STACK CPU port defines superfluous, since the
low level initialization code has all information available via global
symbols.

This change makes the CPU_ALLOCATE_INTERRUPT_STACK CPU port define
superfluous, since the interrupt stacks are allocated by confdefs.h for
all architectures. There is no need for BSP-specific linker command
file magic (except the section placement), see previous ARM linker
command file as a bad example.

Remove _CPU_Install_interrupt_stack(). Initialize the hardware
interrupt stack in _CPU_Initialize() if necessary (e.g.
m68k_install_interrupt_stack()).

The optional _CPU_Interrupt_stack_setup() is still useful to customize
the registration of the interrupt stack area in the per-CPU information.

The initialization stack can reuse the interrupt stack, since

  • interrupts are disabled during the sequential system initialization, and
  • the boot_card() function does not return.

This stack resuse saves memory.

Changes per architecture:

arm:

  • Mostly replace the linker symbol based configuration of stacks with the standard <rtems/confdefs.h> configuration via CONFIGURE_INTERRUPT_STACK_SIZE. The size of the FIQ, ABT and UND mode stack is still defined via linker symbols. These modes are rarely used in applications and the default values provided by the BSP should be sufficient in most cases.
  • Remove the bsp_processor_count linker symbol hack used for the SMP support. This is possible since the interrupt stack area is now allocated by the linker and not allocated from the heap. This makes some configure.ac stuff obsolete. Remove the now superfluous BSP variants altcycv_devkit_smp and realview_pbx_a9_qemu_smp.

bfin:

  • Remove unused magic linker command file allocation of initialization stack. Maybe a previous linker command file copy and paste problem? In the start.S the initialization stack is set to a hard coded value.

lm32, m32c, mips, nios2, riscv, sh, v850:

  • Remove magic linker command file allocation of initialization stack. Reuse interrupt stack for initialization stack.

m68k:

  • Remove magic linker command file allocation of initialization stack. Reuse interrupt stack for initialization stack.

powerpc:

  • Remove magic linker command file allocation of initialization stack. Reuse interrupt stack for initialization stack.
  • Used dedicated memory region (REGION_RTEMSSTACK) for the interrupt stack on BSPs using the shared linkcmds.base (replacement for REGION_RWEXTRA).

sparc:

  • Remove the hard coded initialization stack. Use the interrupt stack for the initialization stack on the boot processor. This saves 16KiB of RAM.

Update #3459.
  • Property mode set to 100644
File size: 2.5 KB
Line 
1/*
2 *  Opencore OR1K CPU Dependent Source
3 *
4 *  COPYRIGHT (c) 2014-2015 Hesham ALMatary <heshamelmatary@gmail.com>
5 *  COPYRIGHT (c) 1989-1999.
6 *  On-Line Applications Research Corporation (OAR).
7 *
8 *  The license and distribution terms for this file may be
9 *  found in the file LICENSE in this distribution or at
10 *  http://www.rtems.org/license/LICENSE.
11 *
12 */
13
14#include <rtems/system.h>
15#include <rtems/score/isr.h>
16#include <rtems/score/wkspace.h>
17#include <rtems/score/cpu.h>
18
19/* bsp_start_vector_table_begin is the start address of the vector table
20 * containing addresses to ISR Handlers. It's defined at the BSP linkcmds
21 * and may differ from one BSP to another.
22 */
23extern char bsp_start_vector_table_begin[];
24
25/**
26 * @brief Performs processor dependent initialization.
27 */
28void _CPU_Initialize(void)
29{
30  /* Do nothing */
31}
32
33/**
34 * @brief Sets the hardware interrupt level by the level value.
35 *
36 * @param[in] level for or1k can only range over two values:
37 * 0 (enable interrupts) and 1 (disable interrupts). In future
38 * implementations if fast context switch is implemented, the level
39 * can range from 0 to 15. @see OpenRISC architecture manual.
40 *
41 */
42void _CPU_ISR_Set_level(uint32_t level)
43{
44  uint32_t sr = 0;
45  level = (level > 0)? 1 : 0;
46
47  /* map level bit to or1k interrupt enable/disable bit in sr register */
48  level <<= CPU_OR1K_SPR_SR_SHAMT_IEE;
49
50  sr = _OR1K_mfspr(CPU_OR1K_SPR_SR);
51
52  if (level == 0){ /* Enable all interrupts */
53    sr |= CPU_OR1K_SPR_SR_IEE | CPU_OR1K_SPR_SR_TEE;
54
55  } else{
56    sr &= ~CPU_OR1K_SPR_SR_IEE;
57  }
58
59  _OR1K_mtspr(CPU_OR1K_SPR_SR, sr);
60 }
61
62uint32_t  _CPU_ISR_Get_level( void )
63{
64  uint32_t sr = 0;
65
66  sr = _OR1K_mfspr(CPU_OR1K_SPR_SR);
67
68  return (sr & CPU_OR1K_SPR_SR_IEE)? 0 : 1;
69}
70
71void _CPU_ISR_install_raw_handler(
72  uint32_t   vector,
73  proc_ptr    new_handler,
74  proc_ptr   *old_handler
75)
76{
77}
78
79void _CPU_ISR_install_vector(
80  uint32_t    vector,
81  proc_ptr    new_handler,
82  proc_ptr   *old_handler
83)
84{
85   proc_ptr *table =
86     (proc_ptr *) bsp_start_vector_table_begin;
87   proc_ptr current_handler;
88
89   ISR_Level level;
90
91  _ISR_Local_disable( level );
92
93  current_handler = table [vector];
94
95  /* The current handler is now the old one */
96  if (old_handler != NULL) {
97    *old_handler = (proc_ptr) current_handler;
98  }
99
100  /* Write only if necessary to avoid writes to a maybe read-only memory */
101  if (current_handler != new_handler) {
102    table [vector] = new_handler;
103  }
104
105   _ISR_Local_enable( level );
106}
107
108void *_CPU_Thread_Idle_body( uintptr_t ignored )
109{
110  do {
111     _OR1K_CPU_Sleep();
112  } while (1);
113}
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