source: rtems/cpukit/score/cpu/no_cpu/include/rtems/score/cpuimpl.h @ ee38c54

5
Last change on this file since ee38c54 was ee38c54, checked in by Andreas Dachsberger <andreas.dachsberger@…>, on 03/26/19 at 09:22:26

doxygen: score: Change no_cpu architecture group

Groups CPUContext and CPUInterrupt are now defined with a unique name
for this architecture group.
Update #3706.

  • Property mode set to 100644
File size: 3.7 KB
Line 
1/**
2 * @file
3 *
4 * @brief CPU Port Implementation API
5 */
6
7/*
8 * Copyright (c) 2013, 2016 embedded brains GmbH
9 *
10 * The license and distribution terms for this file may be
11 * found in the file LICENSE in this distribution or at
12 * http://www.rtems.org/license/LICENSE.
13 */
14
15#ifndef _RTEMS_SCORE_CPUIMPL_H
16#define _RTEMS_SCORE_CPUIMPL_H
17
18#include <rtems/score/cpu.h>
19
20/**
21 * @defgroup RTEMSScoreCPUExample Example
22 *
23 * @ingroup RTEMSScoreCPU
24 *
25 * @brief Example CPU Architecture Support.
26 *
27 * @{
28 */
29
30/**
31 * @brief The size of the CPU specific per-CPU control.
32 *
33 * This define must be visible to assember files since it is used to derive
34 * structure offsets.
35 */
36#define CPU_PER_CPU_CONTROL_SIZE 0
37
38#ifndef ASM
39
40#ifdef __cplusplus
41extern "C" {
42#endif
43
44/**
45 * @brief The CPU specific per-CPU control.
46 *
47 * The CPU port can place here all state information that must be available and
48 * maintained for each processor in the system.  This structure must contain at
49 * least one field for C/C++ compatibility.  In GNU C empty structures have a
50 * size of zero.  In C++ structures have a non-zero size.  In case
51 * CPU_PER_CPU_CONTROL_SIZE is defined to zero, then this structure is not
52 * used.
53 */
54typedef struct {
55  /* CPU specific per-CPU state */
56} CPU_Per_CPU_control;
57
58/**
59 * @brief Special register pointing to the per-CPU control of the current
60 * processor.
61 *
62 * This is optional.  Not every CPU port needs this.  It is only an optional
63 * optimization variant.
64 */
65register struct Per_CPU_Control *_CPU_Per_CPU_current asm( "rX" );
66
67/**
68 * @brief Optional method to obtain the per-CPU control of the current processor.
69 *
70 * This is optional.  Not every CPU port needs this.  It is only an optional
71 * optimization variant.  In case this macro is undefined, the default
72 * implementation using the current processor index will be used.
73 */
74#define _CPU_Get_current_per_CPU_control() ( _CPU_Per_CPU_current )
75
76/**
77 * @brief Optional method to get the executing thread.
78 *
79 * This is optional.  Not every CPU port needs this.  It is only an optional
80 * optimization variant.  In case this macro is undefined, the default
81 * implementation uses the per-CPU information and the current processor index
82 * to get the executing thread.
83 */
84#define _CPU_Get_thread_executing() ( _CPU_Per_CPU_current->executing )
85
86/**
87 * @addtogroup RTEMSScoreCPUExampleContext
88 *
89 * @brief Clobbers all volatile registers with values derived from the pattern
90 * parameter.
91 *
92 * This function is used only in test sptests/spcontext01.
93 *
94 * @param[in] pattern Pattern used to generate distinct register values.
95 *
96 * @see _CPU_Context_validate().
97 */
98void _CPU_Context_volatile_clobber( uintptr_t pattern );
99
100/**
101 * @addtogroup RTEMSScoreCPUExampleContext
102 *
103 * @brief Initializes and validates the CPU context with values derived from
104 * the pattern parameter.
105 *
106 * This function will not return if the CPU context remains consistent.  In
107 * case this function returns the CPU port is broken.
108 *
109 * This function is used only in test sptests/spcontext01.
110 *
111 * @param[in] pattern Pattern used to generate distinct register values.
112 *
113 * @see _CPU_Context_volatile_clobber().
114 */
115void _CPU_Context_validate( uintptr_t pattern );
116
117/**
118 * @brief Emits an illegal instruction.
119 *
120 * This function is used only in test sptests/spfatal26.
121 */
122RTEMS_INLINE_ROUTINE void _CPU_Instruction_illegal( void )
123{
124  __asm__ volatile ( ".word 0" );
125}
126
127/**
128 * @brief Emits a no operation instruction (nop).
129 *
130 * This function is used only in test sptests/spcache01.
131 */
132RTEMS_INLINE_ROUTINE void _CPU_Instruction_no_operation( void )
133{
134  __asm__ volatile ( "nop" );
135}
136
137#ifdef __cplusplus
138}
139#endif
140
141#endif /* ASM */
142
143/** @} */
144
145#endif /* _RTEMS_SCORE_CPUIMPL_H */
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