1 | /** |
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2 | * @file |
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3 | * |
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4 | * @brief CPU Port Implementation API |
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5 | */ |
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6 | |
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7 | /* |
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8 | * Copyright (c) 2013, 2016 embedded brains GmbH |
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9 | * |
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10 | * The license and distribution terms for this file may be |
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11 | * found in the file LICENSE in this distribution or at |
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12 | * http://www.rtems.org/license/LICENSE. |
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13 | */ |
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14 | |
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15 | #ifndef _RTEMS_SCORE_CPUIMPL_H |
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16 | #define _RTEMS_SCORE_CPUIMPL_H |
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17 | |
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18 | #include <rtems/score/cpu.h> |
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19 | |
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20 | /** |
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21 | * @defgroup RTEMSScoreCPUExample Example |
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22 | * |
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23 | * @ingroup RTEMSScoreCPU |
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24 | * |
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25 | * @brief Example CPU Architecture Support. |
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26 | * |
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27 | * @{ |
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28 | */ |
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29 | |
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30 | /** |
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31 | * @brief The size of the CPU specific per-CPU control. |
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32 | * |
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33 | * This define must be visible to assember files since it is used to derive |
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34 | * structure offsets. |
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35 | */ |
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36 | #define CPU_PER_CPU_CONTROL_SIZE 0 |
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37 | |
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38 | #ifndef ASM |
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39 | |
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40 | #ifdef __cplusplus |
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41 | extern "C" { |
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42 | #endif |
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43 | |
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44 | /** |
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45 | * @brief The CPU specific per-CPU control. |
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46 | * |
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47 | * The CPU port can place here all state information that must be available and |
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48 | * maintained for each processor in the system. This structure must contain at |
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49 | * least one field for C/C++ compatibility. In GNU C empty structures have a |
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50 | * size of zero. In C++ structures have a non-zero size. In case |
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51 | * CPU_PER_CPU_CONTROL_SIZE is defined to zero, then this structure is not |
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52 | * used. |
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53 | */ |
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54 | typedef struct { |
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55 | /* CPU specific per-CPU state */ |
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56 | } CPU_Per_CPU_control; |
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57 | |
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58 | /** |
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59 | * @brief Special register pointing to the per-CPU control of the current |
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60 | * processor. |
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61 | * |
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62 | * This is optional. Not every CPU port needs this. It is only an optional |
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63 | * optimization variant. |
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64 | */ |
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65 | register struct Per_CPU_Control *_CPU_Per_CPU_current asm( "rX" ); |
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66 | |
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67 | /** |
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68 | * @brief Optional method to obtain the per-CPU control of the current processor. |
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69 | * |
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70 | * This is optional. Not every CPU port needs this. It is only an optional |
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71 | * optimization variant. In case this macro is undefined, the default |
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72 | * implementation using the current processor index will be used. |
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73 | */ |
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74 | #define _CPU_Get_current_per_CPU_control() ( _CPU_Per_CPU_current ) |
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75 | |
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76 | /** |
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77 | * @brief Optional method to get the executing thread. |
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78 | * |
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79 | * This is optional. Not every CPU port needs this. It is only an optional |
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80 | * optimization variant. In case this macro is undefined, the default |
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81 | * implementation uses the per-CPU information and the current processor index |
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82 | * to get the executing thread. |
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83 | */ |
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84 | #define _CPU_Get_thread_executing() ( _CPU_Per_CPU_current->executing ) |
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85 | |
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86 | /** |
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87 | * @addtogroup RTEMSScoreCPUExampleContext |
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88 | * |
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89 | * @brief Clobbers all volatile registers with values derived from the pattern |
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90 | * parameter. |
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91 | * |
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92 | * This function is used only in test sptests/spcontext01. |
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93 | * |
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94 | * @param[in] pattern Pattern used to generate distinct register values. |
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95 | * |
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96 | * @see _CPU_Context_validate(). |
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97 | */ |
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98 | void _CPU_Context_volatile_clobber( uintptr_t pattern ); |
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99 | |
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100 | /** |
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101 | * @addtogroup RTEMSScoreCPUExampleContext |
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102 | * |
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103 | * @brief Initializes and validates the CPU context with values derived from |
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104 | * the pattern parameter. |
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105 | * |
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106 | * This function will not return if the CPU context remains consistent. In |
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107 | * case this function returns the CPU port is broken. |
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108 | * |
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109 | * This function is used only in test sptests/spcontext01. |
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110 | * |
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111 | * @param[in] pattern Pattern used to generate distinct register values. |
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112 | * |
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113 | * @see _CPU_Context_volatile_clobber(). |
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114 | */ |
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115 | void _CPU_Context_validate( uintptr_t pattern ); |
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116 | |
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117 | /** |
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118 | * @brief Emits an illegal instruction. |
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119 | * |
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120 | * This function is used only in test sptests/spfatal26. |
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121 | */ |
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122 | RTEMS_INLINE_ROUTINE void _CPU_Instruction_illegal( void ) |
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123 | { |
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124 | __asm__ volatile ( ".word 0" ); |
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125 | } |
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126 | |
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127 | /** |
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128 | * @brief Emits a no operation instruction (nop). |
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129 | * |
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130 | * This function is used only in test sptests/spcache01. |
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131 | */ |
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132 | RTEMS_INLINE_ROUTINE void _CPU_Instruction_no_operation( void ) |
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133 | { |
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134 | __asm__ volatile ( "nop" ); |
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135 | } |
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136 | |
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137 | #ifdef __cplusplus |
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138 | } |
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139 | #endif |
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140 | |
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141 | #endif /* ASM */ |
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142 | |
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143 | /** @} */ |
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144 | |
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145 | #endif /* _RTEMS_SCORE_CPUIMPL_H */ |
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