source: rtems/cpukit/score/cpu/no_cpu/cpu_asm.c @ 3d0e458

4.104.11
Last change on this file since 3d0e458 was 3d0e458, checked in by Joel Sherrill <joel.sherrill@…>, on Oct 2, 2008 at 8:20:17 PM

2008-10-02 Joel Sherrill <joel.sherrill@…>

  • cpu_asm.c, rtems/score/cpu.h, rtems/score/types.h: Corrections and updates.
  • Property mode set to 100644
File size: 5.3 KB
Line 
1/*  cpu_asm.c  ===> cpu_asm.S or cpu_asm.s
2 *
3 *  This file contains the basic algorithms for all assembly code used
4 *  in an specific CPU port of RTEMS.  These algorithms must be implemented
5 *  in assembly language
6 *
7 *  NOTE:  This is supposed to be a .S or .s file NOT a C file.
8 *
9 *  COPYRIGHT (c) 1989-1999.
10 *  On-Line Applications Research Corporation (OAR).
11 *
12 *  The license and distribution terms for this file may be
13 *  found in the file LICENSE in this distribution or at
14 *  http://www.rtems.com/license/LICENSE.
15 *
16 *  $Id$
17 */
18
19/*
20 *  This is supposed to be an assembly file.  This means that system.h
21 *  and cpu.h should not be included in a "real" cpu_asm file.  An
22 *  implementation in assembly should include "cpu_asm.h>
23 */
24
25#include <rtems/system.h>
26#include <rtems/score/cpu.h>
27/* #include "cpu_asm.h> */
28
29/*
30 *  _CPU_Context_save_fp_context
31 *
32 *  This routine is responsible for saving the FP context
33 *  at *fp_context_ptr.  If the point to load the FP context
34 *  from is changed then the pointer is modified by this routine.
35 *
36 *  Sometimes a macro implementation of this is in cpu.h which dereferences
37 *  the ** and a similarly named routine in this file is passed something
38 *  like a (Context_Control_fp *).  The general rule on making this decision
39 *  is to avoid writing assembly language.
40 *
41 *  NO_CPU Specific Information:
42 *
43 *  XXX document implementation including references if appropriate
44 */
45
46void _CPU_Context_save_fp(
47  Context_Control_fp **fp_context_ptr
48)
49{
50}
51
52/*
53 *  _CPU_Context_restore_fp_context
54 *
55 *  This routine is responsible for restoring the FP context
56 *  at *fp_context_ptr.  If the point to load the FP context
57 *  from is changed then the pointer is modified by this routine.
58 *
59 *  Sometimes a macro implementation of this is in cpu.h which dereferences
60 *  the ** and a similarly named routine in this file is passed something
61 *  like a (Context_Control_fp *).  The general rule on making this decision
62 *  is to avoid writing assembly language.
63 *
64 *  NO_CPU Specific Information:
65 *
66 *  XXX document implementation including references if appropriate
67 */
68
69void _CPU_Context_restore_fp(
70  Context_Control_fp **fp_context_ptr
71)
72{
73}
74
75/*  _CPU_Context_switch
76 *
77 *  This routine performs a normal non-FP context switch.
78 *
79 *  NO_CPU Specific Information:
80 *
81 *  XXX document implementation including references if appropriate
82 */
83
84void _CPU_Context_switch(
85  Context_Control  *run,
86  Context_Control  *heir
87)
88{
89}
90
91/*
92 *  _CPU_Context_restore
93 *
94 *  This routine is generally used only to restart self in an
95 *  efficient manner.  It may simply be a label in _CPU_Context_switch.
96 *
97 *  NOTE: May be unnecessary to reload some registers.
98 *
99 *  NO_CPU Specific Information:
100 *
101 *  XXX document implementation including references if appropriate
102 */
103
104void _CPU_Context_restore(
105  Context_Control *new_context
106)
107{
108}
109
110/*  void __ISR_Handler()
111 *
112 *  This routine provides the RTEMS interrupt management.
113 *
114 *  NO_CPU Specific Information:
115 *
116 *  XXX document implementation including references if appropriate
117 */
118
119void _ISR_Handler(void)
120{
121   /*
122    *  This discussion ignores a lot of the ugly details in a real
123    *  implementation such as saving enough registers/state to be
124    *  able to do something real.  Keep in mind that the goal is
125    *  to invoke a user's ISR handler which is written in C and
126    *  uses a certain set of registers.
127    *
128    *  Also note that the exact order is to a large extent flexible.
129    *  Hardware will dictate a sequence for a certain subset of
130    *  _ISR_Handler while requirements for setting
131    */
132
133  /*
134   *  At entry to "common" _ISR_Handler, the vector number must be
135   *  available.  On some CPUs the hardware puts either the vector
136   *  number or the offset into the vector table for this ISR in a
137   *  known place.  If the hardware does not give us this information,
138   *  then the assembly portion of RTEMS for this port will contain
139   *  a set of distinct interrupt entry points which somehow place
140   *  the vector number in a known place (which is safe if another
141   *  interrupt nests this one) and branches to _ISR_Handler.
142   *
143   *  save some or all context on stack
144   *  may need to save some special interrupt information for exit
145   *
146   *  #if ( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE )
147   *    if ( _ISR_Nest_level == 0 )
148   *      switch to software interrupt stack
149   *  #endif
150   *
151   *  _ISR_Nest_level++;
152   *
153   *  _Thread_Dispatch_disable_level++;
154   *
155   *  (*_ISR_Vector_table[ vector ])( vector );
156   *
157   *  _Thread_Dispatch_disable_level--;
158   *
159   *  --_ISR_Nest_level;
160   *
161   *  if ( _ISR_Nest_level )
162   *    goto the label "exit interrupt (simple case)"
163   *
164   *  if ( _Thread_Dispatch_disable_level )
165   *    _ISR_Signals_to_thread_executing = FALSE;
166   *    goto the label "exit interrupt (simple case)"
167   *
168   *  if ( _Context_Switch_necessary || _ISR_Signals_to_thread_executing ) {
169   *    _ISR_Signals_to_thread_executing = FALSE;
170   *    call _Thread_Dispatch() or prepare to return to _ISR_Dispatch
171   *    prepare to get out of interrupt
172   *    return from interrupt  (maybe to _ISR_Dispatch)
173   *
174   *  LABEL "exit interrupt (simple case):
175   *  #if ( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE )
176   *    if outermost interrupt
177   *      restore stack
178   *  #endif
179   *  prepare to get out of interrupt
180   *  return from interrupt
181   */
182}
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