1 | /** |
---|
2 | * @file |
---|
3 | * |
---|
4 | * @brief No CPU Assembly File |
---|
5 | */ |
---|
6 | |
---|
7 | /* cpu_asm.c ===> cpu_asm.S or cpu_asm.s |
---|
8 | * |
---|
9 | * This file contains the basic algorithms for all assembly code used |
---|
10 | * in an specific CPU port of RTEMS. These algorithms must be implemented |
---|
11 | * in assembly language |
---|
12 | * |
---|
13 | * NOTE: This is supposed to be a .S or .s file NOT a C file. |
---|
14 | * |
---|
15 | * COPYRIGHT (c) 1989-1999. |
---|
16 | * On-Line Applications Research Corporation (OAR). |
---|
17 | * |
---|
18 | * The license and distribution terms for this file may be |
---|
19 | * found in the file LICENSE in this distribution or at |
---|
20 | * http://www.rtems.org/license/LICENSE. |
---|
21 | */ |
---|
22 | |
---|
23 | /* |
---|
24 | * This is supposed to be an assembly file. This means that system.h |
---|
25 | * and cpu.h should not be included in a "real" cpu_asm file. An |
---|
26 | * implementation in assembly should include "cpu_asm.h> |
---|
27 | */ |
---|
28 | |
---|
29 | #ifdef HAVE_CONFIG_H |
---|
30 | #include "config.h" |
---|
31 | #endif |
---|
32 | |
---|
33 | #include <rtems/system.h> |
---|
34 | #include <rtems/score/cpu.h> |
---|
35 | /* #include "cpu_asm.h> */ |
---|
36 | |
---|
37 | /* |
---|
38 | * _CPU_Context_save_fp_context |
---|
39 | * |
---|
40 | * This routine is responsible for saving the FP context |
---|
41 | * at *fp_context_ptr. If the point to load the FP context |
---|
42 | * from is changed then the pointer is modified by this routine. |
---|
43 | * |
---|
44 | * Sometimes a macro implementation of this is in cpu.h which dereferences |
---|
45 | * the ** and a similarly named routine in this file is passed something |
---|
46 | * like a (Context_Control_fp *). The general rule on making this decision |
---|
47 | * is to avoid writing assembly language. |
---|
48 | * |
---|
49 | * NO_CPU Specific Information: |
---|
50 | * |
---|
51 | * XXX document implementation including references if appropriate |
---|
52 | */ |
---|
53 | |
---|
54 | void _CPU_Context_save_fp( |
---|
55 | Context_Control_fp **fp_context_ptr |
---|
56 | ) |
---|
57 | { |
---|
58 | } |
---|
59 | |
---|
60 | /* |
---|
61 | * _CPU_Context_restore_fp_context |
---|
62 | * |
---|
63 | * This routine is responsible for restoring the FP context |
---|
64 | * at *fp_context_ptr. If the point to load the FP context |
---|
65 | * from is changed then the pointer is modified by this routine. |
---|
66 | * |
---|
67 | * Sometimes a macro implementation of this is in cpu.h which dereferences |
---|
68 | * the ** and a similarly named routine in this file is passed something |
---|
69 | * like a (Context_Control_fp *). The general rule on making this decision |
---|
70 | * is to avoid writing assembly language. |
---|
71 | * |
---|
72 | * NO_CPU Specific Information: |
---|
73 | * |
---|
74 | * XXX document implementation including references if appropriate |
---|
75 | */ |
---|
76 | |
---|
77 | void _CPU_Context_restore_fp( |
---|
78 | Context_Control_fp **fp_context_ptr |
---|
79 | ) |
---|
80 | { |
---|
81 | } |
---|
82 | |
---|
83 | /* _CPU_Context_switch |
---|
84 | * |
---|
85 | * This routine performs a normal non-FP context switch. |
---|
86 | * |
---|
87 | * NO_CPU Specific Information: |
---|
88 | * |
---|
89 | * XXX document implementation including references if appropriate |
---|
90 | */ |
---|
91 | |
---|
92 | void _CPU_Context_switch( |
---|
93 | Context_Control *run, |
---|
94 | Context_Control *heir |
---|
95 | ) |
---|
96 | { |
---|
97 | } |
---|
98 | |
---|
99 | /* |
---|
100 | * _CPU_Context_restore |
---|
101 | * |
---|
102 | * This routine is generally used only to restart self in an |
---|
103 | * efficient manner. It may simply be a label in _CPU_Context_switch. |
---|
104 | * |
---|
105 | * NOTE: May be unnecessary to reload some registers. |
---|
106 | * |
---|
107 | * NO_CPU Specific Information: |
---|
108 | * |
---|
109 | * XXX document implementation including references if appropriate |
---|
110 | */ |
---|
111 | |
---|
112 | void _CPU_Context_restore( |
---|
113 | Context_Control *new_context |
---|
114 | ) |
---|
115 | { |
---|
116 | } |
---|
117 | |
---|
118 | /* void __ISR_Handler() |
---|
119 | * |
---|
120 | * This routine provides the RTEMS interrupt management. |
---|
121 | * |
---|
122 | * NO_CPU Specific Information: |
---|
123 | * |
---|
124 | * XXX document implementation including references if appropriate |
---|
125 | */ |
---|
126 | |
---|
127 | void _ISR_Handler(void) |
---|
128 | { |
---|
129 | /* |
---|
130 | * This discussion ignores a lot of the ugly details in a real |
---|
131 | * implementation such as saving enough registers/state to be |
---|
132 | * able to do something real. Keep in mind that the goal is |
---|
133 | * to invoke a user's ISR handler which is written in C and |
---|
134 | * uses a certain set of registers. |
---|
135 | * |
---|
136 | * Also note that the exact order is to a large extent flexible. |
---|
137 | * Hardware will dictate a sequence for a certain subset of |
---|
138 | * _ISR_Handler while requirements for setting |
---|
139 | */ |
---|
140 | |
---|
141 | /* |
---|
142 | * At entry to "common" _ISR_Handler, the vector number must be |
---|
143 | * available. On some CPUs the hardware puts either the vector |
---|
144 | * number or the offset into the vector table for this ISR in a |
---|
145 | * known place. If the hardware does not give us this information, |
---|
146 | * then the assembly portion of RTEMS for this port will contain |
---|
147 | * a set of distinct interrupt entry points which somehow place |
---|
148 | * the vector number in a known place (which is safe if another |
---|
149 | * interrupt nests this one) and branches to _ISR_Handler. |
---|
150 | * |
---|
151 | * save some or all context on stack |
---|
152 | * may need to save some special interrupt information for exit |
---|
153 | * |
---|
154 | * #if ( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE ) |
---|
155 | * if ( _ISR_Nest_level == 0 ) |
---|
156 | * switch to software interrupt stack |
---|
157 | * #endif |
---|
158 | * |
---|
159 | * _ISR_Nest_level++; |
---|
160 | * |
---|
161 | * _Thread_Dispatch_disable_level++; |
---|
162 | * |
---|
163 | * (*_ISR_Vector_table[ vector ])( vector ); |
---|
164 | * |
---|
165 | * _Thread_Dispatch_disable_level--; |
---|
166 | * |
---|
167 | * --_ISR_Nest_level; |
---|
168 | * |
---|
169 | * if ( _ISR_Nest_level ) |
---|
170 | * goto the label "exit interrupt (simple case)" |
---|
171 | * |
---|
172 | * if ( _Thread_Dispatch_disable_level ) |
---|
173 | * goto the label "exit interrupt (simple case)" |
---|
174 | * |
---|
175 | * if ( _Thread_Dispatch_necessary ) { |
---|
176 | * call _Thread_Dispatch() or prepare to return to _ISR_Dispatch |
---|
177 | * prepare to get out of interrupt |
---|
178 | * return from interrupt (maybe to _ISR_Dispatch) |
---|
179 | * |
---|
180 | * LABEL "exit interrupt (simple case): |
---|
181 | * #if ( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE ) |
---|
182 | * if outermost interrupt |
---|
183 | * restore stack |
---|
184 | * #endif |
---|
185 | * prepare to get out of interrupt |
---|
186 | * return from interrupt |
---|
187 | */ |
---|
188 | } |
---|