[ac7d5ef0] | 1 | /* cpu_asm.c ===> cpu_asm.S or cpu_asm.s |
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| 2 | * |
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| 3 | * This file contains the basic algorithms for all assembly code used |
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| 4 | * in an specific CPU port of RTEMS. These algorithms must be implemented |
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| 5 | * in assembly language |
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| 6 | * |
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| 7 | * NOTE: This is supposed to be a .S or .s file NOT a C file. |
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| 8 | * |
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[08311cc3] | 9 | * COPYRIGHT (c) 1989-1999. |
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[ac7d5ef0] | 10 | * On-Line Applications Research Corporation (OAR). |
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| 11 | * |
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[98e4ebf5] | 12 | * The license and distribution terms for this file may be |
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| 13 | * found in the file LICENSE in this distribution or at |
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[03f2154e] | 14 | * http://www.OARcorp.com/rtems/license.html. |
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[ac7d5ef0] | 15 | * |
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| 16 | * $Id$ |
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| 17 | */ |
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| 18 | |
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| 19 | /* |
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| 20 | * This is supposed to be an assembly file. This means that system.h |
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| 21 | * and cpu.h should not be included in a "real" cpu_asm file. An |
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| 22 | * implementation in assembly should include "cpu_asm.h> |
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| 23 | */ |
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| 24 | |
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| 25 | #include <rtems/system.h> |
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[5e9b32b] | 26 | #include <rtems/score/cpu.h> |
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[ac7d5ef0] | 27 | /* #include "cpu_asm.h> */ |
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| 28 | |
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| 29 | /* |
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| 30 | * _CPU_Context_save_fp_context |
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| 31 | * |
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| 32 | * This routine is responsible for saving the FP context |
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| 33 | * at *fp_context_ptr. If the point to load the FP context |
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| 34 | * from is changed then the pointer is modified by this routine. |
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| 35 | * |
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| 36 | * Sometimes a macro implementation of this is in cpu.h which dereferences |
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| 37 | * the ** and a similarly named routine in this file is passed something |
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| 38 | * like a (Context_Control_fp *). The general rule on making this decision |
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| 39 | * is to avoid writing assembly language. |
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[df49c60] | 40 | * |
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| 41 | * NO_CPU Specific Information: |
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| 42 | * |
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| 43 | * XXX document implementation including references if appropriate |
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[ac7d5ef0] | 44 | */ |
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| 45 | |
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| 46 | void _CPU_Context_save_fp( |
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| 47 | void **fp_context_ptr |
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| 48 | ) |
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| 49 | { |
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| 50 | } |
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| 51 | |
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| 52 | /* |
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| 53 | * _CPU_Context_restore_fp_context |
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| 54 | * |
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| 55 | * This routine is responsible for restoring the FP context |
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| 56 | * at *fp_context_ptr. If the point to load the FP context |
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| 57 | * from is changed then the pointer is modified by this routine. |
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| 58 | * |
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| 59 | * Sometimes a macro implementation of this is in cpu.h which dereferences |
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| 60 | * the ** and a similarly named routine in this file is passed something |
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| 61 | * like a (Context_Control_fp *). The general rule on making this decision |
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| 62 | * is to avoid writing assembly language. |
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[df49c60] | 63 | * |
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| 64 | * NO_CPU Specific Information: |
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| 65 | * |
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| 66 | * XXX document implementation including references if appropriate |
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[ac7d5ef0] | 67 | */ |
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| 68 | |
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| 69 | void _CPU_Context_restore_fp( |
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| 70 | void **fp_context_ptr |
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| 71 | ) |
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| 72 | { |
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| 73 | } |
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| 74 | |
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| 75 | /* _CPU_Context_switch |
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| 76 | * |
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| 77 | * This routine performs a normal non-FP context switch. |
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[df49c60] | 78 | * |
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| 79 | * NO_CPU Specific Information: |
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| 80 | * |
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| 81 | * XXX document implementation including references if appropriate |
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[ac7d5ef0] | 82 | */ |
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| 83 | |
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| 84 | void _CPU_Context_switch( |
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| 85 | Context_Control *run, |
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| 86 | Context_Control *heir |
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| 87 | ) |
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| 88 | { |
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| 89 | } |
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| 90 | |
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| 91 | /* |
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| 92 | * _CPU_Context_restore |
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| 93 | * |
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[77ea27fc] | 94 | * This routine is generally used only to restart self in an |
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[ac7d5ef0] | 95 | * efficient manner. It may simply be a label in _CPU_Context_switch. |
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| 96 | * |
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| 97 | * NOTE: May be unnecessary to reload some registers. |
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[df49c60] | 98 | * |
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| 99 | * NO_CPU Specific Information: |
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| 100 | * |
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| 101 | * XXX document implementation including references if appropriate |
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[ac7d5ef0] | 102 | */ |
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| 103 | |
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| 104 | void _CPU_Context_restore( |
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| 105 | Context_Control *new_context |
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| 106 | ) |
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| 107 | { |
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| 108 | } |
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| 109 | |
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| 110 | /* void __ISR_Handler() |
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| 111 | * |
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| 112 | * This routine provides the RTEMS interrupt management. |
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| 113 | * |
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[df49c60] | 114 | * NO_CPU Specific Information: |
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| 115 | * |
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| 116 | * XXX document implementation including references if appropriate |
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[ac7d5ef0] | 117 | */ |
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| 118 | |
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| 119 | void _ISR_Handler() |
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| 120 | { |
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| 121 | /* |
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| 122 | * This discussion ignores a lot of the ugly details in a real |
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| 123 | * implementation such as saving enough registers/state to be |
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| 124 | * able to do something real. Keep in mind that the goal is |
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| 125 | * to invoke a user's ISR handler which is written in C and |
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| 126 | * uses a certain set of registers. |
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| 127 | * |
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| 128 | * Also note that the exact order is to a large extent flexible. |
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| 129 | * Hardware will dictate a sequence for a certain subset of |
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| 130 | * _ISR_Handler while requirements for setting |
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| 131 | */ |
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| 132 | |
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| 133 | /* |
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| 134 | * At entry to "common" _ISR_Handler, the vector number must be |
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| 135 | * available. On some CPUs the hardware puts either the vector |
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| 136 | * number or the offset into the vector table for this ISR in a |
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| 137 | * known place. If the hardware does not give us this information, |
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| 138 | * then the assembly portion of RTEMS for this port will contain |
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| 139 | * a set of distinct interrupt entry points which somehow place |
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| 140 | * the vector number in a known place (which is safe if another |
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| 141 | * interrupt nests this one) and branches to _ISR_Handler. |
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| 142 | * |
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| 143 | * save some or all context on stack |
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| 144 | * may need to save some special interrupt information for exit |
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| 145 | * |
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| 146 | * #if ( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE ) |
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| 147 | * if ( _ISR_Nest_level == 0 ) |
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| 148 | * switch to software interrupt stack |
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| 149 | * #endif |
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| 150 | * |
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| 151 | * _ISR_Nest_level++; |
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| 152 | * |
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| 153 | * _Thread_Dispatch_disable_level++; |
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| 154 | * |
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| 155 | * (*_ISR_Vector_table[ vector ])( vector ); |
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| 156 | * |
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[34d877e] | 157 | * --_ISR_Nest_level; |
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| 158 | * |
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| 159 | * if ( _ISR_Nest_level ) |
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| 160 | * goto the label "exit interrupt (simple case)" |
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| 161 | * |
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[ac7d5ef0] | 162 | * #if ( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE ) |
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| 163 | * restore stack |
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| 164 | * #endif |
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[34d877e] | 165 | * |
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| 166 | * if ( !_Context_Switch_necessary ) |
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| 167 | * goto the label "exit interrupt (simple case)" |
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| 168 | * |
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| 169 | * if ( !_ISR_Signals_to_thread_executing ) |
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[8a38f3b] | 170 | * _ISR_Signals_to_thread_executing = FALSE; |
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[34d877e] | 171 | * goto the label "exit interrupt (simple case)" |
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| 172 | * |
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| 173 | * call _Thread_Dispatch() or prepare to return to _ISR_Dispatch |
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[ac7d5ef0] | 174 | * |
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| 175 | * prepare to get out of interrupt |
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[34d877e] | 176 | * return from interrupt (maybe to _ISR_Dispatch) |
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[ac7d5ef0] | 177 | * |
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[34d877e] | 178 | * LABEL "exit interrupt (simple case): |
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| 179 | * prepare to get out of interrupt |
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| 180 | * return from interrupt |
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[ac7d5ef0] | 181 | */ |
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| 182 | } |
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| 183 | |
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