source: rtems/cpukit/score/cpu/no_cpu/cpu_asm.c

Last change on this file was 3ca8895f, checked in by Joel Sherrill <joel@…>, on 02/16/22 at 22:55:20

score/cpu/no_cpu: Change license to BSD-2

Updates #3053.

  • Property mode set to 100644
File size: 6.2 KB
Line 
1/* SPDX-License-Identifier: BSD-2-Clause */
2
3/**
4 *  @file
5 *
6 *  @brief No CPU Assembly File
7 */
8
9/*  cpu_asm.c  ===> cpu_asm.S or cpu_asm.s
10 *
11 *  This file contains the basic algorithms for all assembly code used
12 *  in an specific CPU port of RTEMS.  These algorithms must be implemented
13 *  in assembly language
14 *
15 *  NOTE:  This is supposed to be a .S or .s file NOT a C file.
16 *
17 *  COPYRIGHT (c) 1989-1999.
18 *  On-Line Applications Research Corporation (OAR).
19 *
20 * Redistribution and use in source and binary forms, with or without
21 * modification, are permitted provided that the following conditions
22 * are met:
23 * 1. Redistributions of source code must retain the above copyright
24 *    notice, this list of conditions and the following disclaimer.
25 * 2. Redistributions in binary form must reproduce the above copyright
26 *    notice, this list of conditions and the following disclaimer in the
27 *    documentation and/or other materials provided with the distribution.
28 *
29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
30 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
31 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
32 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
33 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
34 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
35 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
36 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
37 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
38 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
39 * POSSIBILITY OF SUCH DAMAGE.
40 */
41
42/*
43 *  This is supposed to be an assembly file.  This means that system.h
44 *  and cpu.h should not be included in a "real" cpu_asm file.  An
45 *  implementation in assembly should include "cpu_asm.h>
46 */
47
48#ifdef HAVE_CONFIG_H
49#include "config.h"
50#endif
51
52#include <rtems/score/cpu.h>
53/* #include "cpu_asm.h> */
54
55/*
56 *  _CPU_Context_save_fp_context
57 *
58 *  This routine is responsible for saving the FP context
59 *  at *fp_context_ptr.  If the point to load the FP context
60 *  from is changed then the pointer is modified by this routine.
61 *
62 *  Sometimes a macro implementation of this is in cpu.h which dereferences
63 *  the ** and a similarly named routine in this file is passed something
64 *  like a (Context_Control_fp *).  The general rule on making this decision
65 *  is to avoid writing assembly language.
66 *
67 *  NO_CPU Specific Information:
68 *
69 *  XXX document implementation including references if appropriate
70 */
71
72void _CPU_Context_save_fp(
73  Context_Control_fp **fp_context_ptr
74)
75{
76}
77
78/*
79 *  _CPU_Context_restore_fp_context
80 *
81 *  This routine is responsible for restoring the FP context
82 *  at *fp_context_ptr.  If the point to load the FP context
83 *  from is changed then the pointer is modified by this routine.
84 *
85 *  Sometimes a macro implementation of this is in cpu.h which dereferences
86 *  the ** and a similarly named routine in this file is passed something
87 *  like a (Context_Control_fp *).  The general rule on making this decision
88 *  is to avoid writing assembly language.
89 *
90 *  NO_CPU Specific Information:
91 *
92 *  XXX document implementation including references if appropriate
93 */
94
95void _CPU_Context_restore_fp(
96  Context_Control_fp **fp_context_ptr
97)
98{
99}
100
101/*  _CPU_Context_switch
102 *
103 *  This routine performs a normal non-FP context switch.
104 *
105 *  NO_CPU Specific Information:
106 *
107 *  XXX document implementation including references if appropriate
108 */
109
110void _CPU_Context_switch(
111  Context_Control  *run,
112  Context_Control  *heir
113)
114{
115}
116
117/*
118 *  _CPU_Context_restore
119 *
120 *  This routine is generally used only to restart self in an
121 *  efficient manner.  It may simply be a label in _CPU_Context_switch.
122 *
123 *  NOTE: May be unnecessary to reload some registers.
124 *
125 *  NO_CPU Specific Information:
126 *
127 *  XXX document implementation including references if appropriate
128 */
129
130void _CPU_Context_restore(
131  Context_Control *new_context
132)
133{
134}
135
136/*  void __ISR_Handler()
137 *
138 *  This routine provides the RTEMS interrupt management.
139 *
140 *  NO_CPU Specific Information:
141 *
142 *  XXX document implementation including references if appropriate
143 */
144
145void _ISR_Handler(void)
146{
147   /*
148    *  This discussion ignores a lot of the ugly details in a real
149    *  implementation such as saving enough registers/state to be
150    *  able to do something real.  Keep in mind that the goal is
151    *  to invoke a user's ISR handler which is written in C and
152    *  uses a certain set of registers.
153    *
154    *  Also note that the exact order is to a large extent flexible.
155    *  Hardware will dictate a sequence for a certain subset of
156    *  _ISR_Handler while requirements for setting
157    */
158
159  /*
160   *  At entry to "common" _ISR_Handler, the vector number must be
161   *  available.  On some CPUs the hardware puts either the vector
162   *  number or the offset into the vector table for this ISR in a
163   *  known place.  If the hardware does not give us this information,
164   *  then the assembly portion of RTEMS for this port will contain
165   *  a set of distinct interrupt entry points which somehow place
166   *  the vector number in a known place (which is safe if another
167   *  interrupt nests this one) and branches to _ISR_Handler.
168   *
169   *  save some or all context on stack
170   *  may need to save some special interrupt information for exit
171   *
172   *  if ( _ISR_Nest_level == 0 )
173   *    switch to software interrupt stack
174   *
175   *  _ISR_Nest_level++;
176   *
177   *  _Thread_Dispatch_disable_level++;
178   *
179   *  (*_ISR_Vector_table[ vector ])( vector );
180   *
181   *  _Thread_Dispatch_disable_level--;
182   *
183   *  --_ISR_Nest_level;
184   *
185   *  if ( _ISR_Nest_level )
186   *    goto the label "exit interrupt (simple case)"
187   *
188   *  if ( _Thread_Dispatch_disable_level )
189   *    goto the label "exit interrupt (simple case)"
190   *
191   *  if ( _Thread_Dispatch_necessary ) {
192   *    call _Thread_Dispatch() or prepare to return from interrupt
193   *    prepare to get out of interrupt
194   *    return from interrupt
195   *
196   *  LABEL "exit interrupt (simple case):
197   *  if outermost interrupt
198   *    restore stack
199   *  prepare to get out of interrupt
200   *  return from interrupt
201   */
202}
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