source: rtems/cpukit/score/cpu/nios2/nios2-fatal-halt.c

Last change on this file was bcef89f2, checked in by Sebastian Huber <sebastian.huber@…>, on 05/19/23 at 06:18:25

Update company name

The embedded brains GmbH & Co. KG is the legal successor of embedded
brains GmbH.

  • Property mode set to 100644
File size: 1.9 KB
Line 
1/* SPDX-License-Identifier: BSD-2-Clause */
2
3/*
4 *  Copyright (c) 2011 embedded brains GmbH & Co. KG
5 *
6 *  Copyright (c) 2006 Kolja Waschk (rtemsdev/ixo.de)
7 *
8 *  COPYRIGHT (c) 1989-2004.
9 *  On-Line Applications Research Corporation (OAR).
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 *    notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 *    notice, this list of conditions and the following disclaimer in the
18 *    documentation and/or other materials provided with the distribution.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
24 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 * POSSIBILITY OF SUCH DAMAGE.
31 */
32
33#include <rtems/score/cpuimpl.h>
34#include <rtems/score/nios2-utility.h>
35
36void _CPU_Fatal_halt( uint32_t _source, CPU_Uint32ptr _error )
37{
38  /* write 0 to status register (disable interrupts) */
39  __builtin_wrctl( NIOS2_CTLREG_INDEX_STATUS, 0 );
40
41  /* write error code to ET register */
42  __asm__ volatile ("mov et, %z0" : : "rM" (_error));
43
44  while (1);
45}
Note: See TracBrowser for help on using the repository browser.