source: rtems/cpukit/score/cpu/nios2/cpu.c @ 50f4487

4.104.114.84.95
Last change on this file since 50f4487 was 50f4487, checked in by Joel Sherrill <joel.sherrill@…>, on Aug 9, 2006 at 8:58:11 PM

2006-08-09 Kolja Waschk <waschk@…>

  • ChangeLog?, Makefile.am, cpu.c, cpu_asm.S, irq.c, preinstall.am, rtems/asm.h: New files.
  • Property mode set to 100644
File size: 4.4 KB
Line 
1/*
2 *  NIOS2 CPU Dependent Source
3 *
4 *  COPYRIGHT (c) 1989-2006
5 *  On-Line Applications Research Corporation (OAR).
6 *
7 *  The license and distribution terms for this file may be
8 *  found in the file LICENSE in this distribution or at
9 *  http://www.rtems.com/license/LICENSE.
10 *
11 *  $Id$
12 */
13
14#include <rtems/system.h>
15#include <rtems/score/isr.h>
16#include <rtems/score/wkspace.h>
17
18/*  _CPU_Initialize
19 *
20 *  This routine performs processor dependent initialization.
21 *
22 *  INPUT PARAMETERS:
23 *    cpu_table       - CPU table to initialize
24 *    thread_dispatch - address of disptaching routine
25 *
26 *  NO_CPU Specific Information:
27 *
28 *  XXX document implementation including references if appropriate
29 */
30
31
32void _CPU_Initialize(
33  rtems_cpu_table  *cpu_table,
34  void      (*thread_dispatch)      /* ignored on this CPU */
35)
36{
37  /*
38   *  The thread_dispatch argument is the address of the entry point
39   *  for the routine called at the end of an ISR once it has been
40   *  decided a context switch is necessary.  On some compilation
41   *  systems it is difficult to call a high-level language routine
42   *  from assembly.  This allows us to trick these systems.
43   *
44   *  If you encounter this problem save the entry point in a CPU
45   *  dependent variable.
46   */
47
48  _CPU_Thread_dispatch_pointer = thread_dispatch;
49
50  /*
51   *  If there is not an easy way to initialize the FP context
52   *  during Context_Initialize, then it is usually easier to
53   *  save an "uninitialized" FP context here and copy it to
54   *  the task's during Context_Initialize.
55   */
56
57  /* FP context initialization support goes here */
58
59  _CPU_Table = *cpu_table;
60}
61
62/*PAGE
63 *
64 *  _CPU_ISR_Get_level
65 *
66 *  NO_CPU Specific Information:
67 *
68 *  XXX document implementation including references if appropriate
69 */
70 
71uint32_t   _CPU_ISR_Get_level( void )
72{
73  /*
74   *  This routine returns the current interrupt level.
75   */
76
77  return 0;
78}
79
80/*PAGE
81 *
82 *  _CPU_ISR_install_raw_handler
83 *
84 *  NO_CPU Specific Information:
85 *
86 *  XXX document implementation including references if appropriate
87 */
88 
89void _CPU_ISR_install_raw_handler(
90  uint32_t    vector,
91  proc_ptr    new_handler,
92  proc_ptr   *old_handler
93)
94{
95  /*
96   *  This is where we install the interrupt handler into the "raw" interrupt
97   *  table used by the CPU to dispatch interrupt handlers.
98   */
99}
100
101/*PAGE
102 *
103 *  _CPU_ISR_install_vector
104 *
105 *  This kernel routine installs the RTEMS handler for the
106 *  specified vector.
107 *
108 *  Input parameters:
109 *    vector      - interrupt vector number
110 *    old_handler - former ISR for this vector number
111 *    new_handler - replacement ISR for this vector number
112 *
113 *  Output parameters:  NONE
114 *
115 *
116 *  NO_CPU Specific Information:
117 *
118 *  XXX document implementation including references if appropriate
119 */
120
121void _CPU_ISR_install_vector(
122  uint32_t    vector,
123  proc_ptr    new_handler,
124  proc_ptr   *old_handler
125)
126{
127   *old_handler = _ISR_Vector_table[ vector ];
128
129   /*
130    *  If the interrupt vector table is a table of pointer to isr entry
131    *  points, then we need to install the appropriate RTEMS interrupt
132    *  handler for this vector number.
133    */
134
135   _CPU_ISR_install_raw_handler( vector, new_handler, old_handler );
136
137   /*
138    *  We put the actual user ISR address in '_ISR_vector_table'.  This will
139    *  be used by the _ISR_Handler so the user gets control.
140    */
141
142    _ISR_Vector_table[ vector ] = new_handler;
143}
144
145/*PAGE
146 *
147 *  _CPU_Install_interrupt_stack
148 *
149 *  NO_CPU Specific Information:
150 *
151 *  XXX document implementation including references if appropriate
152 */
153
154void _CPU_Install_interrupt_stack( void )
155{
156}
157
158/*PAGE
159 *
160 *  _CPU_Thread_Idle_body
161 *
162 *  NOTES:
163 *
164 *  1. This is the same as the regular CPU independent algorithm.
165 *
166 *  2. If you implement this using a "halt", "idle", or "shutdown"
167 *     instruction, then don't forget to put it in an infinite loop.
168 *
169 *  3. Be warned. Some processors with onboard DMA have been known
170 *     to stop the DMA if the CPU were put in IDLE mode.  This might
171 *     also be a problem with other on-chip peripherals.  So use this
172 *     hook with caution.
173 *
174 *  NO_CPU Specific Information:
175 *
176 *  XXX document implementation including references if appropriate
177 */
178
179void _CPU_Thread_Idle_body( void )
180{
181#if 1
182  for(;;);
183#else
184  for(;;)
185  {
186    uint32_t st = __builtin_rdctl(0); /* read status  register */
187
188    /* Differentiate between IRQ off and on (for debugging) */
189    if(st & 1)
190      for(;;); 
191    else
192      for(;;); 
193 
194    /* insert your "halt" instruction here */ ;
195  }
196#endif
197}
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