source: rtems/cpukit/score/cpu/moxie/cpu.c @ 5c6edee

5
Last change on this file since 5c6edee was 511dc4b, checked in by Sebastian Huber <sebastian.huber@…>, on 06/19/18 at 07:09:51

Rework initialization and interrupt stack support

Statically initialize the interrupt stack area
(_Configuration_Interrupt_stack_area_begin,
_Configuration_Interrupt_stack_area_end, and
_Configuration_Interrupt_stack_size) via <rtems/confdefs.h>. Place the
interrupt stack area in a special section ".rtemsstack.interrupt". Let
BSPs define the optimal placement of this section in their linker
command files (e.g. in a fast on-chip memory).

This change makes makes the CPU_HAS_SOFTWARE_INTERRUPT_STACK and
CPU_HAS_HARDWARE_INTERRUPT_STACK CPU port defines superfluous, since the
low level initialization code has all information available via global
symbols.

This change makes the CPU_ALLOCATE_INTERRUPT_STACK CPU port define
superfluous, since the interrupt stacks are allocated by confdefs.h for
all architectures. There is no need for BSP-specific linker command
file magic (except the section placement), see previous ARM linker
command file as a bad example.

Remove _CPU_Install_interrupt_stack(). Initialize the hardware
interrupt stack in _CPU_Initialize() if necessary (e.g.
m68k_install_interrupt_stack()).

The optional _CPU_Interrupt_stack_setup() is still useful to customize
the registration of the interrupt stack area in the per-CPU information.

The initialization stack can reuse the interrupt stack, since

  • interrupts are disabled during the sequential system initialization, and
  • the boot_card() function does not return.

This stack resuse saves memory.

Changes per architecture:

arm:

  • Mostly replace the linker symbol based configuration of stacks with the standard <rtems/confdefs.h> configuration via CONFIGURE_INTERRUPT_STACK_SIZE. The size of the FIQ, ABT and UND mode stack is still defined via linker symbols. These modes are rarely used in applications and the default values provided by the BSP should be sufficient in most cases.
  • Remove the bsp_processor_count linker symbol hack used for the SMP support. This is possible since the interrupt stack area is now allocated by the linker and not allocated from the heap. This makes some configure.ac stuff obsolete. Remove the now superfluous BSP variants altcycv_devkit_smp and realview_pbx_a9_qemu_smp.

bfin:

  • Remove unused magic linker command file allocation of initialization stack. Maybe a previous linker command file copy and paste problem? In the start.S the initialization stack is set to a hard coded value.

lm32, m32c, mips, nios2, riscv, sh, v850:

  • Remove magic linker command file allocation of initialization stack. Reuse interrupt stack for initialization stack.

m68k:

  • Remove magic linker command file allocation of initialization stack. Reuse interrupt stack for initialization stack.

powerpc:

  • Remove magic linker command file allocation of initialization stack. Reuse interrupt stack for initialization stack.
  • Used dedicated memory region (REGION_RTEMSSTACK) for the interrupt stack on BSPs using the shared linkcmds.base (replacement for REGION_RWEXTRA).

sparc:

  • Remove the hard coded initialization stack. Use the interrupt stack for the initialization stack on the boot processor. This saves 16KiB of RAM.

Update #3459.

  • Property mode set to 100644
File size: 3.1 KB
Line 
1/*
2 *  Moxie CPU Dependent Source
3 *
4 *  COPYRIGHT (c) 2011 Anthony Green
5 *
6 *  Based on example code and other ports with this copyright:
7 *
8 *  COPYRIGHT (c) 1989-1999, 2010.
9 *  On-Line Applications Research Corporation (OAR).
10 *
11 *  The license and distribution terms for this file may be
12 *  found in the file LICENSE in this distribution or at
13 *  http://www.rtems.org/license/LICENSE.
14 */
15
16#ifdef HAVE_CONFIG_H
17#include "config.h"
18#endif
19
20#include <rtems/system.h>
21#include <rtems/score/isr.h>
22#include <rtems/score/wkspace.h>
23
24/*  _CPU_Initialize
25 *
26 *  This routine performs processor dependent initialization.
27 *
28 *  INPUT PARAMETERS: NONE
29 */
30void _CPU_Initialize(void)
31{
32  /*
33   *  If there is not an easy way to initialize the FP context
34   *  during Context_Initialize, then it is usually easier to
35   *  save an "uninitialized" FP context here and copy it to
36   *  the task's during Context_Initialize.
37   */
38
39  /* FP context initialization support goes here */
40}
41
42/*
43 *  _CPU_ISR_Get_level
44 *
45 *  This routine returns the current interrupt level.
46 */
47uint32_t   _CPU_ISR_Get_level( void )
48{
49  return 0;
50}
51
52/*
53 *  _CPU_ISR_install_raw_handler
54 */
55void _CPU_ISR_install_raw_handler(
56  uint32_t    vector,
57  proc_ptr    new_handler,
58  proc_ptr   *old_handler
59)
60{
61  /*
62   *  This is where we install the interrupt handler into the "raw" interrupt
63   *  table used by the CPU to dispatch interrupt handlers.
64   *  Use Debug level IRQ Handlers
65   */
66  /* H8BD_Install_IRQ(vector,new_handler,old_handler); */
67}
68
69/*
70 *  _CPU_ISR_install_vector
71 *
72 *  This kernel routine installs the RTEMS handler for the
73 *  specified vector.
74 *
75 *  Input parameters:
76 *    vector      - interrupt vector number
77 *    old_handler - former ISR for this vector number
78 *    new_handler - replacement ISR for this vector number
79 *
80 *  Output parameters:  NONE
81 *
82 */
83void _CPU_ISR_install_vector(
84  uint32_t    vector,
85  proc_ptr    new_handler,
86  proc_ptr   *old_handler
87)
88{
89   *old_handler = _ISR_Vector_table[ vector ];
90
91   /*
92    *  If the interrupt vector table is a table of pointer to isr entry
93    *  points, then we need to install the appropriate RTEMS interrupt
94    *  handler for this vector number.
95    */
96
97   _CPU_ISR_install_raw_handler( vector, new_handler, old_handler );
98
99   /*
100    *  We put the actual user ISR address in '_ISR_vector_table'.  This will
101    *  be used by the _ISR_Handler so the user gets control.
102    */
103
104    _ISR_Vector_table[ vector ] = new_handler;
105}
106
107/*
108 *  _CPU_Thread_Idle_body
109 *
110 *  NOTES:
111 *
112 *  1. This is the same as the regular CPU independent algorithm.
113 *
114 *  2. If you implement this using a "halt", "idle", or "shutdown"
115 *     instruction, then don't forget to put it in an infinite loop.
116 *
117 *  3. Be warned. Some processors with onboard DMA have been known
118 *     to stop the DMA if the CPU were put in IDLE mode.  This might
119 *     also be a problem with other on-chip peripherals.  So use this
120 *     hook with caution.
121 */
122#if 0
123void *_CPU_Thread_Idle_body( uintptr_t ignored )
124{
125
126  for( ; ; )
127    IDLE_Monitor();
128        /*asm(" sleep   \n"); */
129    /* insert your "halt" instruction here */ ;
130}
131#endif
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