source: rtems/cpukit/score/cpu/moxie/cpu.c @ 2adc507f

4.115
Last change on this file since 2adc507f was 2adc507f, checked in by Joel Sherrill <joel.sherrill@…>, on 02/28/13 at 19:08:21

cpukit moxie: Style corrections

  • Property mode set to 100644
File size: 3.2 KB
Line 
1/*
2 *  Moxie CPU Dependent Source
3 *
4 *  COPYRIGHT (c) 2011 Anthony Green
5 *
6 *  Based on example code and other ports with this copyright:
7 *
8 *  COPYRIGHT (c) 1989-1999, 2010.
9 *  On-Line Applications Research Corporation (OAR).
10 *
11 *  The license and distribution terms for this file may be
12 *  found in the file LICENSE in this distribution or at
13 *  http://www.rtems.com/license/LICENSE.
14 */
15
16#ifdef HAVE_CONFIG_H
17#include "config.h"
18#endif
19
20#include <rtems/system.h>
21#include <rtems/score/isr.h>
22#include <rtems/score/wkspace.h>
23
24/*  _CPU_Initialize
25 *
26 *  This routine performs processor dependent initialization.
27 *
28 *  INPUT PARAMETERS: NONE
29 */
30void _CPU_Initialize(void)
31{
32  /*
33   *  If there is not an easy way to initialize the FP context
34   *  during Context_Initialize, then it is usually easier to
35   *  save an "uninitialized" FP context here and copy it to
36   *  the task's during Context_Initialize.
37   */
38
39  /* FP context initialization support goes here */
40}
41
42/*
43 *  _CPU_ISR_Get_level
44 *
45 *  This routine returns the current interrupt level.
46 */
47uint32_t   _CPU_ISR_Get_level( void )
48{
49  return 0;
50}
51
52/*
53 *  _CPU_ISR_install_raw_handler
54 */
55void _CPU_ISR_install_raw_handler(
56  uint32_t    vector,
57  proc_ptr    new_handler,
58  proc_ptr   *old_handler
59)
60{
61  /*
62   *  This is where we install the interrupt handler into the "raw" interrupt
63   *  table used by the CPU to dispatch interrupt handlers.
64   *  Use Debug level IRQ Handlers
65   */
66  /* H8BD_Install_IRQ(vector,new_handler,old_handler); */
67}
68
69/*
70 *  _CPU_ISR_install_vector
71 *
72 *  This kernel routine installs the RTEMS handler for the
73 *  specified vector.
74 *
75 *  Input parameters:
76 *    vector      - interrupt vector number
77 *    old_handler - former ISR for this vector number
78 *    new_handler - replacement ISR for this vector number
79 *
80 *  Output parameters:  NONE
81 *
82 */
83void _CPU_ISR_install_vector(
84  uint32_t    vector,
85  proc_ptr    new_handler,
86  proc_ptr   *old_handler
87)
88{
89   *old_handler = _ISR_Vector_table[ vector ];
90
91   /*
92    *  If the interrupt vector table is a table of pointer to isr entry
93    *  points, then we need to install the appropriate RTEMS interrupt
94    *  handler for this vector number.
95    */
96
97   _CPU_ISR_install_raw_handler( vector, new_handler, old_handler );
98
99   /*
100    *  We put the actual user ISR address in '_ISR_vector_table'.  This will
101    *  be used by the _ISR_Handler so the user gets control.
102    */
103
104    _ISR_Vector_table[ vector ] = new_handler;
105}
106
107/*
108 *  _CPU_Install_interrupt_stack
109 */
110void _CPU_Install_interrupt_stack( void )
111{
112}
113
114/*
115 *  _CPU_Thread_Idle_body
116 *
117 *  NOTES:
118 *
119 *  1. This is the same as the regular CPU independent algorithm.
120 *
121 *  2. If you implement this using a "halt", "idle", or "shutdown"
122 *     instruction, then don't forget to put it in an infinite loop.
123 *
124 *  3. Be warned. Some processors with onboard DMA have been known
125 *     to stop the DMA if the CPU were put in IDLE mode.  This might
126 *     also be a problem with other on-chip peripherals.  So use this
127 *     hook with caution.
128 */
129#if 0
130void *_CPU_Thread_Idle_body( uintptr_t ignored )
131{
132
133  for( ; ; )
134    IDLE_Monitor();
135        /*asm(" sleep   \n"); */
136    /* insert your "halt" instruction here */ ;
137}
138#endif
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