source: rtems/cpukit/score/cpu/mips/rtems/mips/iregdef.h @ b5cdddf

4.104.114.84.95
Last change on this file since b5cdddf was b5cdddf, checked in by Ralf Corsepius <ralf.corsepius@…>, on Feb 4, 2005 at 5:38:26 AM

2005-02-04 Ralf Corsepius <ralf.corsepius@…>

  • rtems/mips/idtcpu.h, rtems/mips/iregdef.h, rtems/score/mips.h: Header guards cleanup.
  • Property mode set to 100644
File size: 6.4 KB
Line 
1/*
2
3Based upon IDT provided code with the following release:
4
5This source code has been made available to you by IDT on an AS-IS
6basis. Anyone receiving this source is licensed under IDT copyrights
7to use it in any way he or she deems fit, including copying it,
8modifying it, compiling it, and redistributing it either with or
9without modifications.  No license under IDT patents or patent
10applications is to be implied by the copyright license.
11
12Any user of this software should understand that IDT cannot provide
13technical support for this software and will not be responsible for
14any consequences resulting from the use of this software.
15
16Any person who transfers this source code or any derivative work must
17include the IDT copyright notice, this paragraph, and the preceeding
18two paragraphs in the transferred software.
19
20COPYRIGHT IDT CORPORATION 1996
21LICENSED MATERIAL - PROGRAM PROPERTY OF IDT
22
23  $Id$
24*/ 
25
26/*
27**      iregdef.h - IDT R3000 register structure header file
28**
29**      Copyright 1989 Integrated Device Technology, Inc
30**      All Rights Reserved
31**
32*/
33#ifndef _RTEMS_MIPS_IREGDEF_H
34#define _RTEMS_MIPS_IREGDEF_H
35
36/*
37 * 950313: Ketan added sreg/lreg and R_SZ for 64-bit saves
38 *         added Register definition for XContext reg.
39 *         Look towards end of this file.
40 */
41/*
42** register names
43*/
44#define r0      $0
45#define r1      $1
46#define r2      $2
47#define r3      $3
48#define r4      $4
49#define r5      $5
50#define r6      $6
51#define r7      $7
52#define r8      $8
53#define r9      $9
54#define r10     $10
55#define r11     $11
56#define r12     $12
57#define r13     $13
58
59#define r14     $14
60#define r15     $15
61#define r16     $16
62#define r17     $17
63#define r18     $18
64#define r19     $19
65#define r20     $20
66#define r21     $21
67#define r22     $22
68#define r23     $23
69#define r24     $24
70#define r25     $25
71#define r26     $26
72#define r27     $27
73#define r28     $28
74#define r29     $29
75#define r30     $30
76#define r31     $31
77
78#define fp0     $f0
79#define fp1     $f1
80#define fp2     $f2
81#define fp3     $f3
82#define fp4     $f4
83#define fp5     $f5
84#define fp6     $f6
85#define fp7     $f7
86#define fp8     $f8
87#define fp9     $f9
88#define fp10    $f10
89#define fp11    $f11
90#define fp12    $f12
91#define fp13    $f13
92#define fp14    $f14
93#define fp15    $f15
94#define fp16    $f16
95#define fp17    $f17
96#define fp18    $f18
97#define fp19    $f19
98#define fp20    $f20
99#define fp21    $f21
100#define fp22    $f22
101#define fp23    $f23
102#define fp24    $f24
103#define fp25    $f25
104#define fp26    $f26
105#define fp27    $f27
106#define fp28    $f28
107#define fp29    $f29
108#define fp30    $f30
109#define fp31    $f31
110
111#define fcr0    $0
112#define fcr30   $30
113#define fcr31   $31
114
115#define zero    $0      /* wired zero */
116#define AT      $at     /* assembler temp */
117#define v0      $2      /* return value */
118#define v1      $3
119#define a0      $4      /* argument registers a0-a3 */
120#define a1      $5
121#define a2      $6
122#define a3      $7
123#define t0      $8      /* caller saved  t0-t9 */
124#define t1      $9
125#define t2      $10
126#define t3      $11
127#define t4      $12
128#define t5      $13
129#define t6      $14
130#define t7      $15
131#define s0      $16     /* callee saved s0-s8 */
132#define s1      $17
133#define s2      $18
134#define s3      $19
135#define s4      $20
136#define s5      $21
137#define s6      $22
138#define s7      $23
139#define t8      $24
140#define t9      $25
141#define k0      $26     /* kernel usage */
142#define k1      $27     /* kernel usage */
143#define gp      $28     /* sdata pointer */
144#define sp      $29     /* stack pointer */
145#define s8      $30     /* yet another saved reg for the callee */
146#define fp      $30     /* frame pointer - this is being phased out by MIPS */
147#define ra      $31     /* return address */
148
149
150/*
151** relative position of registers in interrupt/exception frame
152*/
153#define R_R0            0
154#define R_R1            1
155#define R_R2            2
156#define R_R3            3
157#define R_R4            4
158#define R_R5            5
159#define R_R6            6
160#define R_R7            7
161#define R_R8            8
162#define R_R9            9
163#define R_R10           10
164#define R_R11           11
165#define R_R12           12
166#define R_R13           13
167#define R_R14           14
168#define R_R15           15
169#define R_R16           16
170#define R_R17           17
171#define R_R18           18
172#define R_R19           19
173#define R_R20           20
174#define R_R21           21
175#define R_R22           22
176#define R_R23           23
177#define R_R24           24
178#define R_R25           25
179#define R_R26           26
180#define R_R27           27
181#define R_R28           28
182#define R_R29           29
183#define R_R30           30
184#define R_R31           31
185
186#define R_SR            32
187#define R_MDLO          33
188#define R_MDHI          34
189#define R_BADVADDR      35
190#define R_CAUSE         36
191#define R_EPC           37
192
193#define R_F0            38
194#define R_F1            39
195#define R_F2            40
196#define R_F3            41
197#define R_F4            42
198#define R_F5            43
199#define R_F6            44
200#define R_F7            45
201#define R_F8            46
202#define R_F9            47
203#define R_F10           48
204#define R_F11           49
205#define R_F12           50
206#define R_F13           41
207#define R_F14           42
208#define R_F15           43
209#define R_F16           44
210#define R_F17           45
211#define R_F18           56
212#define R_F19           57
213#define R_F20           58
214#define R_F21           59
215#define R_F22           60
216#define R_F23           61
217#define R_F24           62
218#define R_F25           63
219#define R_F26           64
220#define R_F27           65
221#define R_F28           66
222#define R_F29           67
223#define R_F30           68
224#define R_F31           69
225#define R_FCSR          70
226#define R_FEIR          71
227#define R_TLBHI         72
228
229#if __mips == 1
230#define R_TLBLO         73
231#endif
232#if  (__mips == 3 ) || ( __mips == 32)
233#define R_TLBLO0        73
234#endif
235
236#define R_INX           74
237#define R_RAND          75
238#define R_CTXT          76
239#define R_EXCTYPE       77
240#define R_MODE          78
241#define R_PRID          79
242#define R_TAR           80
243#if __mips == 1
244#define NREGS           81
245#endif
246#if  (__mips == 3 ) || ( __mips == 32)
247#define R_TLBLO1        81
248#define R_PAGEMASK      82
249#define R_WIRED         83
250#define R_COUNT         84
251#define R_COMPARE       85
252#define R_CONFIG        86
253#define R_LLADDR        87
254#define R_WATCHLO       88
255#define R_WATCHHI       89
256#define R_ECC           90
257#define R_CACHEERR      91
258#define R_TAGLO         92
259#define R_TAGHI         93
260#define R_ERRPC         94
261#define R_XCTXT         95  /* Ketan added from SIM64bit */
262
263#define NREGS           96
264#endif
265
266/*
267** For those who like to think in terms of the compiler names for the regs
268*/
269#define R_ZERO          R_R0
270#define R_AT            R_R1
271#define R_V0            R_R2
272#define R_V1            R_R3
273#define R_A0            R_R4
274#define R_A1            R_R5
275#define R_A2            R_R6
276#define R_A3            R_R7
277#define R_T0            R_R8
278#define R_T1            R_R9
279#define R_T2            R_R10
280#define R_T3            R_R11
281#define R_T4            R_R12
282#define R_T5            R_R13
283#define R_T6            R_R14
284#define R_T7            R_R15
285#define R_S0            R_R16
286#define R_S1            R_R17
287#define R_S2            R_R18
288#define R_S3            R_R19
289#define R_S4            R_R20
290#define R_S5            R_R21
291#define R_S6            R_R22
292#define R_S7            R_R23
293#define R_T8            R_R24
294#define R_T9            R_R25
295#define R_K0            R_R26
296#define R_K1            R_R27
297#define R_GP            R_R28
298#define R_SP            R_R29
299#define R_FP            R_R30
300#define R_RA            R_R31
301
302/* disabled for RTEMS */
303#if 0
304/* Ketan added the following */
305#if __mips == 1
306#define sreg    sw
307#define lreg    lw
308#define rmfc0   mfc0
309#define rmtc0   mtc0
310#define R_SZ    4
311#endif /* __mips == 1 */
312
313/* #ifdef  __mips == 3 */
314#if __mips < 3
315#define sreg    sw
316#define lreg    lw
317#define rmfc0   mfc0
318#define rmtc0   mtc0
319#define R_SZ    4
320#else
321#define sreg    sd
322#define lreg    ld
323#define rmfc0   dmfc0
324#define rmtc0   dmtc0
325#define R_SZ    8
326#endif
327/* #endif __mips == 3 */
328/* Ketan till here */
329#endif
330
331#endif /* _RTEMS_MIPS_IREGDEF_H */
332
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