source: rtems/cpukit/score/cpu/mips/rtems/mips/iregdef.h @ 9b4422a2

4.115
Last change on this file since 9b4422a2 was 9b4422a2, checked in by Joel Sherrill <joel.sherrill@…>, on 05/03/12 at 15:09:24

Remove All CVS Id Strings Possible Using a Script

Script does what is expected and tries to do it as
smartly as possible.

+ remove occurrences of two blank comment lines

next to each other after Id string line removed.

+ remove entire comment blocks which only exited to

contain CVS Ids

+ If the processing left a blank line at the top of

a file, it was removed.

  • Property mode set to 100644
File size: 6.4 KB
Line 
1/*
2
3Based upon IDT provided code with the following release:
4
5This source code has been made available to you by IDT on an AS-IS
6basis. Anyone receiving this source is licensed under IDT copyrights
7to use it in any way he or she deems fit, including copying it,
8modifying it, compiling it, and redistributing it either with or
9without modifications.  No license under IDT patents or patent
10applications is to be implied by the copyright license.
11
12Any user of this software should understand that IDT cannot provide
13technical support for this software and will not be responsible for
14any consequences resulting from the use of this software.
15
16Any person who transfers this source code or any derivative work must
17include the IDT copyright notice, this paragraph, and the preceeding
18two paragraphs in the transferred software.
19
20COPYRIGHT IDT CORPORATION 1996
21LICENSED MATERIAL - PROGRAM PROPERTY OF IDT
22
23
24/*
25**      iregdef.h - IDT R3000 register structure header file
26**
27**      Copyright 1989 Integrated Device Technology, Inc
28**      All Rights Reserved
29**
30*/
31#ifndef _RTEMS_MIPS_IREGDEF_H
32#define _RTEMS_MIPS_IREGDEF_H
33
34/*
35 * 950313: Ketan added sreg/lreg and R_SZ for 64-bit saves
36 *         added Register definition for XContext reg.
37 *         Look towards end of this file.
38 */
39/*
40** register names
41*/
42#define r0      $0
43#define r1      $1
44#define r2      $2
45#define r3      $3
46#define r4      $4
47#define r5      $5
48#define r6      $6
49#define r7      $7
50#define r8      $8
51#define r9      $9
52#define r10     $10
53#define r11     $11
54#define r12     $12
55#define r13     $13
56
57#define r14     $14
58#define r15     $15
59#define r16     $16
60#define r17     $17
61#define r18     $18
62#define r19     $19
63#define r20     $20
64#define r21     $21
65#define r22     $22
66#define r23     $23
67#define r24     $24
68#define r25     $25
69#define r26     $26
70#define r27     $27
71#define r28     $28
72#define r29     $29
73#define r30     $30
74#define r31     $31
75
76#define fp0     $f0
77#define fp1     $f1
78#define fp2     $f2
79#define fp3     $f3
80#define fp4     $f4
81#define fp5     $f5
82#define fp6     $f6
83#define fp7     $f7
84#define fp8     $f8
85#define fp9     $f9
86#define fp10    $f10
87#define fp11    $f11
88#define fp12    $f12
89#define fp13    $f13
90#define fp14    $f14
91#define fp15    $f15
92#define fp16    $f16
93#define fp17    $f17
94#define fp18    $f18
95#define fp19    $f19
96#define fp20    $f20
97#define fp21    $f21
98#define fp22    $f22
99#define fp23    $f23
100#define fp24    $f24
101#define fp25    $f25
102#define fp26    $f26
103#define fp27    $f27
104#define fp28    $f28
105#define fp29    $f29
106#define fp30    $f30
107#define fp31    $f31
108
109#define fcr0    $0
110#define fcr30   $30
111#define fcr31   $31
112
113#define zero    $0      /* wired zero */
114#define AT      $at     /* assembler temp */
115#define v0      $2      /* return value */
116#define v1      $3
117#define a0      $4      /* argument registers a0-a3 */
118#define a1      $5
119#define a2      $6
120#define a3      $7
121#define t0      $8      /* caller saved  t0-t9 */
122#define t1      $9
123#define t2      $10
124#define t3      $11
125#define t4      $12
126#define t5      $13
127#define t6      $14
128#define t7      $15
129#define s0      $16     /* callee saved s0-s8 */
130#define s1      $17
131#define s2      $18
132#define s3      $19
133#define s4      $20
134#define s5      $21
135#define s6      $22
136#define s7      $23
137#define t8      $24
138#define t9      $25
139#define k0      $26     /* kernel usage */
140#define k1      $27     /* kernel usage */
141#define gp      $28     /* sdata pointer */
142#define sp      $29     /* stack pointer */
143#define s8      $30     /* yet another saved reg for the callee */
144#define fp      $30     /* frame pointer - this is being phased out by MIPS */
145#define ra      $31     /* return address */
146
147
148/*
149** relative position of registers in interrupt/exception frame
150*/
151#define R_R0            0
152#define R_R1            1
153#define R_R2            2
154#define R_R3            3
155#define R_R4            4
156#define R_R5            5
157#define R_R6            6
158#define R_R7            7
159#define R_R8            8
160#define R_R9            9
161#define R_R10           10
162#define R_R11           11
163#define R_R12           12
164#define R_R13           13
165#define R_R14           14
166#define R_R15           15
167#define R_R16           16
168#define R_R17           17
169#define R_R18           18
170#define R_R19           19
171#define R_R20           20
172#define R_R21           21
173#define R_R22           22
174#define R_R23           23
175#define R_R24           24
176#define R_R25           25
177#define R_R26           26
178#define R_R27           27
179#define R_R28           28
180#define R_R29           29
181#define R_R30           30
182#define R_R31           31
183
184#define R_SR            32
185#define R_MDLO          33
186#define R_MDHI          34
187#define R_BADVADDR      35
188#define R_CAUSE         36
189#define R_EPC           37
190
191#define R_F0            38
192#define R_F1            39
193#define R_F2            40
194#define R_F3            41
195#define R_F4            42
196#define R_F5            43
197#define R_F6            44
198#define R_F7            45
199#define R_F8            46
200#define R_F9            47
201#define R_F10           48
202#define R_F11           49
203#define R_F12           50
204#define R_F13           41
205#define R_F14           42
206#define R_F15           43
207#define R_F16           44
208#define R_F17           45
209#define R_F18           56
210#define R_F19           57
211#define R_F20           58
212#define R_F21           59
213#define R_F22           60
214#define R_F23           61
215#define R_F24           62
216#define R_F25           63
217#define R_F26           64
218#define R_F27           65
219#define R_F28           66
220#define R_F29           67
221#define R_F30           68
222#define R_F31           69
223#define R_FCSR          70
224#define R_FEIR          71
225#define R_TLBHI         72
226
227#if __mips == 1
228#define R_TLBLO         73
229#endif
230#if  (__mips == 3 ) || ( __mips == 32)
231#define R_TLBLO0        73
232#endif
233
234#define R_INX           74
235#define R_RAND          75
236#define R_CTXT          76
237#define R_EXCTYPE       77
238#define R_MODE          78
239#define R_PRID          79
240#define R_TAR           80
241#if __mips == 1
242#define NREGS           81
243#endif
244#if  (__mips == 3 ) || ( __mips == 32)
245#define R_TLBLO1        81
246#define R_PAGEMASK      82
247#define R_WIRED         83
248#define R_COUNT         84
249#define R_COMPARE       85
250#define R_CONFIG        86
251#define R_LLADDR        87
252#define R_WATCHLO       88
253#define R_WATCHHI       89
254#define R_ECC           90
255#define R_CACHEERR      91
256#define R_TAGLO         92
257#define R_TAGHI         93
258#define R_ERRPC         94
259#define R_XCTXT         95  /* Ketan added from SIM64bit */
260
261#define NREGS           96
262#endif
263
264/*
265** For those who like to think in terms of the compiler names for the regs
266*/
267#define R_ZERO          R_R0
268#define R_AT            R_R1
269#define R_V0            R_R2
270#define R_V1            R_R3
271#define R_A0            R_R4
272#define R_A1            R_R5
273#define R_A2            R_R6
274#define R_A3            R_R7
275#define R_T0            R_R8
276#define R_T1            R_R9
277#define R_T2            R_R10
278#define R_T3            R_R11
279#define R_T4            R_R12
280#define R_T5            R_R13
281#define R_T6            R_R14
282#define R_T7            R_R15
283#define R_S0            R_R16
284#define R_S1            R_R17
285#define R_S2            R_R18
286#define R_S3            R_R19
287#define R_S4            R_R20
288#define R_S5            R_R21
289#define R_S6            R_R22
290#define R_S7            R_R23
291#define R_T8            R_R24
292#define R_T9            R_R25
293#define R_K0            R_R26
294#define R_K1            R_R27
295#define R_GP            R_R28
296#define R_SP            R_R29
297#define R_FP            R_R30
298#define R_RA            R_R31
299
300/* disabled for RTEMS */
301#if 0
302/* Ketan added the following */
303#if __mips == 1
304#define sreg    sw
305#define lreg    lw
306#define rmfc0   mfc0
307#define rmtc0   mtc0
308#define R_SZ    4
309#endif /* __mips == 1 */
310
311/* #ifdef  __mips == 3 */
312#if __mips < 3
313#define sreg    sw
314#define lreg    lw
315#define rmfc0   mfc0
316#define rmtc0   mtc0
317#define R_SZ    4
318#else
319#define sreg    sd
320#define lreg    ld
321#define rmfc0   dmfc0
322#define rmtc0   dmtc0
323#define R_SZ    8
324#endif
325/* #endif __mips == 3 */
326/* Ketan till here */
327#endif
328
329#endif /* _RTEMS_MIPS_IREGDEF_H */
330
Note: See TracBrowser for help on using the repository browser.